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mmc: the ext_csd data may be used during init even if reading failed
[people/ms/u-boot.git] / drivers / mmc / mmc.c
1 /*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #include <config.h>
11 #include <common.h>
12 #include <command.h>
13 #include <errno.h>
14 #include <mmc.h>
15 #include <part.h>
16 #include <malloc.h>
17 #include <linux/list.h>
18 #include <div64.h>
19 #include "mmc_private.h"
20
21 static struct list_head mmc_devices;
22 static int cur_dev_num = -1;
23
24 __weak int board_mmc_getwp(struct mmc *mmc)
25 {
26 return -1;
27 }
28
29 int mmc_getwp(struct mmc *mmc)
30 {
31 int wp;
32
33 wp = board_mmc_getwp(mmc);
34
35 if (wp < 0) {
36 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
38 else
39 wp = 0;
40 }
41
42 return wp;
43 }
44
45 __weak int board_mmc_getcd(struct mmc *mmc)
46 {
47 return -1;
48 }
49
50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
51 {
52 int ret;
53
54 #ifdef CONFIG_MMC_TRACE
55 int i;
56 u8 *ptr;
57
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
61 switch (cmd->resp_type) {
62 case MMC_RSP_NONE:
63 printf("\t\tMMC_RSP_NONE\n");
64 break;
65 case MMC_RSP_R1:
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
67 cmd->response[0]);
68 break;
69 case MMC_RSP_R1b:
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R2:
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
75 cmd->response[0]);
76 printf("\t\t \t\t 0x%08X \n",
77 cmd->response[1]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[2]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[3]);
82 printf("\n");
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
85 int j;
86 printf("\t\t\t\t\t%03d - ", i*4);
87 ptr = (u8 *)&cmd->response[i];
88 ptr += 3;
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
91 printf("\n");
92 }
93 break;
94 case MMC_RSP_R3:
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 default:
99 printf("\t\tERROR MMC rsp not supported\n");
100 break;
101 }
102 #else
103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
104 #endif
105 return ret;
106 }
107
108 int mmc_send_status(struct mmc *mmc, int timeout)
109 {
110 struct mmc_cmd cmd;
111 int err, retries = 5;
112 #ifdef CONFIG_MMC_TRACE
113 int status;
114 #endif
115
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
120
121 do {
122 err = mmc_send_cmd(mmc, &cmd, NULL);
123 if (!err) {
124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
125 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
126 MMC_STATE_PRG)
127 break;
128 else if (cmd.response[0] & MMC_STATUS_MASK) {
129 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
130 printf("Status Error: 0x%08X\n",
131 cmd.response[0]);
132 #endif
133 return COMM_ERR;
134 }
135 } else if (--retries < 0)
136 return err;
137
138 udelay(1000);
139
140 } while (timeout--);
141
142 #ifdef CONFIG_MMC_TRACE
143 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
144 printf("CURR STATE:%d\n", status);
145 #endif
146 if (timeout <= 0) {
147 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
148 printf("Timeout waiting card ready\n");
149 #endif
150 return TIMEOUT;
151 }
152 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
153 return SWITCH_ERR;
154
155 return 0;
156 }
157
158 int mmc_set_blocklen(struct mmc *mmc, int len)
159 {
160 struct mmc_cmd cmd;
161
162 if (mmc->ddr_mode)
163 return 0;
164
165 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
166 cmd.resp_type = MMC_RSP_R1;
167 cmd.cmdarg = len;
168
169 return mmc_send_cmd(mmc, &cmd, NULL);
170 }
171
172 struct mmc *find_mmc_device(int dev_num)
173 {
174 struct mmc *m;
175 struct list_head *entry;
176
177 list_for_each(entry, &mmc_devices) {
178 m = list_entry(entry, struct mmc, link);
179
180 if (m->block_dev.dev == dev_num)
181 return m;
182 }
183
184 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
185 printf("MMC Device %d not found\n", dev_num);
186 #endif
187
188 return NULL;
189 }
190
191 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
192 lbaint_t blkcnt)
193 {
194 struct mmc_cmd cmd;
195 struct mmc_data data;
196
197 if (blkcnt > 1)
198 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
199 else
200 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
201
202 if (mmc->high_capacity)
203 cmd.cmdarg = start;
204 else
205 cmd.cmdarg = start * mmc->read_bl_len;
206
207 cmd.resp_type = MMC_RSP_R1;
208
209 data.dest = dst;
210 data.blocks = blkcnt;
211 data.blocksize = mmc->read_bl_len;
212 data.flags = MMC_DATA_READ;
213
214 if (mmc_send_cmd(mmc, &cmd, &data))
215 return 0;
216
217 if (blkcnt > 1) {
218 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
219 cmd.cmdarg = 0;
220 cmd.resp_type = MMC_RSP_R1b;
221 if (mmc_send_cmd(mmc, &cmd, NULL)) {
222 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
223 printf("mmc fail to send stop cmd\n");
224 #endif
225 return 0;
226 }
227 }
228
229 return blkcnt;
230 }
231
232 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
233 {
234 lbaint_t cur, blocks_todo = blkcnt;
235
236 if (blkcnt == 0)
237 return 0;
238
239 struct mmc *mmc = find_mmc_device(dev_num);
240 if (!mmc)
241 return 0;
242
243 if ((start + blkcnt) > mmc->block_dev.lba) {
244 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
246 start + blkcnt, mmc->block_dev.lba);
247 #endif
248 return 0;
249 }
250
251 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
252 return 0;
253
254 do {
255 cur = (blocks_todo > mmc->cfg->b_max) ?
256 mmc->cfg->b_max : blocks_todo;
257 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
258 return 0;
259 blocks_todo -= cur;
260 start += cur;
261 dst += cur * mmc->read_bl_len;
262 } while (blocks_todo > 0);
263
264 return blkcnt;
265 }
266
267 static int mmc_go_idle(struct mmc *mmc)
268 {
269 struct mmc_cmd cmd;
270 int err;
271
272 udelay(1000);
273
274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
275 cmd.cmdarg = 0;
276 cmd.resp_type = MMC_RSP_NONE;
277
278 err = mmc_send_cmd(mmc, &cmd, NULL);
279
280 if (err)
281 return err;
282
283 udelay(2000);
284
285 return 0;
286 }
287
288 static int sd_send_op_cond(struct mmc *mmc)
289 {
290 int timeout = 1000;
291 int err;
292 struct mmc_cmd cmd;
293
294 do {
295 cmd.cmdidx = MMC_CMD_APP_CMD;
296 cmd.resp_type = MMC_RSP_R1;
297 cmd.cmdarg = 0;
298
299 err = mmc_send_cmd(mmc, &cmd, NULL);
300
301 if (err)
302 return err;
303
304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
305 cmd.resp_type = MMC_RSP_R3;
306
307 /*
308 * Most cards do not answer if some reserved bits
309 * in the ocr are set. However, Some controller
310 * can set bit 7 (reserved for low voltages), but
311 * how to manage low voltages SD card is not yet
312 * specified.
313 */
314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
315 (mmc->cfg->voltages & 0xff8000);
316
317 if (mmc->version == SD_VERSION_2)
318 cmd.cmdarg |= OCR_HCS;
319
320 err = mmc_send_cmd(mmc, &cmd, NULL);
321
322 if (err)
323 return err;
324
325 udelay(1000);
326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
327
328 if (timeout <= 0)
329 return UNUSABLE_ERR;
330
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
333
334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
337 cmd.cmdarg = 0;
338
339 err = mmc_send_cmd(mmc, &cmd, NULL);
340
341 if (err)
342 return err;
343 }
344
345 mmc->ocr = cmd.response[0];
346
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
348 mmc->rca = 0;
349
350 return 0;
351 }
352
353 /* We pass in the cmd since otherwise the init seems to fail */
354 static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
355 int use_arg)
356 {
357 int err;
358
359 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd->resp_type = MMC_RSP_R3;
361 cmd->cmdarg = 0;
362 if (use_arg && !mmc_host_is_spi(mmc)) {
363 cmd->cmdarg =
364 (mmc->cfg->voltages &
365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
366 (mmc->op_cond_response & OCR_ACCESS_MODE);
367
368 if (mmc->cfg->host_caps & MMC_MODE_HC)
369 cmd->cmdarg |= OCR_HCS;
370 }
371 err = mmc_send_cmd(mmc, cmd, NULL);
372 if (err)
373 return err;
374 mmc->op_cond_response = cmd->response[0];
375 return 0;
376 }
377
378 static int mmc_send_op_cond(struct mmc *mmc)
379 {
380 struct mmc_cmd cmd;
381 int err, i;
382
383 /* Some cards seem to need this */
384 mmc_go_idle(mmc);
385
386 /* Asking to the card its capabilities */
387 mmc->op_cond_pending = 1;
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
390 if (err)
391 return err;
392
393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->op_cond_response & OCR_BUSY)
395 return 0;
396 }
397 return IN_PROGRESS;
398 }
399
400 static int mmc_complete_op_cond(struct mmc *mmc)
401 {
402 struct mmc_cmd cmd;
403 int timeout = 1000;
404 uint start;
405 int err;
406
407 mmc->op_cond_pending = 0;
408 start = get_timer(0);
409 do {
410 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
411 if (err)
412 return err;
413 if (get_timer(start) > timeout)
414 return UNUSABLE_ERR;
415 udelay(100);
416 } while (!(mmc->op_cond_response & OCR_BUSY));
417
418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
421 cmd.cmdarg = 0;
422
423 err = mmc_send_cmd(mmc, &cmd, NULL);
424
425 if (err)
426 return err;
427 }
428
429 mmc->version = MMC_VERSION_UNKNOWN;
430 mmc->ocr = cmd.response[0];
431
432 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
433 mmc->rca = 1;
434
435 return 0;
436 }
437
438
439 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
440 {
441 struct mmc_cmd cmd;
442 struct mmc_data data;
443 int err;
444
445 /* Get the Card Status Register */
446 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
447 cmd.resp_type = MMC_RSP_R1;
448 cmd.cmdarg = 0;
449
450 data.dest = (char *)ext_csd;
451 data.blocks = 1;
452 data.blocksize = MMC_MAX_BLOCK_LEN;
453 data.flags = MMC_DATA_READ;
454
455 err = mmc_send_cmd(mmc, &cmd, &data);
456
457 return err;
458 }
459
460
461 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
462 {
463 struct mmc_cmd cmd;
464 int timeout = 1000;
465 int ret;
466
467 cmd.cmdidx = MMC_CMD_SWITCH;
468 cmd.resp_type = MMC_RSP_R1b;
469 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
470 (index << 16) |
471 (value << 8);
472
473 ret = mmc_send_cmd(mmc, &cmd, NULL);
474
475 /* Waiting for the ready status */
476 if (!ret)
477 ret = mmc_send_status(mmc, timeout);
478
479 return ret;
480
481 }
482
483 static int mmc_change_freq(struct mmc *mmc)
484 {
485 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
486 char cardtype;
487 int err;
488
489 mmc->card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
490
491 if (mmc_host_is_spi(mmc))
492 return 0;
493
494 /* Only version 4 supports high-speed */
495 if (mmc->version < MMC_VERSION_4)
496 return 0;
497
498 err = mmc_send_ext_csd(mmc, ext_csd);
499
500 if (err)
501 return err;
502
503 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
504
505 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
506
507 if (err)
508 return err == SWITCH_ERR ? 0 : err;
509
510 /* Now check to see that it worked */
511 err = mmc_send_ext_csd(mmc, ext_csd);
512
513 if (err)
514 return err;
515
516 /* No high-speed support */
517 if (!ext_csd[EXT_CSD_HS_TIMING])
518 return 0;
519
520 /* High Speed is set, there are two types: 52MHz and 26MHz */
521 if (cardtype & EXT_CSD_CARD_TYPE_52) {
522 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
523 mmc->card_caps |= MMC_MODE_DDR_52MHz;
524 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
525 } else {
526 mmc->card_caps |= MMC_MODE_HS;
527 }
528
529 return 0;
530 }
531
532 static int mmc_set_capacity(struct mmc *mmc, int part_num)
533 {
534 switch (part_num) {
535 case 0:
536 mmc->capacity = mmc->capacity_user;
537 break;
538 case 1:
539 case 2:
540 mmc->capacity = mmc->capacity_boot;
541 break;
542 case 3:
543 mmc->capacity = mmc->capacity_rpmb;
544 break;
545 case 4:
546 case 5:
547 case 6:
548 case 7:
549 mmc->capacity = mmc->capacity_gp[part_num - 4];
550 break;
551 default:
552 return -1;
553 }
554
555 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
556
557 return 0;
558 }
559
560 int mmc_select_hwpart(int dev_num, int hwpart)
561 {
562 struct mmc *mmc = find_mmc_device(dev_num);
563 int ret;
564
565 if (!mmc)
566 return -ENODEV;
567
568 if (mmc->part_num == hwpart)
569 return 0;
570
571 if (mmc->part_config == MMCPART_NOAVAILABLE) {
572 printf("Card doesn't support part_switch\n");
573 return -EMEDIUMTYPE;
574 }
575
576 ret = mmc_switch_part(dev_num, hwpart);
577 if (ret)
578 return ret;
579
580 mmc->part_num = hwpart;
581
582 return 0;
583 }
584
585
586 int mmc_switch_part(int dev_num, unsigned int part_num)
587 {
588 struct mmc *mmc = find_mmc_device(dev_num);
589 int ret;
590
591 if (!mmc)
592 return -1;
593
594 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
595 (mmc->part_config & ~PART_ACCESS_MASK)
596 | (part_num & PART_ACCESS_MASK));
597
598 /*
599 * Set the capacity if the switch succeeded or was intended
600 * to return to representing the raw device.
601 */
602 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
603 ret = mmc_set_capacity(mmc, part_num);
604
605 return ret;
606 }
607
608 int mmc_getcd(struct mmc *mmc)
609 {
610 int cd;
611
612 cd = board_mmc_getcd(mmc);
613
614 if (cd < 0) {
615 if (mmc->cfg->ops->getcd)
616 cd = mmc->cfg->ops->getcd(mmc);
617 else
618 cd = 1;
619 }
620
621 return cd;
622 }
623
624 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
625 {
626 struct mmc_cmd cmd;
627 struct mmc_data data;
628
629 /* Switch the frequency */
630 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
631 cmd.resp_type = MMC_RSP_R1;
632 cmd.cmdarg = (mode << 31) | 0xffffff;
633 cmd.cmdarg &= ~(0xf << (group * 4));
634 cmd.cmdarg |= value << (group * 4);
635
636 data.dest = (char *)resp;
637 data.blocksize = 64;
638 data.blocks = 1;
639 data.flags = MMC_DATA_READ;
640
641 return mmc_send_cmd(mmc, &cmd, &data);
642 }
643
644
645 static int sd_change_freq(struct mmc *mmc)
646 {
647 int err;
648 struct mmc_cmd cmd;
649 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
650 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
651 struct mmc_data data;
652 int timeout;
653
654 mmc->card_caps = 0;
655
656 if (mmc_host_is_spi(mmc))
657 return 0;
658
659 /* Read the SCR to find out if this card supports higher speeds */
660 cmd.cmdidx = MMC_CMD_APP_CMD;
661 cmd.resp_type = MMC_RSP_R1;
662 cmd.cmdarg = mmc->rca << 16;
663
664 err = mmc_send_cmd(mmc, &cmd, NULL);
665
666 if (err)
667 return err;
668
669 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
670 cmd.resp_type = MMC_RSP_R1;
671 cmd.cmdarg = 0;
672
673 timeout = 3;
674
675 retry_scr:
676 data.dest = (char *)scr;
677 data.blocksize = 8;
678 data.blocks = 1;
679 data.flags = MMC_DATA_READ;
680
681 err = mmc_send_cmd(mmc, &cmd, &data);
682
683 if (err) {
684 if (timeout--)
685 goto retry_scr;
686
687 return err;
688 }
689
690 mmc->scr[0] = __be32_to_cpu(scr[0]);
691 mmc->scr[1] = __be32_to_cpu(scr[1]);
692
693 switch ((mmc->scr[0] >> 24) & 0xf) {
694 case 0:
695 mmc->version = SD_VERSION_1_0;
696 break;
697 case 1:
698 mmc->version = SD_VERSION_1_10;
699 break;
700 case 2:
701 mmc->version = SD_VERSION_2;
702 if ((mmc->scr[0] >> 15) & 0x1)
703 mmc->version = SD_VERSION_3;
704 break;
705 default:
706 mmc->version = SD_VERSION_1_0;
707 break;
708 }
709
710 if (mmc->scr[0] & SD_DATA_4BIT)
711 mmc->card_caps |= MMC_MODE_4BIT;
712
713 /* Version 1.0 doesn't support switching */
714 if (mmc->version == SD_VERSION_1_0)
715 return 0;
716
717 timeout = 4;
718 while (timeout--) {
719 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
720 (u8 *)switch_status);
721
722 if (err)
723 return err;
724
725 /* The high-speed function is busy. Try again */
726 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
727 break;
728 }
729
730 /* If high-speed isn't supported, we return */
731 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
732 return 0;
733
734 /*
735 * If the host doesn't support SD_HIGHSPEED, do not switch card to
736 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
737 * This can avoid furthur problem when the card runs in different
738 * mode between the host.
739 */
740 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
741 (mmc->cfg->host_caps & MMC_MODE_HS)))
742 return 0;
743
744 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
745
746 if (err)
747 return err;
748
749 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
750 mmc->card_caps |= MMC_MODE_HS;
751
752 return 0;
753 }
754
755 /* frequency bases */
756 /* divided by 10 to be nice to platforms without floating point */
757 static const int fbase[] = {
758 10000,
759 100000,
760 1000000,
761 10000000,
762 };
763
764 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
765 * to platforms without floating point.
766 */
767 static const int multipliers[] = {
768 0, /* reserved */
769 10,
770 12,
771 13,
772 15,
773 20,
774 25,
775 30,
776 35,
777 40,
778 45,
779 50,
780 55,
781 60,
782 70,
783 80,
784 };
785
786 static void mmc_set_ios(struct mmc *mmc)
787 {
788 if (mmc->cfg->ops->set_ios)
789 mmc->cfg->ops->set_ios(mmc);
790 }
791
792 void mmc_set_clock(struct mmc *mmc, uint clock)
793 {
794 if (clock > mmc->cfg->f_max)
795 clock = mmc->cfg->f_max;
796
797 if (clock < mmc->cfg->f_min)
798 clock = mmc->cfg->f_min;
799
800 mmc->clock = clock;
801
802 mmc_set_ios(mmc);
803 }
804
805 static void mmc_set_bus_width(struct mmc *mmc, uint width)
806 {
807 mmc->bus_width = width;
808
809 mmc_set_ios(mmc);
810 }
811
812 static int mmc_startup(struct mmc *mmc)
813 {
814 int err, i;
815 uint mult, freq;
816 u64 cmult, csize, capacity;
817 struct mmc_cmd cmd;
818 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
819 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
820 int timeout = 1000;
821 bool has_parts = false;
822 bool part_completed;
823
824 #ifdef CONFIG_MMC_SPI_CRC_ON
825 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
826 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
827 cmd.resp_type = MMC_RSP_R1;
828 cmd.cmdarg = 1;
829 err = mmc_send_cmd(mmc, &cmd, NULL);
830
831 if (err)
832 return err;
833 }
834 #endif
835
836 /* Put the Card in Identify Mode */
837 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
838 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
839 cmd.resp_type = MMC_RSP_R2;
840 cmd.cmdarg = 0;
841
842 err = mmc_send_cmd(mmc, &cmd, NULL);
843
844 if (err)
845 return err;
846
847 memcpy(mmc->cid, cmd.response, 16);
848
849 /*
850 * For MMC cards, set the Relative Address.
851 * For SD cards, get the Relatvie Address.
852 * This also puts the cards into Standby State
853 */
854 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
855 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
856 cmd.cmdarg = mmc->rca << 16;
857 cmd.resp_type = MMC_RSP_R6;
858
859 err = mmc_send_cmd(mmc, &cmd, NULL);
860
861 if (err)
862 return err;
863
864 if (IS_SD(mmc))
865 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
866 }
867
868 /* Get the Card-Specific Data */
869 cmd.cmdidx = MMC_CMD_SEND_CSD;
870 cmd.resp_type = MMC_RSP_R2;
871 cmd.cmdarg = mmc->rca << 16;
872
873 err = mmc_send_cmd(mmc, &cmd, NULL);
874
875 /* Waiting for the ready status */
876 mmc_send_status(mmc, timeout);
877
878 if (err)
879 return err;
880
881 mmc->csd[0] = cmd.response[0];
882 mmc->csd[1] = cmd.response[1];
883 mmc->csd[2] = cmd.response[2];
884 mmc->csd[3] = cmd.response[3];
885
886 if (mmc->version == MMC_VERSION_UNKNOWN) {
887 int version = (cmd.response[0] >> 26) & 0xf;
888
889 switch (version) {
890 case 0:
891 mmc->version = MMC_VERSION_1_2;
892 break;
893 case 1:
894 mmc->version = MMC_VERSION_1_4;
895 break;
896 case 2:
897 mmc->version = MMC_VERSION_2_2;
898 break;
899 case 3:
900 mmc->version = MMC_VERSION_3;
901 break;
902 case 4:
903 mmc->version = MMC_VERSION_4;
904 break;
905 default:
906 mmc->version = MMC_VERSION_1_2;
907 break;
908 }
909 }
910
911 /* divide frequency by 10, since the mults are 10x bigger */
912 freq = fbase[(cmd.response[0] & 0x7)];
913 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
914
915 mmc->tran_speed = freq * mult;
916
917 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
918 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
919
920 if (IS_SD(mmc))
921 mmc->write_bl_len = mmc->read_bl_len;
922 else
923 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
924
925 if (mmc->high_capacity) {
926 csize = (mmc->csd[1] & 0x3f) << 16
927 | (mmc->csd[2] & 0xffff0000) >> 16;
928 cmult = 8;
929 } else {
930 csize = (mmc->csd[1] & 0x3ff) << 2
931 | (mmc->csd[2] & 0xc0000000) >> 30;
932 cmult = (mmc->csd[2] & 0x00038000) >> 15;
933 }
934
935 mmc->capacity_user = (csize + 1) << (cmult + 2);
936 mmc->capacity_user *= mmc->read_bl_len;
937 mmc->capacity_boot = 0;
938 mmc->capacity_rpmb = 0;
939 for (i = 0; i < 4; i++)
940 mmc->capacity_gp[i] = 0;
941
942 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
943 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
944
945 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
946 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
947
948 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
949 cmd.cmdidx = MMC_CMD_SET_DSR;
950 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
951 cmd.resp_type = MMC_RSP_NONE;
952 if (mmc_send_cmd(mmc, &cmd, NULL))
953 printf("MMC: SET_DSR failed\n");
954 }
955
956 /* Select the card, and put it into Transfer Mode */
957 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
958 cmd.cmdidx = MMC_CMD_SELECT_CARD;
959 cmd.resp_type = MMC_RSP_R1;
960 cmd.cmdarg = mmc->rca << 16;
961 err = mmc_send_cmd(mmc, &cmd, NULL);
962
963 if (err)
964 return err;
965 }
966
967 /*
968 * For SD, its erase group is always one sector
969 */
970 mmc->erase_grp_size = 1;
971 mmc->part_config = MMCPART_NOAVAILABLE;
972 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
973 /* check ext_csd version and capacity */
974 err = mmc_send_ext_csd(mmc, ext_csd);
975 if (err)
976 return err;
977 if (ext_csd[EXT_CSD_REV] >= 2) {
978 /*
979 * According to the JEDEC Standard, the value of
980 * ext_csd's capacity is valid if the value is more
981 * than 2GB
982 */
983 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
984 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
985 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
986 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
987 capacity *= MMC_MAX_BLOCK_LEN;
988 if ((capacity >> 20) > 2 * 1024)
989 mmc->capacity_user = capacity;
990 }
991
992 switch (ext_csd[EXT_CSD_REV]) {
993 case 1:
994 mmc->version = MMC_VERSION_4_1;
995 break;
996 case 2:
997 mmc->version = MMC_VERSION_4_2;
998 break;
999 case 3:
1000 mmc->version = MMC_VERSION_4_3;
1001 break;
1002 case 5:
1003 mmc->version = MMC_VERSION_4_41;
1004 break;
1005 case 6:
1006 mmc->version = MMC_VERSION_4_5;
1007 break;
1008 case 7:
1009 mmc->version = MMC_VERSION_5_0;
1010 break;
1011 }
1012
1013 /* The partition data may be non-zero but it is only
1014 * effective if PARTITION_SETTING_COMPLETED is set in
1015 * EXT_CSD, so ignore any data if this bit is not set,
1016 * except for enabling the high-capacity group size
1017 * definition (see below). */
1018 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1019 EXT_CSD_PARTITION_SETTING_COMPLETED);
1020
1021 /* store the partition info of emmc */
1022 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1023 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1024 ext_csd[EXT_CSD_BOOT_MULT])
1025 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1026 if (part_completed &&
1027 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1028 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1029
1030 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1031
1032 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1033
1034 for (i = 0; i < 4; i++) {
1035 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1036 uint mult = (ext_csd[idx + 2] << 16) +
1037 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1038 if (mult)
1039 has_parts = true;
1040 if (!part_completed)
1041 continue;
1042 mmc->capacity_gp[i] = mult;
1043 mmc->capacity_gp[i] *=
1044 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1045 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1046 mmc->capacity_gp[i] <<= 19;
1047 }
1048
1049 if (part_completed) {
1050 mmc->enh_user_size =
1051 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1052 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1053 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1054 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1055 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1056 mmc->enh_user_size <<= 19;
1057 mmc->enh_user_start =
1058 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1059 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1060 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1061 ext_csd[EXT_CSD_ENH_START_ADDR];
1062 if (mmc->high_capacity)
1063 mmc->enh_user_start <<= 9;
1064 }
1065
1066 /*
1067 * Host needs to enable ERASE_GRP_DEF bit if device is
1068 * partitioned. This bit will be lost every time after a reset
1069 * or power off. This will affect erase size.
1070 */
1071 if (part_completed)
1072 has_parts = true;
1073 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1074 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1075 has_parts = true;
1076 if (has_parts) {
1077 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1078 EXT_CSD_ERASE_GROUP_DEF, 1);
1079
1080 if (err)
1081 return err;
1082 else
1083 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1084 }
1085
1086 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1087 /* Read out group size from ext_csd */
1088 mmc->erase_grp_size =
1089 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1090 /*
1091 * if high capacity and partition setting completed
1092 * SEC_COUNT is valid even if it is smaller than 2 GiB
1093 * JEDEC Standard JESD84-B45, 6.2.4
1094 */
1095 if (mmc->high_capacity && part_completed) {
1096 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1097 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1098 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1099 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1100 capacity *= MMC_MAX_BLOCK_LEN;
1101 mmc->capacity_user = capacity;
1102 }
1103 } else {
1104 /* Calculate the group size from the csd value. */
1105 int erase_gsz, erase_gmul;
1106 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1107 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1108 mmc->erase_grp_size = (erase_gsz + 1)
1109 * (erase_gmul + 1);
1110 }
1111
1112 mmc->hc_wp_grp_size = 1024
1113 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1114 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1115 }
1116
1117 err = mmc_set_capacity(mmc, mmc->part_num);
1118 if (err)
1119 return err;
1120
1121 if (IS_SD(mmc))
1122 err = sd_change_freq(mmc);
1123 else
1124 err = mmc_change_freq(mmc);
1125
1126 if (err)
1127 return err;
1128
1129 /* Restrict card's capabilities by what the host can do */
1130 mmc->card_caps &= mmc->cfg->host_caps;
1131
1132 if (IS_SD(mmc)) {
1133 if (mmc->card_caps & MMC_MODE_4BIT) {
1134 cmd.cmdidx = MMC_CMD_APP_CMD;
1135 cmd.resp_type = MMC_RSP_R1;
1136 cmd.cmdarg = mmc->rca << 16;
1137
1138 err = mmc_send_cmd(mmc, &cmd, NULL);
1139 if (err)
1140 return err;
1141
1142 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1143 cmd.resp_type = MMC_RSP_R1;
1144 cmd.cmdarg = 2;
1145 err = mmc_send_cmd(mmc, &cmd, NULL);
1146 if (err)
1147 return err;
1148
1149 mmc_set_bus_width(mmc, 4);
1150 }
1151
1152 if (mmc->card_caps & MMC_MODE_HS)
1153 mmc->tran_speed = 50000000;
1154 else
1155 mmc->tran_speed = 25000000;
1156 } else {
1157 int idx;
1158
1159 /* An array of possible bus widths in order of preference */
1160 static unsigned ext_csd_bits[] = {
1161 EXT_CSD_DDR_BUS_WIDTH_8,
1162 EXT_CSD_DDR_BUS_WIDTH_4,
1163 EXT_CSD_BUS_WIDTH_8,
1164 EXT_CSD_BUS_WIDTH_4,
1165 EXT_CSD_BUS_WIDTH_1,
1166 };
1167
1168 /* An array to map CSD bus widths to host cap bits */
1169 static unsigned ext_to_hostcaps[] = {
1170 [EXT_CSD_DDR_BUS_WIDTH_4] =
1171 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1172 [EXT_CSD_DDR_BUS_WIDTH_8] =
1173 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1174 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1175 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1176 };
1177
1178 /* An array to map chosen bus width to an integer */
1179 static unsigned widths[] = {
1180 8, 4, 8, 4, 1,
1181 };
1182
1183 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1184 unsigned int extw = ext_csd_bits[idx];
1185 unsigned int caps = ext_to_hostcaps[extw];
1186
1187 /*
1188 * Check to make sure the card and controller support
1189 * these capabilities
1190 */
1191 if ((mmc->card_caps & caps) != caps)
1192 continue;
1193
1194 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1195 EXT_CSD_BUS_WIDTH, extw);
1196
1197 if (err)
1198 continue;
1199
1200 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1201 mmc_set_bus_width(mmc, widths[idx]);
1202
1203 err = mmc_send_ext_csd(mmc, test_csd);
1204
1205 if (err)
1206 continue;
1207
1208 /* Only compare read only fields */
1209 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1210 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1211 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1212 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1213 ext_csd[EXT_CSD_REV]
1214 == test_csd[EXT_CSD_REV] &&
1215 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1216 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1217 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1218 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1219 break;
1220 else
1221 err = SWITCH_ERR;
1222 }
1223
1224 if (err)
1225 return err;
1226
1227 if (mmc->card_caps & MMC_MODE_HS) {
1228 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1229 mmc->tran_speed = 52000000;
1230 else
1231 mmc->tran_speed = 26000000;
1232 }
1233 }
1234
1235 mmc_set_clock(mmc, mmc->tran_speed);
1236
1237 /* Fix the block length for DDR mode */
1238 if (mmc->ddr_mode) {
1239 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1240 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1241 }
1242
1243 /* fill in device description */
1244 mmc->block_dev.lun = 0;
1245 mmc->block_dev.type = 0;
1246 mmc->block_dev.blksz = mmc->read_bl_len;
1247 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1248 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1249 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1250 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1251 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1252 (mmc->cid[3] >> 16) & 0xffff);
1253 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1254 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1255 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1256 (mmc->cid[2] >> 24) & 0xff);
1257 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1258 (mmc->cid[2] >> 16) & 0xf);
1259 #else
1260 mmc->block_dev.vendor[0] = 0;
1261 mmc->block_dev.product[0] = 0;
1262 mmc->block_dev.revision[0] = 0;
1263 #endif
1264 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1265 init_part(&mmc->block_dev);
1266 #endif
1267
1268 return 0;
1269 }
1270
1271 static int mmc_send_if_cond(struct mmc *mmc)
1272 {
1273 struct mmc_cmd cmd;
1274 int err;
1275
1276 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1277 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1278 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1279 cmd.resp_type = MMC_RSP_R7;
1280
1281 err = mmc_send_cmd(mmc, &cmd, NULL);
1282
1283 if (err)
1284 return err;
1285
1286 if ((cmd.response[0] & 0xff) != 0xaa)
1287 return UNUSABLE_ERR;
1288 else
1289 mmc->version = SD_VERSION_2;
1290
1291 return 0;
1292 }
1293
1294 /* not used any more */
1295 int __deprecated mmc_register(struct mmc *mmc)
1296 {
1297 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1298 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1299 #endif
1300 return -1;
1301 }
1302
1303 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1304 {
1305 struct mmc *mmc;
1306
1307 /* quick validation */
1308 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1309 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1310 return NULL;
1311
1312 mmc = calloc(1, sizeof(*mmc));
1313 if (mmc == NULL)
1314 return NULL;
1315
1316 mmc->cfg = cfg;
1317 mmc->priv = priv;
1318
1319 /* the following chunk was mmc_register() */
1320
1321 /* Setup dsr related values */
1322 mmc->dsr_imp = 0;
1323 mmc->dsr = 0xffffffff;
1324 /* Setup the universal parts of the block interface just once */
1325 mmc->block_dev.if_type = IF_TYPE_MMC;
1326 mmc->block_dev.dev = cur_dev_num++;
1327 mmc->block_dev.removable = 1;
1328 mmc->block_dev.block_read = mmc_bread;
1329 mmc->block_dev.block_write = mmc_bwrite;
1330 mmc->block_dev.block_erase = mmc_berase;
1331
1332 /* setup initial part type */
1333 mmc->block_dev.part_type = mmc->cfg->part_type;
1334
1335 INIT_LIST_HEAD(&mmc->link);
1336
1337 list_add_tail(&mmc->link, &mmc_devices);
1338
1339 return mmc;
1340 }
1341
1342 void mmc_destroy(struct mmc *mmc)
1343 {
1344 /* only freeing memory for now */
1345 free(mmc);
1346 }
1347
1348 #ifdef CONFIG_PARTITIONS
1349 block_dev_desc_t *mmc_get_dev(int dev)
1350 {
1351 struct mmc *mmc = find_mmc_device(dev);
1352 if (!mmc || mmc_init(mmc))
1353 return NULL;
1354
1355 return &mmc->block_dev;
1356 }
1357 #endif
1358
1359 /* board-specific MMC power initializations. */
1360 __weak void board_mmc_power_init(void)
1361 {
1362 }
1363
1364 int mmc_start_init(struct mmc *mmc)
1365 {
1366 int err;
1367
1368 /* we pretend there's no card when init is NULL */
1369 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1370 mmc->has_init = 0;
1371 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1372 printf("MMC: no card present\n");
1373 #endif
1374 return NO_CARD_ERR;
1375 }
1376
1377 if (mmc->has_init)
1378 return 0;
1379
1380 board_mmc_power_init();
1381
1382 /* made sure it's not NULL earlier */
1383 err = mmc->cfg->ops->init(mmc);
1384
1385 if (err)
1386 return err;
1387
1388 mmc->ddr_mode = 0;
1389 mmc_set_bus_width(mmc, 1);
1390 mmc_set_clock(mmc, 1);
1391
1392 /* Reset the Card */
1393 err = mmc_go_idle(mmc);
1394
1395 if (err)
1396 return err;
1397
1398 /* The internal partition reset to user partition(0) at every CMD0*/
1399 mmc->part_num = 0;
1400
1401 /* Test for SD version 2 */
1402 err = mmc_send_if_cond(mmc);
1403
1404 /* Now try to get the SD card's operating condition */
1405 err = sd_send_op_cond(mmc);
1406
1407 /* If the command timed out, we check for an MMC card */
1408 if (err == TIMEOUT) {
1409 err = mmc_send_op_cond(mmc);
1410
1411 if (err && err != IN_PROGRESS) {
1412 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1413 printf("Card did not respond to voltage select!\n");
1414 #endif
1415 return UNUSABLE_ERR;
1416 }
1417 }
1418
1419 if (err == IN_PROGRESS)
1420 mmc->init_in_progress = 1;
1421
1422 return err;
1423 }
1424
1425 static int mmc_complete_init(struct mmc *mmc)
1426 {
1427 int err = 0;
1428
1429 if (mmc->op_cond_pending)
1430 err = mmc_complete_op_cond(mmc);
1431
1432 if (!err)
1433 err = mmc_startup(mmc);
1434 if (err)
1435 mmc->has_init = 0;
1436 else
1437 mmc->has_init = 1;
1438 mmc->init_in_progress = 0;
1439 return err;
1440 }
1441
1442 int mmc_init(struct mmc *mmc)
1443 {
1444 int err = IN_PROGRESS;
1445 unsigned start;
1446
1447 if (mmc->has_init)
1448 return 0;
1449
1450 start = get_timer(0);
1451
1452 if (!mmc->init_in_progress)
1453 err = mmc_start_init(mmc);
1454
1455 if (!err || err == IN_PROGRESS)
1456 err = mmc_complete_init(mmc);
1457 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1458 return err;
1459 }
1460
1461 int mmc_set_dsr(struct mmc *mmc, u16 val)
1462 {
1463 mmc->dsr = val;
1464 return 0;
1465 }
1466
1467 /* CPU-specific MMC initializations */
1468 __weak int cpu_mmc_init(bd_t *bis)
1469 {
1470 return -1;
1471 }
1472
1473 /* board-specific MMC initializations. */
1474 __weak int board_mmc_init(bd_t *bis)
1475 {
1476 return -1;
1477 }
1478
1479 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1480
1481 void print_mmc_devices(char separator)
1482 {
1483 struct mmc *m;
1484 struct list_head *entry;
1485
1486 list_for_each(entry, &mmc_devices) {
1487 m = list_entry(entry, struct mmc, link);
1488
1489 printf("%s: %d", m->cfg->name, m->block_dev.dev);
1490
1491 if (entry->next != &mmc_devices) {
1492 printf("%c", separator);
1493 if (separator != '\n')
1494 puts (" ");
1495 }
1496 }
1497
1498 printf("\n");
1499 }
1500
1501 #else
1502 void print_mmc_devices(char separator) { }
1503 #endif
1504
1505 int get_mmc_num(void)
1506 {
1507 return cur_dev_num;
1508 }
1509
1510 void mmc_set_preinit(struct mmc *mmc, int preinit)
1511 {
1512 mmc->preinit = preinit;
1513 }
1514
1515 static void do_preinit(void)
1516 {
1517 struct mmc *m;
1518 struct list_head *entry;
1519
1520 list_for_each(entry, &mmc_devices) {
1521 m = list_entry(entry, struct mmc, link);
1522
1523 if (m->preinit)
1524 mmc_start_init(m);
1525 }
1526 }
1527
1528
1529 int mmc_initialize(bd_t *bis)
1530 {
1531 INIT_LIST_HEAD (&mmc_devices);
1532 cur_dev_num = 0;
1533
1534 if (board_mmc_init(bis) < 0)
1535 cpu_mmc_init(bis);
1536
1537 #ifndef CONFIG_SPL_BUILD
1538 print_mmc_devices(',');
1539 #endif
1540
1541 do_preinit();
1542 return 0;
1543 }
1544
1545 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1546 /*
1547 * This function changes the size of boot partition and the size of rpmb
1548 * partition present on EMMC devices.
1549 *
1550 * Input Parameters:
1551 * struct *mmc: pointer for the mmc device strcuture
1552 * bootsize: size of boot partition
1553 * rpmbsize: size of rpmb partition
1554 *
1555 * Returns 0 on success.
1556 */
1557
1558 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1559 unsigned long rpmbsize)
1560 {
1561 int err;
1562 struct mmc_cmd cmd;
1563
1564 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1565 cmd.cmdidx = MMC_CMD_RES_MAN;
1566 cmd.resp_type = MMC_RSP_R1b;
1567 cmd.cmdarg = MMC_CMD62_ARG1;
1568
1569 err = mmc_send_cmd(mmc, &cmd, NULL);
1570 if (err) {
1571 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1572 return err;
1573 }
1574
1575 /* Boot partition changing mode */
1576 cmd.cmdidx = MMC_CMD_RES_MAN;
1577 cmd.resp_type = MMC_RSP_R1b;
1578 cmd.cmdarg = MMC_CMD62_ARG2;
1579
1580 err = mmc_send_cmd(mmc, &cmd, NULL);
1581 if (err) {
1582 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1583 return err;
1584 }
1585 /* boot partition size is multiple of 128KB */
1586 bootsize = (bootsize * 1024) / 128;
1587
1588 /* Arg: boot partition size */
1589 cmd.cmdidx = MMC_CMD_RES_MAN;
1590 cmd.resp_type = MMC_RSP_R1b;
1591 cmd.cmdarg = bootsize;
1592
1593 err = mmc_send_cmd(mmc, &cmd, NULL);
1594 if (err) {
1595 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1596 return err;
1597 }
1598 /* RPMB partition size is multiple of 128KB */
1599 rpmbsize = (rpmbsize * 1024) / 128;
1600 /* Arg: RPMB partition size */
1601 cmd.cmdidx = MMC_CMD_RES_MAN;
1602 cmd.resp_type = MMC_RSP_R1b;
1603 cmd.cmdarg = rpmbsize;
1604
1605 err = mmc_send_cmd(mmc, &cmd, NULL);
1606 if (err) {
1607 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1608 return err;
1609 }
1610 return 0;
1611 }
1612
1613 /*
1614 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1615 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1616 * and BOOT_MODE.
1617 *
1618 * Returns 0 on success.
1619 */
1620 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1621 {
1622 int err;
1623
1624 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1625 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1626 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1627 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1628
1629 if (err)
1630 return err;
1631 return 0;
1632 }
1633
1634 /*
1635 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1636 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1637 * PARTITION_ACCESS.
1638 *
1639 * Returns 0 on success.
1640 */
1641 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1642 {
1643 int err;
1644
1645 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1646 EXT_CSD_BOOT_ACK(ack) |
1647 EXT_CSD_BOOT_PART_NUM(part_num) |
1648 EXT_CSD_PARTITION_ACCESS(access));
1649
1650 if (err)
1651 return err;
1652 return 0;
1653 }
1654
1655 /*
1656 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1657 * for enable. Note that this is a write-once field for non-zero values.
1658 *
1659 * Returns 0 on success.
1660 */
1661 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1662 {
1663 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1664 enable);
1665 }
1666 #endif