]> git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/mmc/mmc.c
Merge branch 'buildman' of git://git.denx.de/u-boot-x86
[people/ms/u-boot.git] / drivers / mmc / mmc.c
1 /*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #include <config.h>
11 #include <common.h>
12 #include <command.h>
13 #include <errno.h>
14 #include <mmc.h>
15 #include <part.h>
16 #include <malloc.h>
17 #include <linux/list.h>
18 #include <div64.h>
19 #include "mmc_private.h"
20
21 static struct list_head mmc_devices;
22 static int cur_dev_num = -1;
23
24 __weak int board_mmc_getwp(struct mmc *mmc)
25 {
26 return -1;
27 }
28
29 int mmc_getwp(struct mmc *mmc)
30 {
31 int wp;
32
33 wp = board_mmc_getwp(mmc);
34
35 if (wp < 0) {
36 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
38 else
39 wp = 0;
40 }
41
42 return wp;
43 }
44
45 __weak int board_mmc_getcd(struct mmc *mmc)
46 {
47 return -1;
48 }
49
50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
51 {
52 int ret;
53
54 #ifdef CONFIG_MMC_TRACE
55 int i;
56 u8 *ptr;
57
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
61 switch (cmd->resp_type) {
62 case MMC_RSP_NONE:
63 printf("\t\tMMC_RSP_NONE\n");
64 break;
65 case MMC_RSP_R1:
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
67 cmd->response[0]);
68 break;
69 case MMC_RSP_R1b:
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R2:
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
75 cmd->response[0]);
76 printf("\t\t \t\t 0x%08X \n",
77 cmd->response[1]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[2]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[3]);
82 printf("\n");
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
85 int j;
86 printf("\t\t\t\t\t%03d - ", i*4);
87 ptr = (u8 *)&cmd->response[i];
88 ptr += 3;
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
91 printf("\n");
92 }
93 break;
94 case MMC_RSP_R3:
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 default:
99 printf("\t\tERROR MMC rsp not supported\n");
100 break;
101 }
102 #else
103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
104 #endif
105 return ret;
106 }
107
108 int mmc_send_status(struct mmc *mmc, int timeout)
109 {
110 struct mmc_cmd cmd;
111 int err, retries = 5;
112 #ifdef CONFIG_MMC_TRACE
113 int status;
114 #endif
115
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
120
121 do {
122 err = mmc_send_cmd(mmc, &cmd, NULL);
123 if (!err) {
124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
125 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
126 MMC_STATE_PRG)
127 break;
128 else if (cmd.response[0] & MMC_STATUS_MASK) {
129 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
130 printf("Status Error: 0x%08X\n",
131 cmd.response[0]);
132 #endif
133 return COMM_ERR;
134 }
135 } else if (--retries < 0)
136 return err;
137
138 udelay(1000);
139
140 } while (timeout--);
141
142 #ifdef CONFIG_MMC_TRACE
143 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
144 printf("CURR STATE:%d\n", status);
145 #endif
146 if (timeout <= 0) {
147 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
148 printf("Timeout waiting card ready\n");
149 #endif
150 return TIMEOUT;
151 }
152 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
153 return SWITCH_ERR;
154
155 return 0;
156 }
157
158 int mmc_set_blocklen(struct mmc *mmc, int len)
159 {
160 struct mmc_cmd cmd;
161
162 if (mmc->ddr_mode)
163 return 0;
164
165 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
166 cmd.resp_type = MMC_RSP_R1;
167 cmd.cmdarg = len;
168
169 return mmc_send_cmd(mmc, &cmd, NULL);
170 }
171
172 struct mmc *find_mmc_device(int dev_num)
173 {
174 struct mmc *m;
175 struct list_head *entry;
176
177 list_for_each(entry, &mmc_devices) {
178 m = list_entry(entry, struct mmc, link);
179
180 if (m->block_dev.dev == dev_num)
181 return m;
182 }
183
184 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
185 printf("MMC Device %d not found\n", dev_num);
186 #endif
187
188 return NULL;
189 }
190
191 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
192 lbaint_t blkcnt)
193 {
194 struct mmc_cmd cmd;
195 struct mmc_data data;
196
197 if (blkcnt > 1)
198 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
199 else
200 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
201
202 if (mmc->high_capacity)
203 cmd.cmdarg = start;
204 else
205 cmd.cmdarg = start * mmc->read_bl_len;
206
207 cmd.resp_type = MMC_RSP_R1;
208
209 data.dest = dst;
210 data.blocks = blkcnt;
211 data.blocksize = mmc->read_bl_len;
212 data.flags = MMC_DATA_READ;
213
214 if (mmc_send_cmd(mmc, &cmd, &data))
215 return 0;
216
217 if (blkcnt > 1) {
218 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
219 cmd.cmdarg = 0;
220 cmd.resp_type = MMC_RSP_R1b;
221 if (mmc_send_cmd(mmc, &cmd, NULL)) {
222 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
223 printf("mmc fail to send stop cmd\n");
224 #endif
225 return 0;
226 }
227 }
228
229 return blkcnt;
230 }
231
232 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
233 {
234 lbaint_t cur, blocks_todo = blkcnt;
235
236 if (blkcnt == 0)
237 return 0;
238
239 struct mmc *mmc = find_mmc_device(dev_num);
240 if (!mmc)
241 return 0;
242
243 if ((start + blkcnt) > mmc->block_dev.lba) {
244 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
246 start + blkcnt, mmc->block_dev.lba);
247 #endif
248 return 0;
249 }
250
251 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
252 return 0;
253
254 do {
255 cur = (blocks_todo > mmc->cfg->b_max) ?
256 mmc->cfg->b_max : blocks_todo;
257 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
258 return 0;
259 blocks_todo -= cur;
260 start += cur;
261 dst += cur * mmc->read_bl_len;
262 } while (blocks_todo > 0);
263
264 return blkcnt;
265 }
266
267 static int mmc_go_idle(struct mmc *mmc)
268 {
269 struct mmc_cmd cmd;
270 int err;
271
272 udelay(1000);
273
274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
275 cmd.cmdarg = 0;
276 cmd.resp_type = MMC_RSP_NONE;
277
278 err = mmc_send_cmd(mmc, &cmd, NULL);
279
280 if (err)
281 return err;
282
283 udelay(2000);
284
285 return 0;
286 }
287
288 static int sd_send_op_cond(struct mmc *mmc)
289 {
290 int timeout = 1000;
291 int err;
292 struct mmc_cmd cmd;
293
294 do {
295 cmd.cmdidx = MMC_CMD_APP_CMD;
296 cmd.resp_type = MMC_RSP_R1;
297 cmd.cmdarg = 0;
298
299 err = mmc_send_cmd(mmc, &cmd, NULL);
300
301 if (err)
302 return err;
303
304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
305 cmd.resp_type = MMC_RSP_R3;
306
307 /*
308 * Most cards do not answer if some reserved bits
309 * in the ocr are set. However, Some controller
310 * can set bit 7 (reserved for low voltages), but
311 * how to manage low voltages SD card is not yet
312 * specified.
313 */
314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
315 (mmc->cfg->voltages & 0xff8000);
316
317 if (mmc->version == SD_VERSION_2)
318 cmd.cmdarg |= OCR_HCS;
319
320 err = mmc_send_cmd(mmc, &cmd, NULL);
321
322 if (err)
323 return err;
324
325 udelay(1000);
326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
327
328 if (timeout <= 0)
329 return UNUSABLE_ERR;
330
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
333
334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
337 cmd.cmdarg = 0;
338
339 err = mmc_send_cmd(mmc, &cmd, NULL);
340
341 if (err)
342 return err;
343 }
344
345 mmc->ocr = cmd.response[0];
346
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
348 mmc->rca = 0;
349
350 return 0;
351 }
352
353 /* We pass in the cmd since otherwise the init seems to fail */
354 static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
355 int use_arg)
356 {
357 int err;
358
359 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd->resp_type = MMC_RSP_R3;
361 cmd->cmdarg = 0;
362 if (use_arg && !mmc_host_is_spi(mmc)) {
363 cmd->cmdarg =
364 (mmc->cfg->voltages &
365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
366 (mmc->op_cond_response & OCR_ACCESS_MODE);
367
368 if (mmc->cfg->host_caps & MMC_MODE_HC)
369 cmd->cmdarg |= OCR_HCS;
370 }
371 err = mmc_send_cmd(mmc, cmd, NULL);
372 if (err)
373 return err;
374 mmc->op_cond_response = cmd->response[0];
375 return 0;
376 }
377
378 static int mmc_send_op_cond(struct mmc *mmc)
379 {
380 struct mmc_cmd cmd;
381 int err, i;
382
383 /* Some cards seem to need this */
384 mmc_go_idle(mmc);
385
386 /* Asking to the card its capabilities */
387 mmc->op_cond_pending = 1;
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
390 if (err)
391 return err;
392
393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->op_cond_response & OCR_BUSY)
395 return 0;
396 }
397 return IN_PROGRESS;
398 }
399
400 static int mmc_complete_op_cond(struct mmc *mmc)
401 {
402 struct mmc_cmd cmd;
403 int timeout = 1000;
404 uint start;
405 int err;
406
407 mmc->op_cond_pending = 0;
408 start = get_timer(0);
409 do {
410 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
411 if (err)
412 return err;
413 if (get_timer(start) > timeout)
414 return UNUSABLE_ERR;
415 udelay(100);
416 } while (!(mmc->op_cond_response & OCR_BUSY));
417
418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
421 cmd.cmdarg = 0;
422
423 err = mmc_send_cmd(mmc, &cmd, NULL);
424
425 if (err)
426 return err;
427 }
428
429 mmc->version = MMC_VERSION_UNKNOWN;
430 mmc->ocr = cmd.response[0];
431
432 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
433 mmc->rca = 1;
434
435 return 0;
436 }
437
438
439 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
440 {
441 struct mmc_cmd cmd;
442 struct mmc_data data;
443 int err;
444
445 /* Get the Card Status Register */
446 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
447 cmd.resp_type = MMC_RSP_R1;
448 cmd.cmdarg = 0;
449
450 data.dest = (char *)ext_csd;
451 data.blocks = 1;
452 data.blocksize = MMC_MAX_BLOCK_LEN;
453 data.flags = MMC_DATA_READ;
454
455 err = mmc_send_cmd(mmc, &cmd, &data);
456
457 return err;
458 }
459
460
461 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
462 {
463 struct mmc_cmd cmd;
464 int timeout = 1000;
465 int ret;
466
467 cmd.cmdidx = MMC_CMD_SWITCH;
468 cmd.resp_type = MMC_RSP_R1b;
469 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
470 (index << 16) |
471 (value << 8);
472
473 ret = mmc_send_cmd(mmc, &cmd, NULL);
474
475 /* Waiting for the ready status */
476 if (!ret)
477 ret = mmc_send_status(mmc, timeout);
478
479 return ret;
480
481 }
482
483 static int mmc_change_freq(struct mmc *mmc)
484 {
485 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
486 char cardtype;
487 int err;
488
489 mmc->card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
490
491 if (mmc_host_is_spi(mmc))
492 return 0;
493
494 /* Only version 4 supports high-speed */
495 if (mmc->version < MMC_VERSION_4)
496 return 0;
497
498 err = mmc_send_ext_csd(mmc, ext_csd);
499
500 if (err)
501 return err;
502
503 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
504
505 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
506
507 if (err)
508 return err == SWITCH_ERR ? 0 : err;
509
510 /* Now check to see that it worked */
511 err = mmc_send_ext_csd(mmc, ext_csd);
512
513 if (err)
514 return err;
515
516 /* No high-speed support */
517 if (!ext_csd[EXT_CSD_HS_TIMING])
518 return 0;
519
520 /* High Speed is set, there are two types: 52MHz and 26MHz */
521 if (cardtype & EXT_CSD_CARD_TYPE_52) {
522 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
523 mmc->card_caps |= MMC_MODE_DDR_52MHz;
524 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
525 } else {
526 mmc->card_caps |= MMC_MODE_HS;
527 }
528
529 return 0;
530 }
531
532 static int mmc_set_capacity(struct mmc *mmc, int part_num)
533 {
534 switch (part_num) {
535 case 0:
536 mmc->capacity = mmc->capacity_user;
537 break;
538 case 1:
539 case 2:
540 mmc->capacity = mmc->capacity_boot;
541 break;
542 case 3:
543 mmc->capacity = mmc->capacity_rpmb;
544 break;
545 case 4:
546 case 5:
547 case 6:
548 case 7:
549 mmc->capacity = mmc->capacity_gp[part_num - 4];
550 break;
551 default:
552 return -1;
553 }
554
555 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
556
557 return 0;
558 }
559
560 int mmc_select_hwpart(int dev_num, int hwpart)
561 {
562 struct mmc *mmc = find_mmc_device(dev_num);
563 int ret;
564
565 if (!mmc)
566 return -ENODEV;
567
568 if (mmc->part_num == hwpart)
569 return 0;
570
571 if (mmc->part_config == MMCPART_NOAVAILABLE) {
572 printf("Card doesn't support part_switch\n");
573 return -EMEDIUMTYPE;
574 }
575
576 ret = mmc_switch_part(dev_num, hwpart);
577 if (ret)
578 return ret;
579
580 mmc->part_num = hwpart;
581
582 return 0;
583 }
584
585
586 int mmc_switch_part(int dev_num, unsigned int part_num)
587 {
588 struct mmc *mmc = find_mmc_device(dev_num);
589 int ret;
590
591 if (!mmc)
592 return -1;
593
594 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
595 (mmc->part_config & ~PART_ACCESS_MASK)
596 | (part_num & PART_ACCESS_MASK));
597
598 /*
599 * Set the capacity if the switch succeeded or was intended
600 * to return to representing the raw device.
601 */
602 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
603 ret = mmc_set_capacity(mmc, part_num);
604
605 return ret;
606 }
607
608 int mmc_getcd(struct mmc *mmc)
609 {
610 int cd;
611
612 cd = board_mmc_getcd(mmc);
613
614 if (cd < 0) {
615 if (mmc->cfg->ops->getcd)
616 cd = mmc->cfg->ops->getcd(mmc);
617 else
618 cd = 1;
619 }
620
621 return cd;
622 }
623
624 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
625 {
626 struct mmc_cmd cmd;
627 struct mmc_data data;
628
629 /* Switch the frequency */
630 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
631 cmd.resp_type = MMC_RSP_R1;
632 cmd.cmdarg = (mode << 31) | 0xffffff;
633 cmd.cmdarg &= ~(0xf << (group * 4));
634 cmd.cmdarg |= value << (group * 4);
635
636 data.dest = (char *)resp;
637 data.blocksize = 64;
638 data.blocks = 1;
639 data.flags = MMC_DATA_READ;
640
641 return mmc_send_cmd(mmc, &cmd, &data);
642 }
643
644
645 static int sd_change_freq(struct mmc *mmc)
646 {
647 int err;
648 struct mmc_cmd cmd;
649 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
650 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
651 struct mmc_data data;
652 int timeout;
653
654 mmc->card_caps = 0;
655
656 if (mmc_host_is_spi(mmc))
657 return 0;
658
659 /* Read the SCR to find out if this card supports higher speeds */
660 cmd.cmdidx = MMC_CMD_APP_CMD;
661 cmd.resp_type = MMC_RSP_R1;
662 cmd.cmdarg = mmc->rca << 16;
663
664 err = mmc_send_cmd(mmc, &cmd, NULL);
665
666 if (err)
667 return err;
668
669 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
670 cmd.resp_type = MMC_RSP_R1;
671 cmd.cmdarg = 0;
672
673 timeout = 3;
674
675 retry_scr:
676 data.dest = (char *)scr;
677 data.blocksize = 8;
678 data.blocks = 1;
679 data.flags = MMC_DATA_READ;
680
681 err = mmc_send_cmd(mmc, &cmd, &data);
682
683 if (err) {
684 if (timeout--)
685 goto retry_scr;
686
687 return err;
688 }
689
690 mmc->scr[0] = __be32_to_cpu(scr[0]);
691 mmc->scr[1] = __be32_to_cpu(scr[1]);
692
693 switch ((mmc->scr[0] >> 24) & 0xf) {
694 case 0:
695 mmc->version = SD_VERSION_1_0;
696 break;
697 case 1:
698 mmc->version = SD_VERSION_1_10;
699 break;
700 case 2:
701 mmc->version = SD_VERSION_2;
702 if ((mmc->scr[0] >> 15) & 0x1)
703 mmc->version = SD_VERSION_3;
704 break;
705 default:
706 mmc->version = SD_VERSION_1_0;
707 break;
708 }
709
710 if (mmc->scr[0] & SD_DATA_4BIT)
711 mmc->card_caps |= MMC_MODE_4BIT;
712
713 /* Version 1.0 doesn't support switching */
714 if (mmc->version == SD_VERSION_1_0)
715 return 0;
716
717 timeout = 4;
718 while (timeout--) {
719 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
720 (u8 *)switch_status);
721
722 if (err)
723 return err;
724
725 /* The high-speed function is busy. Try again */
726 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
727 break;
728 }
729
730 /* If high-speed isn't supported, we return */
731 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
732 return 0;
733
734 /*
735 * If the host doesn't support SD_HIGHSPEED, do not switch card to
736 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
737 * This can avoid furthur problem when the card runs in different
738 * mode between the host.
739 */
740 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
741 (mmc->cfg->host_caps & MMC_MODE_HS)))
742 return 0;
743
744 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
745
746 if (err)
747 return err;
748
749 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
750 mmc->card_caps |= MMC_MODE_HS;
751
752 return 0;
753 }
754
755 /* frequency bases */
756 /* divided by 10 to be nice to platforms without floating point */
757 static const int fbase[] = {
758 10000,
759 100000,
760 1000000,
761 10000000,
762 };
763
764 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
765 * to platforms without floating point.
766 */
767 static const int multipliers[] = {
768 0, /* reserved */
769 10,
770 12,
771 13,
772 15,
773 20,
774 25,
775 30,
776 35,
777 40,
778 45,
779 50,
780 55,
781 60,
782 70,
783 80,
784 };
785
786 static void mmc_set_ios(struct mmc *mmc)
787 {
788 if (mmc->cfg->ops->set_ios)
789 mmc->cfg->ops->set_ios(mmc);
790 }
791
792 void mmc_set_clock(struct mmc *mmc, uint clock)
793 {
794 if (clock > mmc->cfg->f_max)
795 clock = mmc->cfg->f_max;
796
797 if (clock < mmc->cfg->f_min)
798 clock = mmc->cfg->f_min;
799
800 mmc->clock = clock;
801
802 mmc_set_ios(mmc);
803 }
804
805 static void mmc_set_bus_width(struct mmc *mmc, uint width)
806 {
807 mmc->bus_width = width;
808
809 mmc_set_ios(mmc);
810 }
811
812 static int mmc_startup(struct mmc *mmc)
813 {
814 int err, i;
815 uint mult, freq;
816 u64 cmult, csize, capacity;
817 struct mmc_cmd cmd;
818 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
819 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
820 int timeout = 1000;
821
822 #ifdef CONFIG_MMC_SPI_CRC_ON
823 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
824 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
825 cmd.resp_type = MMC_RSP_R1;
826 cmd.cmdarg = 1;
827 err = mmc_send_cmd(mmc, &cmd, NULL);
828
829 if (err)
830 return err;
831 }
832 #endif
833
834 /* Put the Card in Identify Mode */
835 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
836 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
837 cmd.resp_type = MMC_RSP_R2;
838 cmd.cmdarg = 0;
839
840 err = mmc_send_cmd(mmc, &cmd, NULL);
841
842 if (err)
843 return err;
844
845 memcpy(mmc->cid, cmd.response, 16);
846
847 /*
848 * For MMC cards, set the Relative Address.
849 * For SD cards, get the Relatvie Address.
850 * This also puts the cards into Standby State
851 */
852 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
853 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
854 cmd.cmdarg = mmc->rca << 16;
855 cmd.resp_type = MMC_RSP_R6;
856
857 err = mmc_send_cmd(mmc, &cmd, NULL);
858
859 if (err)
860 return err;
861
862 if (IS_SD(mmc))
863 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
864 }
865
866 /* Get the Card-Specific Data */
867 cmd.cmdidx = MMC_CMD_SEND_CSD;
868 cmd.resp_type = MMC_RSP_R2;
869 cmd.cmdarg = mmc->rca << 16;
870
871 err = mmc_send_cmd(mmc, &cmd, NULL);
872
873 /* Waiting for the ready status */
874 mmc_send_status(mmc, timeout);
875
876 if (err)
877 return err;
878
879 mmc->csd[0] = cmd.response[0];
880 mmc->csd[1] = cmd.response[1];
881 mmc->csd[2] = cmd.response[2];
882 mmc->csd[3] = cmd.response[3];
883
884 if (mmc->version == MMC_VERSION_UNKNOWN) {
885 int version = (cmd.response[0] >> 26) & 0xf;
886
887 switch (version) {
888 case 0:
889 mmc->version = MMC_VERSION_1_2;
890 break;
891 case 1:
892 mmc->version = MMC_VERSION_1_4;
893 break;
894 case 2:
895 mmc->version = MMC_VERSION_2_2;
896 break;
897 case 3:
898 mmc->version = MMC_VERSION_3;
899 break;
900 case 4:
901 mmc->version = MMC_VERSION_4;
902 break;
903 default:
904 mmc->version = MMC_VERSION_1_2;
905 break;
906 }
907 }
908
909 /* divide frequency by 10, since the mults are 10x bigger */
910 freq = fbase[(cmd.response[0] & 0x7)];
911 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
912
913 mmc->tran_speed = freq * mult;
914
915 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
916 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
917
918 if (IS_SD(mmc))
919 mmc->write_bl_len = mmc->read_bl_len;
920 else
921 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
922
923 if (mmc->high_capacity) {
924 csize = (mmc->csd[1] & 0x3f) << 16
925 | (mmc->csd[2] & 0xffff0000) >> 16;
926 cmult = 8;
927 } else {
928 csize = (mmc->csd[1] & 0x3ff) << 2
929 | (mmc->csd[2] & 0xc0000000) >> 30;
930 cmult = (mmc->csd[2] & 0x00038000) >> 15;
931 }
932
933 mmc->capacity_user = (csize + 1) << (cmult + 2);
934 mmc->capacity_user *= mmc->read_bl_len;
935 mmc->capacity_boot = 0;
936 mmc->capacity_rpmb = 0;
937 for (i = 0; i < 4; i++)
938 mmc->capacity_gp[i] = 0;
939
940 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
941 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
942
943 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
944 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
945
946 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
947 cmd.cmdidx = MMC_CMD_SET_DSR;
948 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
949 cmd.resp_type = MMC_RSP_NONE;
950 if (mmc_send_cmd(mmc, &cmd, NULL))
951 printf("MMC: SET_DSR failed\n");
952 }
953
954 /* Select the card, and put it into Transfer Mode */
955 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
956 cmd.cmdidx = MMC_CMD_SELECT_CARD;
957 cmd.resp_type = MMC_RSP_R1;
958 cmd.cmdarg = mmc->rca << 16;
959 err = mmc_send_cmd(mmc, &cmd, NULL);
960
961 if (err)
962 return err;
963 }
964
965 /*
966 * For SD, its erase group is always one sector
967 */
968 mmc->erase_grp_size = 1;
969 mmc->part_config = MMCPART_NOAVAILABLE;
970 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
971 /* check ext_csd version and capacity */
972 err = mmc_send_ext_csd(mmc, ext_csd);
973 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
974 /*
975 * According to the JEDEC Standard, the value of
976 * ext_csd's capacity is valid if the value is more
977 * than 2GB
978 */
979 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
980 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
981 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
982 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
983 capacity *= MMC_MAX_BLOCK_LEN;
984 if ((capacity >> 20) > 2 * 1024)
985 mmc->capacity_user = capacity;
986 }
987
988 switch (ext_csd[EXT_CSD_REV]) {
989 case 1:
990 mmc->version = MMC_VERSION_4_1;
991 break;
992 case 2:
993 mmc->version = MMC_VERSION_4_2;
994 break;
995 case 3:
996 mmc->version = MMC_VERSION_4_3;
997 break;
998 case 5:
999 mmc->version = MMC_VERSION_4_41;
1000 break;
1001 case 6:
1002 mmc->version = MMC_VERSION_4_5;
1003 break;
1004 case 7:
1005 mmc->version = MMC_VERSION_5_0;
1006 break;
1007 }
1008
1009 /*
1010 * Host needs to enable ERASE_GRP_DEF bit if device is
1011 * partitioned. This bit will be lost every time after a reset
1012 * or power off. This will affect erase size.
1013 */
1014 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1015 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) {
1016 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1017 EXT_CSD_ERASE_GROUP_DEF, 1);
1018
1019 if (err)
1020 return err;
1021 else
1022 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1023
1024 /* Read out group size from ext_csd */
1025 mmc->erase_grp_size =
1026 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1027 MMC_MAX_BLOCK_LEN * 1024;
1028 /*
1029 * if high capacity and partition setting completed
1030 * SEC_COUNT is valid even if it is smaller than 2 GiB
1031 * JEDEC Standard JESD84-B45, 6.2.4
1032 */
1033 if (mmc->high_capacity &&
1034 (ext_csd[EXT_CSD_PARTITION_SETTING] &
1035 EXT_CSD_PARTITION_SETTING_COMPLETED)) {
1036 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1037 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1038 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1039 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1040 capacity *= MMC_MAX_BLOCK_LEN;
1041 mmc->capacity_user = capacity;
1042 }
1043 } else {
1044 /* Calculate the group size from the csd value. */
1045 int erase_gsz, erase_gmul;
1046 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1047 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1048 mmc->erase_grp_size = (erase_gsz + 1)
1049 * (erase_gmul + 1);
1050 }
1051
1052 /* store the partition info of emmc */
1053 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1054 ext_csd[EXT_CSD_BOOT_MULT])
1055 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1056
1057 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1058
1059 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1060
1061 for (i = 0; i < 4; i++) {
1062 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1063 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1064 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1065 mmc->capacity_gp[i] *=
1066 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1067 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1068 }
1069 }
1070
1071 err = mmc_set_capacity(mmc, mmc->part_num);
1072 if (err)
1073 return err;
1074
1075 if (IS_SD(mmc))
1076 err = sd_change_freq(mmc);
1077 else
1078 err = mmc_change_freq(mmc);
1079
1080 if (err)
1081 return err;
1082
1083 /* Restrict card's capabilities by what the host can do */
1084 mmc->card_caps &= mmc->cfg->host_caps;
1085
1086 if (IS_SD(mmc)) {
1087 if (mmc->card_caps & MMC_MODE_4BIT) {
1088 cmd.cmdidx = MMC_CMD_APP_CMD;
1089 cmd.resp_type = MMC_RSP_R1;
1090 cmd.cmdarg = mmc->rca << 16;
1091
1092 err = mmc_send_cmd(mmc, &cmd, NULL);
1093 if (err)
1094 return err;
1095
1096 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1097 cmd.resp_type = MMC_RSP_R1;
1098 cmd.cmdarg = 2;
1099 err = mmc_send_cmd(mmc, &cmd, NULL);
1100 if (err)
1101 return err;
1102
1103 mmc_set_bus_width(mmc, 4);
1104 }
1105
1106 if (mmc->card_caps & MMC_MODE_HS)
1107 mmc->tran_speed = 50000000;
1108 else
1109 mmc->tran_speed = 25000000;
1110 } else {
1111 int idx;
1112
1113 /* An array of possible bus widths in order of preference */
1114 static unsigned ext_csd_bits[] = {
1115 EXT_CSD_DDR_BUS_WIDTH_8,
1116 EXT_CSD_DDR_BUS_WIDTH_4,
1117 EXT_CSD_BUS_WIDTH_8,
1118 EXT_CSD_BUS_WIDTH_4,
1119 EXT_CSD_BUS_WIDTH_1,
1120 };
1121
1122 /* An array to map CSD bus widths to host cap bits */
1123 static unsigned ext_to_hostcaps[] = {
1124 [EXT_CSD_DDR_BUS_WIDTH_4] =
1125 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1126 [EXT_CSD_DDR_BUS_WIDTH_8] =
1127 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1128 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1129 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1130 };
1131
1132 /* An array to map chosen bus width to an integer */
1133 static unsigned widths[] = {
1134 8, 4, 8, 4, 1,
1135 };
1136
1137 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1138 unsigned int extw = ext_csd_bits[idx];
1139 unsigned int caps = ext_to_hostcaps[extw];
1140
1141 /*
1142 * Check to make sure the card and controller support
1143 * these capabilities
1144 */
1145 if ((mmc->card_caps & caps) != caps)
1146 continue;
1147
1148 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1149 EXT_CSD_BUS_WIDTH, extw);
1150
1151 if (err)
1152 continue;
1153
1154 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1155 mmc_set_bus_width(mmc, widths[idx]);
1156
1157 err = mmc_send_ext_csd(mmc, test_csd);
1158
1159 if (err)
1160 continue;
1161
1162 /* Only compare read only fields */
1163 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1164 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1165 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1166 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1167 ext_csd[EXT_CSD_REV]
1168 == test_csd[EXT_CSD_REV] &&
1169 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1170 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1171 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1172 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1173 break;
1174 else
1175 err = SWITCH_ERR;
1176 }
1177
1178 if (err)
1179 return err;
1180
1181 if (mmc->card_caps & MMC_MODE_HS) {
1182 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1183 mmc->tran_speed = 52000000;
1184 else
1185 mmc->tran_speed = 26000000;
1186 }
1187 }
1188
1189 mmc_set_clock(mmc, mmc->tran_speed);
1190
1191 /* Fix the block length for DDR mode */
1192 if (mmc->ddr_mode) {
1193 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1194 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1195 }
1196
1197 /* fill in device description */
1198 mmc->block_dev.lun = 0;
1199 mmc->block_dev.type = 0;
1200 mmc->block_dev.blksz = mmc->read_bl_len;
1201 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1202 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1203 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1204 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1205 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1206 (mmc->cid[3] >> 16) & 0xffff);
1207 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1208 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1209 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1210 (mmc->cid[2] >> 24) & 0xff);
1211 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1212 (mmc->cid[2] >> 16) & 0xf);
1213 #else
1214 mmc->block_dev.vendor[0] = 0;
1215 mmc->block_dev.product[0] = 0;
1216 mmc->block_dev.revision[0] = 0;
1217 #endif
1218 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1219 init_part(&mmc->block_dev);
1220 #endif
1221
1222 return 0;
1223 }
1224
1225 static int mmc_send_if_cond(struct mmc *mmc)
1226 {
1227 struct mmc_cmd cmd;
1228 int err;
1229
1230 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1231 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1232 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1233 cmd.resp_type = MMC_RSP_R7;
1234
1235 err = mmc_send_cmd(mmc, &cmd, NULL);
1236
1237 if (err)
1238 return err;
1239
1240 if ((cmd.response[0] & 0xff) != 0xaa)
1241 return UNUSABLE_ERR;
1242 else
1243 mmc->version = SD_VERSION_2;
1244
1245 return 0;
1246 }
1247
1248 /* not used any more */
1249 int __deprecated mmc_register(struct mmc *mmc)
1250 {
1251 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1252 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1253 #endif
1254 return -1;
1255 }
1256
1257 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1258 {
1259 struct mmc *mmc;
1260
1261 /* quick validation */
1262 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1263 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1264 return NULL;
1265
1266 mmc = calloc(1, sizeof(*mmc));
1267 if (mmc == NULL)
1268 return NULL;
1269
1270 mmc->cfg = cfg;
1271 mmc->priv = priv;
1272
1273 /* the following chunk was mmc_register() */
1274
1275 /* Setup dsr related values */
1276 mmc->dsr_imp = 0;
1277 mmc->dsr = 0xffffffff;
1278 /* Setup the universal parts of the block interface just once */
1279 mmc->block_dev.if_type = IF_TYPE_MMC;
1280 mmc->block_dev.dev = cur_dev_num++;
1281 mmc->block_dev.removable = 1;
1282 mmc->block_dev.block_read = mmc_bread;
1283 mmc->block_dev.block_write = mmc_bwrite;
1284 mmc->block_dev.block_erase = mmc_berase;
1285
1286 /* setup initial part type */
1287 mmc->block_dev.part_type = mmc->cfg->part_type;
1288
1289 INIT_LIST_HEAD(&mmc->link);
1290
1291 list_add_tail(&mmc->link, &mmc_devices);
1292
1293 return mmc;
1294 }
1295
1296 void mmc_destroy(struct mmc *mmc)
1297 {
1298 /* only freeing memory for now */
1299 free(mmc);
1300 }
1301
1302 #ifdef CONFIG_PARTITIONS
1303 block_dev_desc_t *mmc_get_dev(int dev)
1304 {
1305 struct mmc *mmc = find_mmc_device(dev);
1306 if (!mmc || mmc_init(mmc))
1307 return NULL;
1308
1309 return &mmc->block_dev;
1310 }
1311 #endif
1312
1313 /* board-specific MMC power initializations. */
1314 __weak void board_mmc_power_init(void)
1315 {
1316 }
1317
1318 int mmc_start_init(struct mmc *mmc)
1319 {
1320 int err;
1321
1322 /* we pretend there's no card when init is NULL */
1323 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1324 mmc->has_init = 0;
1325 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1326 printf("MMC: no card present\n");
1327 #endif
1328 return NO_CARD_ERR;
1329 }
1330
1331 if (mmc->has_init)
1332 return 0;
1333
1334 board_mmc_power_init();
1335
1336 /* made sure it's not NULL earlier */
1337 err = mmc->cfg->ops->init(mmc);
1338
1339 if (err)
1340 return err;
1341
1342 mmc->ddr_mode = 0;
1343 mmc_set_bus_width(mmc, 1);
1344 mmc_set_clock(mmc, 1);
1345
1346 /* Reset the Card */
1347 err = mmc_go_idle(mmc);
1348
1349 if (err)
1350 return err;
1351
1352 /* The internal partition reset to user partition(0) at every CMD0*/
1353 mmc->part_num = 0;
1354
1355 /* Test for SD version 2 */
1356 err = mmc_send_if_cond(mmc);
1357
1358 /* Now try to get the SD card's operating condition */
1359 err = sd_send_op_cond(mmc);
1360
1361 /* If the command timed out, we check for an MMC card */
1362 if (err == TIMEOUT) {
1363 err = mmc_send_op_cond(mmc);
1364
1365 if (err && err != IN_PROGRESS) {
1366 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1367 printf("Card did not respond to voltage select!\n");
1368 #endif
1369 return UNUSABLE_ERR;
1370 }
1371 }
1372
1373 if (err == IN_PROGRESS)
1374 mmc->init_in_progress = 1;
1375
1376 return err;
1377 }
1378
1379 static int mmc_complete_init(struct mmc *mmc)
1380 {
1381 int err = 0;
1382
1383 if (mmc->op_cond_pending)
1384 err = mmc_complete_op_cond(mmc);
1385
1386 if (!err)
1387 err = mmc_startup(mmc);
1388 if (err)
1389 mmc->has_init = 0;
1390 else
1391 mmc->has_init = 1;
1392 mmc->init_in_progress = 0;
1393 return err;
1394 }
1395
1396 int mmc_init(struct mmc *mmc)
1397 {
1398 int err = IN_PROGRESS;
1399 unsigned start;
1400
1401 if (mmc->has_init)
1402 return 0;
1403
1404 start = get_timer(0);
1405
1406 if (!mmc->init_in_progress)
1407 err = mmc_start_init(mmc);
1408
1409 if (!err || err == IN_PROGRESS)
1410 err = mmc_complete_init(mmc);
1411 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1412 return err;
1413 }
1414
1415 int mmc_set_dsr(struct mmc *mmc, u16 val)
1416 {
1417 mmc->dsr = val;
1418 return 0;
1419 }
1420
1421 /* CPU-specific MMC initializations */
1422 __weak int cpu_mmc_init(bd_t *bis)
1423 {
1424 return -1;
1425 }
1426
1427 /* board-specific MMC initializations. */
1428 __weak int board_mmc_init(bd_t *bis)
1429 {
1430 return -1;
1431 }
1432
1433 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1434
1435 void print_mmc_devices(char separator)
1436 {
1437 struct mmc *m;
1438 struct list_head *entry;
1439
1440 list_for_each(entry, &mmc_devices) {
1441 m = list_entry(entry, struct mmc, link);
1442
1443 printf("%s: %d", m->cfg->name, m->block_dev.dev);
1444
1445 if (entry->next != &mmc_devices) {
1446 printf("%c", separator);
1447 if (separator != '\n')
1448 puts (" ");
1449 }
1450 }
1451
1452 printf("\n");
1453 }
1454
1455 #else
1456 void print_mmc_devices(char separator) { }
1457 #endif
1458
1459 int get_mmc_num(void)
1460 {
1461 return cur_dev_num;
1462 }
1463
1464 void mmc_set_preinit(struct mmc *mmc, int preinit)
1465 {
1466 mmc->preinit = preinit;
1467 }
1468
1469 static void do_preinit(void)
1470 {
1471 struct mmc *m;
1472 struct list_head *entry;
1473
1474 list_for_each(entry, &mmc_devices) {
1475 m = list_entry(entry, struct mmc, link);
1476
1477 if (m->preinit)
1478 mmc_start_init(m);
1479 }
1480 }
1481
1482
1483 int mmc_initialize(bd_t *bis)
1484 {
1485 INIT_LIST_HEAD (&mmc_devices);
1486 cur_dev_num = 0;
1487
1488 if (board_mmc_init(bis) < 0)
1489 cpu_mmc_init(bis);
1490
1491 #ifndef CONFIG_SPL_BUILD
1492 print_mmc_devices(',');
1493 #endif
1494
1495 do_preinit();
1496 return 0;
1497 }
1498
1499 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1500 /*
1501 * This function changes the size of boot partition and the size of rpmb
1502 * partition present on EMMC devices.
1503 *
1504 * Input Parameters:
1505 * struct *mmc: pointer for the mmc device strcuture
1506 * bootsize: size of boot partition
1507 * rpmbsize: size of rpmb partition
1508 *
1509 * Returns 0 on success.
1510 */
1511
1512 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1513 unsigned long rpmbsize)
1514 {
1515 int err;
1516 struct mmc_cmd cmd;
1517
1518 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1519 cmd.cmdidx = MMC_CMD_RES_MAN;
1520 cmd.resp_type = MMC_RSP_R1b;
1521 cmd.cmdarg = MMC_CMD62_ARG1;
1522
1523 err = mmc_send_cmd(mmc, &cmd, NULL);
1524 if (err) {
1525 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1526 return err;
1527 }
1528
1529 /* Boot partition changing mode */
1530 cmd.cmdidx = MMC_CMD_RES_MAN;
1531 cmd.resp_type = MMC_RSP_R1b;
1532 cmd.cmdarg = MMC_CMD62_ARG2;
1533
1534 err = mmc_send_cmd(mmc, &cmd, NULL);
1535 if (err) {
1536 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1537 return err;
1538 }
1539 /* boot partition size is multiple of 128KB */
1540 bootsize = (bootsize * 1024) / 128;
1541
1542 /* Arg: boot partition size */
1543 cmd.cmdidx = MMC_CMD_RES_MAN;
1544 cmd.resp_type = MMC_RSP_R1b;
1545 cmd.cmdarg = bootsize;
1546
1547 err = mmc_send_cmd(mmc, &cmd, NULL);
1548 if (err) {
1549 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1550 return err;
1551 }
1552 /* RPMB partition size is multiple of 128KB */
1553 rpmbsize = (rpmbsize * 1024) / 128;
1554 /* Arg: RPMB partition size */
1555 cmd.cmdidx = MMC_CMD_RES_MAN;
1556 cmd.resp_type = MMC_RSP_R1b;
1557 cmd.cmdarg = rpmbsize;
1558
1559 err = mmc_send_cmd(mmc, &cmd, NULL);
1560 if (err) {
1561 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1562 return err;
1563 }
1564 return 0;
1565 }
1566
1567 /*
1568 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1569 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1570 * and BOOT_MODE.
1571 *
1572 * Returns 0 on success.
1573 */
1574 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1575 {
1576 int err;
1577
1578 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1579 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1580 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1581 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1582
1583 if (err)
1584 return err;
1585 return 0;
1586 }
1587
1588 /*
1589 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1590 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1591 * PARTITION_ACCESS.
1592 *
1593 * Returns 0 on success.
1594 */
1595 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1596 {
1597 int err;
1598
1599 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1600 EXT_CSD_BOOT_ACK(ack) |
1601 EXT_CSD_BOOT_PART_NUM(part_num) |
1602 EXT_CSD_PARTITION_ACCESS(access));
1603
1604 if (err)
1605 return err;
1606 return 0;
1607 }
1608
1609 /*
1610 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1611 * for enable. Note that this is a write-once field for non-zero values.
1612 *
1613 * Returns 0 on success.
1614 */
1615 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1616 {
1617 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1618 enable);
1619 }
1620 #endif