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Fix typo choosen in comments and printf logs
[people/ms/u-boot.git] / drivers / mmc / mmc.c
1 /*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #include <config.h>
11 #include <common.h>
12 #include <command.h>
13 #include <dm.h>
14 #include <dm/device-internal.h>
15 #include <errno.h>
16 #include <mmc.h>
17 #include <part.h>
18 #include <malloc.h>
19 #include <memalign.h>
20 #include <linux/list.h>
21 #include <div64.h>
22 #include "mmc_private.h"
23
24 static struct list_head mmc_devices;
25 static int cur_dev_num = -1;
26
27 __weak int board_mmc_getwp(struct mmc *mmc)
28 {
29 return -1;
30 }
31
32 int mmc_getwp(struct mmc *mmc)
33 {
34 int wp;
35
36 wp = board_mmc_getwp(mmc);
37
38 if (wp < 0) {
39 if (mmc->cfg->ops->getwp)
40 wp = mmc->cfg->ops->getwp(mmc);
41 else
42 wp = 0;
43 }
44
45 return wp;
46 }
47
48 __weak int board_mmc_getcd(struct mmc *mmc)
49 {
50 return -1;
51 }
52
53 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
54 {
55 int ret;
56
57 #ifdef CONFIG_MMC_TRACE
58 int i;
59 u8 *ptr;
60
61 printf("CMD_SEND:%d\n", cmd->cmdidx);
62 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
63 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
64 switch (cmd->resp_type) {
65 case MMC_RSP_NONE:
66 printf("\t\tMMC_RSP_NONE\n");
67 break;
68 case MMC_RSP_R1:
69 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
70 cmd->response[0]);
71 break;
72 case MMC_RSP_R1b:
73 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
74 cmd->response[0]);
75 break;
76 case MMC_RSP_R2:
77 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
78 cmd->response[0]);
79 printf("\t\t \t\t 0x%08X \n",
80 cmd->response[1]);
81 printf("\t\t \t\t 0x%08X \n",
82 cmd->response[2]);
83 printf("\t\t \t\t 0x%08X \n",
84 cmd->response[3]);
85 printf("\n");
86 printf("\t\t\t\t\tDUMPING DATA\n");
87 for (i = 0; i < 4; i++) {
88 int j;
89 printf("\t\t\t\t\t%03d - ", i*4);
90 ptr = (u8 *)&cmd->response[i];
91 ptr += 3;
92 for (j = 0; j < 4; j++)
93 printf("%02X ", *ptr--);
94 printf("\n");
95 }
96 break;
97 case MMC_RSP_R3:
98 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
99 cmd->response[0]);
100 break;
101 default:
102 printf("\t\tERROR MMC rsp not supported\n");
103 break;
104 }
105 #else
106 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
107 #endif
108 return ret;
109 }
110
111 int mmc_send_status(struct mmc *mmc, int timeout)
112 {
113 struct mmc_cmd cmd;
114 int err, retries = 5;
115 #ifdef CONFIG_MMC_TRACE
116 int status;
117 #endif
118
119 cmd.cmdidx = MMC_CMD_SEND_STATUS;
120 cmd.resp_type = MMC_RSP_R1;
121 if (!mmc_host_is_spi(mmc))
122 cmd.cmdarg = mmc->rca << 16;
123
124 while (1) {
125 err = mmc_send_cmd(mmc, &cmd, NULL);
126 if (!err) {
127 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
128 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
129 MMC_STATE_PRG)
130 break;
131 else if (cmd.response[0] & MMC_STATUS_MASK) {
132 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
133 printf("Status Error: 0x%08X\n",
134 cmd.response[0]);
135 #endif
136 return COMM_ERR;
137 }
138 } else if (--retries < 0)
139 return err;
140
141 if (timeout-- <= 0)
142 break;
143
144 udelay(1000);
145 }
146
147 #ifdef CONFIG_MMC_TRACE
148 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
149 printf("CURR STATE:%d\n", status);
150 #endif
151 if (timeout <= 0) {
152 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
153 printf("Timeout waiting card ready\n");
154 #endif
155 return TIMEOUT;
156 }
157 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
158 return SWITCH_ERR;
159
160 return 0;
161 }
162
163 int mmc_set_blocklen(struct mmc *mmc, int len)
164 {
165 struct mmc_cmd cmd;
166
167 if (mmc->ddr_mode)
168 return 0;
169
170 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
171 cmd.resp_type = MMC_RSP_R1;
172 cmd.cmdarg = len;
173
174 return mmc_send_cmd(mmc, &cmd, NULL);
175 }
176
177 struct mmc *find_mmc_device(int dev_num)
178 {
179 struct mmc *m;
180 struct list_head *entry;
181
182 list_for_each(entry, &mmc_devices) {
183 m = list_entry(entry, struct mmc, link);
184
185 if (m->block_dev.devnum == dev_num)
186 return m;
187 }
188
189 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
190 printf("MMC Device %d not found\n", dev_num);
191 #endif
192
193 return NULL;
194 }
195
196 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
197 lbaint_t blkcnt)
198 {
199 struct mmc_cmd cmd;
200 struct mmc_data data;
201
202 if (blkcnt > 1)
203 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
204 else
205 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
206
207 if (mmc->high_capacity)
208 cmd.cmdarg = start;
209 else
210 cmd.cmdarg = start * mmc->read_bl_len;
211
212 cmd.resp_type = MMC_RSP_R1;
213
214 data.dest = dst;
215 data.blocks = blkcnt;
216 data.blocksize = mmc->read_bl_len;
217 data.flags = MMC_DATA_READ;
218
219 if (mmc_send_cmd(mmc, &cmd, &data))
220 return 0;
221
222 if (blkcnt > 1) {
223 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
224 cmd.cmdarg = 0;
225 cmd.resp_type = MMC_RSP_R1b;
226 if (mmc_send_cmd(mmc, &cmd, NULL)) {
227 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
228 printf("mmc fail to send stop cmd\n");
229 #endif
230 return 0;
231 }
232 }
233
234 return blkcnt;
235 }
236
237 static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
238 lbaint_t blkcnt, void *dst)
239 {
240 int dev_num = block_dev->devnum;
241 int err;
242 lbaint_t cur, blocks_todo = blkcnt;
243
244 if (blkcnt == 0)
245 return 0;
246
247 struct mmc *mmc = find_mmc_device(dev_num);
248 if (!mmc)
249 return 0;
250
251 err = mmc_select_hwpart(dev_num, block_dev->hwpart);
252 if (err < 0)
253 return 0;
254
255 if ((start + blkcnt) > mmc->block_dev.lba) {
256 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
257 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
258 start + blkcnt, mmc->block_dev.lba);
259 #endif
260 return 0;
261 }
262
263 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
264 debug("%s: Failed to set blocklen\n", __func__);
265 return 0;
266 }
267
268 do {
269 cur = (blocks_todo > mmc->cfg->b_max) ?
270 mmc->cfg->b_max : blocks_todo;
271 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
272 debug("%s: Failed to read blocks\n", __func__);
273 return 0;
274 }
275 blocks_todo -= cur;
276 start += cur;
277 dst += cur * mmc->read_bl_len;
278 } while (blocks_todo > 0);
279
280 return blkcnt;
281 }
282
283 static int mmc_go_idle(struct mmc *mmc)
284 {
285 struct mmc_cmd cmd;
286 int err;
287
288 udelay(1000);
289
290 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
291 cmd.cmdarg = 0;
292 cmd.resp_type = MMC_RSP_NONE;
293
294 err = mmc_send_cmd(mmc, &cmd, NULL);
295
296 if (err)
297 return err;
298
299 udelay(2000);
300
301 return 0;
302 }
303
304 static int sd_send_op_cond(struct mmc *mmc)
305 {
306 int timeout = 1000;
307 int err;
308 struct mmc_cmd cmd;
309
310 while (1) {
311 cmd.cmdidx = MMC_CMD_APP_CMD;
312 cmd.resp_type = MMC_RSP_R1;
313 cmd.cmdarg = 0;
314
315 err = mmc_send_cmd(mmc, &cmd, NULL);
316
317 if (err)
318 return err;
319
320 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
321 cmd.resp_type = MMC_RSP_R3;
322
323 /*
324 * Most cards do not answer if some reserved bits
325 * in the ocr are set. However, Some controller
326 * can set bit 7 (reserved for low voltages), but
327 * how to manage low voltages SD card is not yet
328 * specified.
329 */
330 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
331 (mmc->cfg->voltages & 0xff8000);
332
333 if (mmc->version == SD_VERSION_2)
334 cmd.cmdarg |= OCR_HCS;
335
336 err = mmc_send_cmd(mmc, &cmd, NULL);
337
338 if (err)
339 return err;
340
341 if (cmd.response[0] & OCR_BUSY)
342 break;
343
344 if (timeout-- <= 0)
345 return UNUSABLE_ERR;
346
347 udelay(1000);
348 }
349
350 if (mmc->version != SD_VERSION_2)
351 mmc->version = SD_VERSION_1_0;
352
353 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
354 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
355 cmd.resp_type = MMC_RSP_R3;
356 cmd.cmdarg = 0;
357
358 err = mmc_send_cmd(mmc, &cmd, NULL);
359
360 if (err)
361 return err;
362 }
363
364 mmc->ocr = cmd.response[0];
365
366 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
367 mmc->rca = 0;
368
369 return 0;
370 }
371
372 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
373 {
374 struct mmc_cmd cmd;
375 int err;
376
377 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
378 cmd.resp_type = MMC_RSP_R3;
379 cmd.cmdarg = 0;
380 if (use_arg && !mmc_host_is_spi(mmc))
381 cmd.cmdarg = OCR_HCS |
382 (mmc->cfg->voltages &
383 (mmc->ocr & OCR_VOLTAGE_MASK)) |
384 (mmc->ocr & OCR_ACCESS_MODE);
385
386 err = mmc_send_cmd(mmc, &cmd, NULL);
387 if (err)
388 return err;
389 mmc->ocr = cmd.response[0];
390 return 0;
391 }
392
393 static int mmc_send_op_cond(struct mmc *mmc)
394 {
395 int err, i;
396
397 /* Some cards seem to need this */
398 mmc_go_idle(mmc);
399
400 /* Asking to the card its capabilities */
401 for (i = 0; i < 2; i++) {
402 err = mmc_send_op_cond_iter(mmc, i != 0);
403 if (err)
404 return err;
405
406 /* exit if not busy (flag seems to be inverted) */
407 if (mmc->ocr & OCR_BUSY)
408 break;
409 }
410 mmc->op_cond_pending = 1;
411 return 0;
412 }
413
414 static int mmc_complete_op_cond(struct mmc *mmc)
415 {
416 struct mmc_cmd cmd;
417 int timeout = 1000;
418 uint start;
419 int err;
420
421 mmc->op_cond_pending = 0;
422 if (!(mmc->ocr & OCR_BUSY)) {
423 start = get_timer(0);
424 while (1) {
425 err = mmc_send_op_cond_iter(mmc, 1);
426 if (err)
427 return err;
428 if (mmc->ocr & OCR_BUSY)
429 break;
430 if (get_timer(start) > timeout)
431 return UNUSABLE_ERR;
432 udelay(100);
433 }
434 }
435
436 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
437 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
438 cmd.resp_type = MMC_RSP_R3;
439 cmd.cmdarg = 0;
440
441 err = mmc_send_cmd(mmc, &cmd, NULL);
442
443 if (err)
444 return err;
445
446 mmc->ocr = cmd.response[0];
447 }
448
449 mmc->version = MMC_VERSION_UNKNOWN;
450
451 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
452 mmc->rca = 1;
453
454 return 0;
455 }
456
457
458 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
459 {
460 struct mmc_cmd cmd;
461 struct mmc_data data;
462 int err;
463
464 /* Get the Card Status Register */
465 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
466 cmd.resp_type = MMC_RSP_R1;
467 cmd.cmdarg = 0;
468
469 data.dest = (char *)ext_csd;
470 data.blocks = 1;
471 data.blocksize = MMC_MAX_BLOCK_LEN;
472 data.flags = MMC_DATA_READ;
473
474 err = mmc_send_cmd(mmc, &cmd, &data);
475
476 return err;
477 }
478
479
480 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
481 {
482 struct mmc_cmd cmd;
483 int timeout = 1000;
484 int ret;
485
486 cmd.cmdidx = MMC_CMD_SWITCH;
487 cmd.resp_type = MMC_RSP_R1b;
488 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
489 (index << 16) |
490 (value << 8);
491
492 ret = mmc_send_cmd(mmc, &cmd, NULL);
493
494 /* Waiting for the ready status */
495 if (!ret)
496 ret = mmc_send_status(mmc, timeout);
497
498 return ret;
499
500 }
501
502 static int mmc_change_freq(struct mmc *mmc)
503 {
504 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
505 char cardtype;
506 int err;
507
508 mmc->card_caps = 0;
509
510 if (mmc_host_is_spi(mmc))
511 return 0;
512
513 /* Only version 4 supports high-speed */
514 if (mmc->version < MMC_VERSION_4)
515 return 0;
516
517 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
518
519 err = mmc_send_ext_csd(mmc, ext_csd);
520
521 if (err)
522 return err;
523
524 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
525
526 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
527
528 if (err)
529 return err == SWITCH_ERR ? 0 : err;
530
531 /* Now check to see that it worked */
532 err = mmc_send_ext_csd(mmc, ext_csd);
533
534 if (err)
535 return err;
536
537 /* No high-speed support */
538 if (!ext_csd[EXT_CSD_HS_TIMING])
539 return 0;
540
541 /* High Speed is set, there are two types: 52MHz and 26MHz */
542 if (cardtype & EXT_CSD_CARD_TYPE_52) {
543 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
544 mmc->card_caps |= MMC_MODE_DDR_52MHz;
545 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
546 } else {
547 mmc->card_caps |= MMC_MODE_HS;
548 }
549
550 return 0;
551 }
552
553 static int mmc_set_capacity(struct mmc *mmc, int part_num)
554 {
555 switch (part_num) {
556 case 0:
557 mmc->capacity = mmc->capacity_user;
558 break;
559 case 1:
560 case 2:
561 mmc->capacity = mmc->capacity_boot;
562 break;
563 case 3:
564 mmc->capacity = mmc->capacity_rpmb;
565 break;
566 case 4:
567 case 5:
568 case 6:
569 case 7:
570 mmc->capacity = mmc->capacity_gp[part_num - 4];
571 break;
572 default:
573 return -1;
574 }
575
576 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
577
578 return 0;
579 }
580
581 int mmc_select_hwpart(int dev_num, int hwpart)
582 {
583 struct mmc *mmc = find_mmc_device(dev_num);
584 int ret;
585
586 if (!mmc)
587 return -ENODEV;
588
589 if (mmc->block_dev.hwpart == hwpart)
590 return 0;
591
592 if (mmc->part_config == MMCPART_NOAVAILABLE) {
593 printf("Card doesn't support part_switch\n");
594 return -EMEDIUMTYPE;
595 }
596
597 ret = mmc_switch_part(dev_num, hwpart);
598 if (ret)
599 return ret;
600
601 return 0;
602 }
603
604
605 int mmc_switch_part(int dev_num, unsigned int part_num)
606 {
607 struct mmc *mmc = find_mmc_device(dev_num);
608 int ret;
609
610 if (!mmc)
611 return -1;
612
613 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
614 (mmc->part_config & ~PART_ACCESS_MASK)
615 | (part_num & PART_ACCESS_MASK));
616
617 /*
618 * Set the capacity if the switch succeeded or was intended
619 * to return to representing the raw device.
620 */
621 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
622 ret = mmc_set_capacity(mmc, part_num);
623 mmc->block_dev.hwpart = part_num;
624 }
625
626 return ret;
627 }
628
629 int mmc_hwpart_config(struct mmc *mmc,
630 const struct mmc_hwpart_conf *conf,
631 enum mmc_hwpart_conf_mode mode)
632 {
633 u8 part_attrs = 0;
634 u32 enh_size_mult;
635 u32 enh_start_addr;
636 u32 gp_size_mult[4];
637 u32 max_enh_size_mult;
638 u32 tot_enh_size_mult = 0;
639 u8 wr_rel_set;
640 int i, pidx, err;
641 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
642
643 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
644 return -EINVAL;
645
646 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
647 printf("eMMC >= 4.4 required for enhanced user data area\n");
648 return -EMEDIUMTYPE;
649 }
650
651 if (!(mmc->part_support & PART_SUPPORT)) {
652 printf("Card does not support partitioning\n");
653 return -EMEDIUMTYPE;
654 }
655
656 if (!mmc->hc_wp_grp_size) {
657 printf("Card does not define HC WP group size\n");
658 return -EMEDIUMTYPE;
659 }
660
661 /* check partition alignment and total enhanced size */
662 if (conf->user.enh_size) {
663 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
664 conf->user.enh_start % mmc->hc_wp_grp_size) {
665 printf("User data enhanced area not HC WP group "
666 "size aligned\n");
667 return -EINVAL;
668 }
669 part_attrs |= EXT_CSD_ENH_USR;
670 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
671 if (mmc->high_capacity) {
672 enh_start_addr = conf->user.enh_start;
673 } else {
674 enh_start_addr = (conf->user.enh_start << 9);
675 }
676 } else {
677 enh_size_mult = 0;
678 enh_start_addr = 0;
679 }
680 tot_enh_size_mult += enh_size_mult;
681
682 for (pidx = 0; pidx < 4; pidx++) {
683 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
684 printf("GP%i partition not HC WP group size "
685 "aligned\n", pidx+1);
686 return -EINVAL;
687 }
688 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
689 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
690 part_attrs |= EXT_CSD_ENH_GP(pidx);
691 tot_enh_size_mult += gp_size_mult[pidx];
692 }
693 }
694
695 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
696 printf("Card does not support enhanced attribute\n");
697 return -EMEDIUMTYPE;
698 }
699
700 err = mmc_send_ext_csd(mmc, ext_csd);
701 if (err)
702 return err;
703
704 max_enh_size_mult =
705 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
706 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
707 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
708 if (tot_enh_size_mult > max_enh_size_mult) {
709 printf("Total enhanced size exceeds maximum (%u > %u)\n",
710 tot_enh_size_mult, max_enh_size_mult);
711 return -EMEDIUMTYPE;
712 }
713
714 /* The default value of EXT_CSD_WR_REL_SET is device
715 * dependent, the values can only be changed if the
716 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
717 * changed only once and before partitioning is completed. */
718 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
719 if (conf->user.wr_rel_change) {
720 if (conf->user.wr_rel_set)
721 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
722 else
723 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
724 }
725 for (pidx = 0; pidx < 4; pidx++) {
726 if (conf->gp_part[pidx].wr_rel_change) {
727 if (conf->gp_part[pidx].wr_rel_set)
728 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
729 else
730 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
731 }
732 }
733
734 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
735 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
736 puts("Card does not support host controlled partition write "
737 "reliability settings\n");
738 return -EMEDIUMTYPE;
739 }
740
741 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
742 EXT_CSD_PARTITION_SETTING_COMPLETED) {
743 printf("Card already partitioned\n");
744 return -EPERM;
745 }
746
747 if (mode == MMC_HWPART_CONF_CHECK)
748 return 0;
749
750 /* Partitioning requires high-capacity size definitions */
751 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
752 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
753 EXT_CSD_ERASE_GROUP_DEF, 1);
754
755 if (err)
756 return err;
757
758 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
759
760 /* update erase group size to be high-capacity */
761 mmc->erase_grp_size =
762 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
763
764 }
765
766 /* all OK, write the configuration */
767 for (i = 0; i < 4; i++) {
768 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
769 EXT_CSD_ENH_START_ADDR+i,
770 (enh_start_addr >> (i*8)) & 0xFF);
771 if (err)
772 return err;
773 }
774 for (i = 0; i < 3; i++) {
775 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
776 EXT_CSD_ENH_SIZE_MULT+i,
777 (enh_size_mult >> (i*8)) & 0xFF);
778 if (err)
779 return err;
780 }
781 for (pidx = 0; pidx < 4; pidx++) {
782 for (i = 0; i < 3; i++) {
783 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
784 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
785 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
786 if (err)
787 return err;
788 }
789 }
790 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
791 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
792 if (err)
793 return err;
794
795 if (mode == MMC_HWPART_CONF_SET)
796 return 0;
797
798 /* The WR_REL_SET is a write-once register but shall be
799 * written before setting PART_SETTING_COMPLETED. As it is
800 * write-once we can only write it when completing the
801 * partitioning. */
802 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
803 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
804 EXT_CSD_WR_REL_SET, wr_rel_set);
805 if (err)
806 return err;
807 }
808
809 /* Setting PART_SETTING_COMPLETED confirms the partition
810 * configuration but it only becomes effective after power
811 * cycle, so we do not adjust the partition related settings
812 * in the mmc struct. */
813
814 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
815 EXT_CSD_PARTITION_SETTING,
816 EXT_CSD_PARTITION_SETTING_COMPLETED);
817 if (err)
818 return err;
819
820 return 0;
821 }
822
823 int mmc_getcd(struct mmc *mmc)
824 {
825 int cd;
826
827 cd = board_mmc_getcd(mmc);
828
829 if (cd < 0) {
830 if (mmc->cfg->ops->getcd)
831 cd = mmc->cfg->ops->getcd(mmc);
832 else
833 cd = 1;
834 }
835
836 return cd;
837 }
838
839 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
840 {
841 struct mmc_cmd cmd;
842 struct mmc_data data;
843
844 /* Switch the frequency */
845 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
846 cmd.resp_type = MMC_RSP_R1;
847 cmd.cmdarg = (mode << 31) | 0xffffff;
848 cmd.cmdarg &= ~(0xf << (group * 4));
849 cmd.cmdarg |= value << (group * 4);
850
851 data.dest = (char *)resp;
852 data.blocksize = 64;
853 data.blocks = 1;
854 data.flags = MMC_DATA_READ;
855
856 return mmc_send_cmd(mmc, &cmd, &data);
857 }
858
859
860 static int sd_change_freq(struct mmc *mmc)
861 {
862 int err;
863 struct mmc_cmd cmd;
864 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
865 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
866 struct mmc_data data;
867 int timeout;
868
869 mmc->card_caps = 0;
870
871 if (mmc_host_is_spi(mmc))
872 return 0;
873
874 /* Read the SCR to find out if this card supports higher speeds */
875 cmd.cmdidx = MMC_CMD_APP_CMD;
876 cmd.resp_type = MMC_RSP_R1;
877 cmd.cmdarg = mmc->rca << 16;
878
879 err = mmc_send_cmd(mmc, &cmd, NULL);
880
881 if (err)
882 return err;
883
884 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
885 cmd.resp_type = MMC_RSP_R1;
886 cmd.cmdarg = 0;
887
888 timeout = 3;
889
890 retry_scr:
891 data.dest = (char *)scr;
892 data.blocksize = 8;
893 data.blocks = 1;
894 data.flags = MMC_DATA_READ;
895
896 err = mmc_send_cmd(mmc, &cmd, &data);
897
898 if (err) {
899 if (timeout--)
900 goto retry_scr;
901
902 return err;
903 }
904
905 mmc->scr[0] = __be32_to_cpu(scr[0]);
906 mmc->scr[1] = __be32_to_cpu(scr[1]);
907
908 switch ((mmc->scr[0] >> 24) & 0xf) {
909 case 0:
910 mmc->version = SD_VERSION_1_0;
911 break;
912 case 1:
913 mmc->version = SD_VERSION_1_10;
914 break;
915 case 2:
916 mmc->version = SD_VERSION_2;
917 if ((mmc->scr[0] >> 15) & 0x1)
918 mmc->version = SD_VERSION_3;
919 break;
920 default:
921 mmc->version = SD_VERSION_1_0;
922 break;
923 }
924
925 if (mmc->scr[0] & SD_DATA_4BIT)
926 mmc->card_caps |= MMC_MODE_4BIT;
927
928 /* Version 1.0 doesn't support switching */
929 if (mmc->version == SD_VERSION_1_0)
930 return 0;
931
932 timeout = 4;
933 while (timeout--) {
934 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
935 (u8 *)switch_status);
936
937 if (err)
938 return err;
939
940 /* The high-speed function is busy. Try again */
941 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
942 break;
943 }
944
945 /* If high-speed isn't supported, we return */
946 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
947 return 0;
948
949 /*
950 * If the host doesn't support SD_HIGHSPEED, do not switch card to
951 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
952 * This can avoid furthur problem when the card runs in different
953 * mode between the host.
954 */
955 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
956 (mmc->cfg->host_caps & MMC_MODE_HS)))
957 return 0;
958
959 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
960
961 if (err)
962 return err;
963
964 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
965 mmc->card_caps |= MMC_MODE_HS;
966
967 return 0;
968 }
969
970 /* frequency bases */
971 /* divided by 10 to be nice to platforms without floating point */
972 static const int fbase[] = {
973 10000,
974 100000,
975 1000000,
976 10000000,
977 };
978
979 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
980 * to platforms without floating point.
981 */
982 static const int multipliers[] = {
983 0, /* reserved */
984 10,
985 12,
986 13,
987 15,
988 20,
989 25,
990 30,
991 35,
992 40,
993 45,
994 50,
995 55,
996 60,
997 70,
998 80,
999 };
1000
1001 static void mmc_set_ios(struct mmc *mmc)
1002 {
1003 if (mmc->cfg->ops->set_ios)
1004 mmc->cfg->ops->set_ios(mmc);
1005 }
1006
1007 void mmc_set_clock(struct mmc *mmc, uint clock)
1008 {
1009 if (clock > mmc->cfg->f_max)
1010 clock = mmc->cfg->f_max;
1011
1012 if (clock < mmc->cfg->f_min)
1013 clock = mmc->cfg->f_min;
1014
1015 mmc->clock = clock;
1016
1017 mmc_set_ios(mmc);
1018 }
1019
1020 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1021 {
1022 mmc->bus_width = width;
1023
1024 mmc_set_ios(mmc);
1025 }
1026
1027 static int mmc_startup(struct mmc *mmc)
1028 {
1029 int err, i;
1030 uint mult, freq;
1031 u64 cmult, csize, capacity;
1032 struct mmc_cmd cmd;
1033 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1034 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1035 int timeout = 1000;
1036 bool has_parts = false;
1037 bool part_completed;
1038
1039 #ifdef CONFIG_MMC_SPI_CRC_ON
1040 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1041 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1042 cmd.resp_type = MMC_RSP_R1;
1043 cmd.cmdarg = 1;
1044 err = mmc_send_cmd(mmc, &cmd, NULL);
1045
1046 if (err)
1047 return err;
1048 }
1049 #endif
1050
1051 /* Put the Card in Identify Mode */
1052 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1053 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1054 cmd.resp_type = MMC_RSP_R2;
1055 cmd.cmdarg = 0;
1056
1057 err = mmc_send_cmd(mmc, &cmd, NULL);
1058
1059 if (err)
1060 return err;
1061
1062 memcpy(mmc->cid, cmd.response, 16);
1063
1064 /*
1065 * For MMC cards, set the Relative Address.
1066 * For SD cards, get the Relatvie Address.
1067 * This also puts the cards into Standby State
1068 */
1069 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1070 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1071 cmd.cmdarg = mmc->rca << 16;
1072 cmd.resp_type = MMC_RSP_R6;
1073
1074 err = mmc_send_cmd(mmc, &cmd, NULL);
1075
1076 if (err)
1077 return err;
1078
1079 if (IS_SD(mmc))
1080 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1081 }
1082
1083 /* Get the Card-Specific Data */
1084 cmd.cmdidx = MMC_CMD_SEND_CSD;
1085 cmd.resp_type = MMC_RSP_R2;
1086 cmd.cmdarg = mmc->rca << 16;
1087
1088 err = mmc_send_cmd(mmc, &cmd, NULL);
1089
1090 /* Waiting for the ready status */
1091 mmc_send_status(mmc, timeout);
1092
1093 if (err)
1094 return err;
1095
1096 mmc->csd[0] = cmd.response[0];
1097 mmc->csd[1] = cmd.response[1];
1098 mmc->csd[2] = cmd.response[2];
1099 mmc->csd[3] = cmd.response[3];
1100
1101 if (mmc->version == MMC_VERSION_UNKNOWN) {
1102 int version = (cmd.response[0] >> 26) & 0xf;
1103
1104 switch (version) {
1105 case 0:
1106 mmc->version = MMC_VERSION_1_2;
1107 break;
1108 case 1:
1109 mmc->version = MMC_VERSION_1_4;
1110 break;
1111 case 2:
1112 mmc->version = MMC_VERSION_2_2;
1113 break;
1114 case 3:
1115 mmc->version = MMC_VERSION_3;
1116 break;
1117 case 4:
1118 mmc->version = MMC_VERSION_4;
1119 break;
1120 default:
1121 mmc->version = MMC_VERSION_1_2;
1122 break;
1123 }
1124 }
1125
1126 /* divide frequency by 10, since the mults are 10x bigger */
1127 freq = fbase[(cmd.response[0] & 0x7)];
1128 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1129
1130 mmc->tran_speed = freq * mult;
1131
1132 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1133 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1134
1135 if (IS_SD(mmc))
1136 mmc->write_bl_len = mmc->read_bl_len;
1137 else
1138 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1139
1140 if (mmc->high_capacity) {
1141 csize = (mmc->csd[1] & 0x3f) << 16
1142 | (mmc->csd[2] & 0xffff0000) >> 16;
1143 cmult = 8;
1144 } else {
1145 csize = (mmc->csd[1] & 0x3ff) << 2
1146 | (mmc->csd[2] & 0xc0000000) >> 30;
1147 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1148 }
1149
1150 mmc->capacity_user = (csize + 1) << (cmult + 2);
1151 mmc->capacity_user *= mmc->read_bl_len;
1152 mmc->capacity_boot = 0;
1153 mmc->capacity_rpmb = 0;
1154 for (i = 0; i < 4; i++)
1155 mmc->capacity_gp[i] = 0;
1156
1157 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1158 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1159
1160 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1161 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1162
1163 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1164 cmd.cmdidx = MMC_CMD_SET_DSR;
1165 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1166 cmd.resp_type = MMC_RSP_NONE;
1167 if (mmc_send_cmd(mmc, &cmd, NULL))
1168 printf("MMC: SET_DSR failed\n");
1169 }
1170
1171 /* Select the card, and put it into Transfer Mode */
1172 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1173 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1174 cmd.resp_type = MMC_RSP_R1;
1175 cmd.cmdarg = mmc->rca << 16;
1176 err = mmc_send_cmd(mmc, &cmd, NULL);
1177
1178 if (err)
1179 return err;
1180 }
1181
1182 /*
1183 * For SD, its erase group is always one sector
1184 */
1185 mmc->erase_grp_size = 1;
1186 mmc->part_config = MMCPART_NOAVAILABLE;
1187 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1188 /* check ext_csd version and capacity */
1189 err = mmc_send_ext_csd(mmc, ext_csd);
1190 if (err)
1191 return err;
1192 if (ext_csd[EXT_CSD_REV] >= 2) {
1193 /*
1194 * According to the JEDEC Standard, the value of
1195 * ext_csd's capacity is valid if the value is more
1196 * than 2GB
1197 */
1198 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1199 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1200 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1201 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1202 capacity *= MMC_MAX_BLOCK_LEN;
1203 if ((capacity >> 20) > 2 * 1024)
1204 mmc->capacity_user = capacity;
1205 }
1206
1207 switch (ext_csd[EXT_CSD_REV]) {
1208 case 1:
1209 mmc->version = MMC_VERSION_4_1;
1210 break;
1211 case 2:
1212 mmc->version = MMC_VERSION_4_2;
1213 break;
1214 case 3:
1215 mmc->version = MMC_VERSION_4_3;
1216 break;
1217 case 5:
1218 mmc->version = MMC_VERSION_4_41;
1219 break;
1220 case 6:
1221 mmc->version = MMC_VERSION_4_5;
1222 break;
1223 case 7:
1224 mmc->version = MMC_VERSION_5_0;
1225 break;
1226 }
1227
1228 /* The partition data may be non-zero but it is only
1229 * effective if PARTITION_SETTING_COMPLETED is set in
1230 * EXT_CSD, so ignore any data if this bit is not set,
1231 * except for enabling the high-capacity group size
1232 * definition (see below). */
1233 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1234 EXT_CSD_PARTITION_SETTING_COMPLETED);
1235
1236 /* store the partition info of emmc */
1237 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1238 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1239 ext_csd[EXT_CSD_BOOT_MULT])
1240 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1241 if (part_completed &&
1242 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1243 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1244
1245 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1246
1247 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1248
1249 for (i = 0; i < 4; i++) {
1250 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1251 uint mult = (ext_csd[idx + 2] << 16) +
1252 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1253 if (mult)
1254 has_parts = true;
1255 if (!part_completed)
1256 continue;
1257 mmc->capacity_gp[i] = mult;
1258 mmc->capacity_gp[i] *=
1259 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1260 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1261 mmc->capacity_gp[i] <<= 19;
1262 }
1263
1264 if (part_completed) {
1265 mmc->enh_user_size =
1266 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1267 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1268 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1269 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1270 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1271 mmc->enh_user_size <<= 19;
1272 mmc->enh_user_start =
1273 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1274 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1275 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1276 ext_csd[EXT_CSD_ENH_START_ADDR];
1277 if (mmc->high_capacity)
1278 mmc->enh_user_start <<= 9;
1279 }
1280
1281 /*
1282 * Host needs to enable ERASE_GRP_DEF bit if device is
1283 * partitioned. This bit will be lost every time after a reset
1284 * or power off. This will affect erase size.
1285 */
1286 if (part_completed)
1287 has_parts = true;
1288 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1289 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1290 has_parts = true;
1291 if (has_parts) {
1292 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1293 EXT_CSD_ERASE_GROUP_DEF, 1);
1294
1295 if (err)
1296 return err;
1297 else
1298 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1299 }
1300
1301 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1302 /* Read out group size from ext_csd */
1303 mmc->erase_grp_size =
1304 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1305 /*
1306 * if high capacity and partition setting completed
1307 * SEC_COUNT is valid even if it is smaller than 2 GiB
1308 * JEDEC Standard JESD84-B45, 6.2.4
1309 */
1310 if (mmc->high_capacity && part_completed) {
1311 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1312 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1313 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1314 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1315 capacity *= MMC_MAX_BLOCK_LEN;
1316 mmc->capacity_user = capacity;
1317 }
1318 } else {
1319 /* Calculate the group size from the csd value. */
1320 int erase_gsz, erase_gmul;
1321 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1322 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1323 mmc->erase_grp_size = (erase_gsz + 1)
1324 * (erase_gmul + 1);
1325 }
1326
1327 mmc->hc_wp_grp_size = 1024
1328 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1329 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1330
1331 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1332 }
1333
1334 err = mmc_set_capacity(mmc, mmc->block_dev.hwpart);
1335 if (err)
1336 return err;
1337
1338 if (IS_SD(mmc))
1339 err = sd_change_freq(mmc);
1340 else
1341 err = mmc_change_freq(mmc);
1342
1343 if (err)
1344 return err;
1345
1346 /* Restrict card's capabilities by what the host can do */
1347 mmc->card_caps &= mmc->cfg->host_caps;
1348
1349 if (IS_SD(mmc)) {
1350 if (mmc->card_caps & MMC_MODE_4BIT) {
1351 cmd.cmdidx = MMC_CMD_APP_CMD;
1352 cmd.resp_type = MMC_RSP_R1;
1353 cmd.cmdarg = mmc->rca << 16;
1354
1355 err = mmc_send_cmd(mmc, &cmd, NULL);
1356 if (err)
1357 return err;
1358
1359 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1360 cmd.resp_type = MMC_RSP_R1;
1361 cmd.cmdarg = 2;
1362 err = mmc_send_cmd(mmc, &cmd, NULL);
1363 if (err)
1364 return err;
1365
1366 mmc_set_bus_width(mmc, 4);
1367 }
1368
1369 if (mmc->card_caps & MMC_MODE_HS)
1370 mmc->tran_speed = 50000000;
1371 else
1372 mmc->tran_speed = 25000000;
1373 } else if (mmc->version >= MMC_VERSION_4) {
1374 /* Only version 4 of MMC supports wider bus widths */
1375 int idx;
1376
1377 /* An array of possible bus widths in order of preference */
1378 static unsigned ext_csd_bits[] = {
1379 EXT_CSD_DDR_BUS_WIDTH_8,
1380 EXT_CSD_DDR_BUS_WIDTH_4,
1381 EXT_CSD_BUS_WIDTH_8,
1382 EXT_CSD_BUS_WIDTH_4,
1383 EXT_CSD_BUS_WIDTH_1,
1384 };
1385
1386 /* An array to map CSD bus widths to host cap bits */
1387 static unsigned ext_to_hostcaps[] = {
1388 [EXT_CSD_DDR_BUS_WIDTH_4] =
1389 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1390 [EXT_CSD_DDR_BUS_WIDTH_8] =
1391 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1392 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1393 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1394 };
1395
1396 /* An array to map chosen bus width to an integer */
1397 static unsigned widths[] = {
1398 8, 4, 8, 4, 1,
1399 };
1400
1401 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1402 unsigned int extw = ext_csd_bits[idx];
1403 unsigned int caps = ext_to_hostcaps[extw];
1404
1405 /*
1406 * If the bus width is still not changed,
1407 * don't try to set the default again.
1408 * Otherwise, recover from switch attempts
1409 * by switching to 1-bit bus width.
1410 */
1411 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1412 mmc->bus_width == 1) {
1413 err = 0;
1414 break;
1415 }
1416
1417 /*
1418 * Check to make sure the card and controller support
1419 * these capabilities
1420 */
1421 if ((mmc->card_caps & caps) != caps)
1422 continue;
1423
1424 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1425 EXT_CSD_BUS_WIDTH, extw);
1426
1427 if (err)
1428 continue;
1429
1430 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1431 mmc_set_bus_width(mmc, widths[idx]);
1432
1433 err = mmc_send_ext_csd(mmc, test_csd);
1434
1435 if (err)
1436 continue;
1437
1438 /* Only compare read only fields */
1439 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1440 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1441 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1442 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1443 ext_csd[EXT_CSD_REV]
1444 == test_csd[EXT_CSD_REV] &&
1445 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1446 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1447 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1448 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1449 break;
1450 else
1451 err = SWITCH_ERR;
1452 }
1453
1454 if (err)
1455 return err;
1456
1457 if (mmc->card_caps & MMC_MODE_HS) {
1458 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1459 mmc->tran_speed = 52000000;
1460 else
1461 mmc->tran_speed = 26000000;
1462 }
1463 }
1464
1465 mmc_set_clock(mmc, mmc->tran_speed);
1466
1467 /* Fix the block length for DDR mode */
1468 if (mmc->ddr_mode) {
1469 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1470 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1471 }
1472
1473 /* fill in device description */
1474 mmc->block_dev.lun = 0;
1475 mmc->block_dev.hwpart = 0;
1476 mmc->block_dev.type = 0;
1477 mmc->block_dev.blksz = mmc->read_bl_len;
1478 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1479 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1480 #if !defined(CONFIG_SPL_BUILD) || \
1481 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1482 !defined(CONFIG_USE_TINY_PRINTF))
1483 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1484 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1485 (mmc->cid[3] >> 16) & 0xffff);
1486 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1487 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1488 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1489 (mmc->cid[2] >> 24) & 0xff);
1490 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1491 (mmc->cid[2] >> 16) & 0xf);
1492 #else
1493 mmc->block_dev.vendor[0] = 0;
1494 mmc->block_dev.product[0] = 0;
1495 mmc->block_dev.revision[0] = 0;
1496 #endif
1497 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1498 part_init(&mmc->block_dev);
1499 #endif
1500
1501 return 0;
1502 }
1503
1504 static int mmc_send_if_cond(struct mmc *mmc)
1505 {
1506 struct mmc_cmd cmd;
1507 int err;
1508
1509 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1510 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1511 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1512 cmd.resp_type = MMC_RSP_R7;
1513
1514 err = mmc_send_cmd(mmc, &cmd, NULL);
1515
1516 if (err)
1517 return err;
1518
1519 if ((cmd.response[0] & 0xff) != 0xaa)
1520 return UNUSABLE_ERR;
1521 else
1522 mmc->version = SD_VERSION_2;
1523
1524 return 0;
1525 }
1526
1527 /* not used any more */
1528 int __deprecated mmc_register(struct mmc *mmc)
1529 {
1530 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1531 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1532 #endif
1533 return -1;
1534 }
1535
1536 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1537 {
1538 struct mmc *mmc;
1539
1540 /* quick validation */
1541 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1542 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1543 return NULL;
1544
1545 mmc = calloc(1, sizeof(*mmc));
1546 if (mmc == NULL)
1547 return NULL;
1548
1549 mmc->cfg = cfg;
1550 mmc->priv = priv;
1551
1552 /* the following chunk was mmc_register() */
1553
1554 /* Setup dsr related values */
1555 mmc->dsr_imp = 0;
1556 mmc->dsr = 0xffffffff;
1557 /* Setup the universal parts of the block interface just once */
1558 mmc->block_dev.if_type = IF_TYPE_MMC;
1559 mmc->block_dev.devnum = cur_dev_num++;
1560 mmc->block_dev.removable = 1;
1561 mmc->block_dev.block_read = mmc_bread;
1562 mmc->block_dev.block_write = mmc_bwrite;
1563 mmc->block_dev.block_erase = mmc_berase;
1564
1565 /* setup initial part type */
1566 mmc->block_dev.part_type = mmc->cfg->part_type;
1567
1568 INIT_LIST_HEAD(&mmc->link);
1569
1570 list_add_tail(&mmc->link, &mmc_devices);
1571
1572 return mmc;
1573 }
1574
1575 void mmc_destroy(struct mmc *mmc)
1576 {
1577 /* only freeing memory for now */
1578 free(mmc);
1579 }
1580
1581 #ifdef CONFIG_PARTITIONS
1582 struct blk_desc *mmc_get_dev(int dev)
1583 {
1584 struct mmc *mmc = find_mmc_device(dev);
1585 if (!mmc || mmc_init(mmc))
1586 return NULL;
1587
1588 return &mmc->block_dev;
1589 }
1590 #endif
1591
1592 /* board-specific MMC power initializations. */
1593 __weak void board_mmc_power_init(void)
1594 {
1595 }
1596
1597 int mmc_start_init(struct mmc *mmc)
1598 {
1599 int err;
1600
1601 /* we pretend there's no card when init is NULL */
1602 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1603 mmc->has_init = 0;
1604 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1605 printf("MMC: no card present\n");
1606 #endif
1607 return NO_CARD_ERR;
1608 }
1609
1610 if (mmc->has_init)
1611 return 0;
1612
1613 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1614 mmc_adapter_card_type_ident();
1615 #endif
1616 board_mmc_power_init();
1617
1618 /* made sure it's not NULL earlier */
1619 err = mmc->cfg->ops->init(mmc);
1620
1621 if (err)
1622 return err;
1623
1624 mmc->ddr_mode = 0;
1625 mmc_set_bus_width(mmc, 1);
1626 mmc_set_clock(mmc, 1);
1627
1628 /* Reset the Card */
1629 err = mmc_go_idle(mmc);
1630
1631 if (err)
1632 return err;
1633
1634 /* The internal partition reset to user partition(0) at every CMD0*/
1635 mmc->block_dev.hwpart = 0;
1636
1637 /* Test for SD version 2 */
1638 err = mmc_send_if_cond(mmc);
1639
1640 /* Now try to get the SD card's operating condition */
1641 err = sd_send_op_cond(mmc);
1642
1643 /* If the command timed out, we check for an MMC card */
1644 if (err == TIMEOUT) {
1645 err = mmc_send_op_cond(mmc);
1646
1647 if (err) {
1648 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1649 printf("Card did not respond to voltage select!\n");
1650 #endif
1651 return UNUSABLE_ERR;
1652 }
1653 }
1654
1655 if (!err)
1656 mmc->init_in_progress = 1;
1657
1658 return err;
1659 }
1660
1661 static int mmc_complete_init(struct mmc *mmc)
1662 {
1663 int err = 0;
1664
1665 mmc->init_in_progress = 0;
1666 if (mmc->op_cond_pending)
1667 err = mmc_complete_op_cond(mmc);
1668
1669 if (!err)
1670 err = mmc_startup(mmc);
1671 if (err)
1672 mmc->has_init = 0;
1673 else
1674 mmc->has_init = 1;
1675 return err;
1676 }
1677
1678 int mmc_init(struct mmc *mmc)
1679 {
1680 int err = 0;
1681 unsigned start;
1682
1683 if (mmc->has_init)
1684 return 0;
1685
1686 start = get_timer(0);
1687
1688 if (!mmc->init_in_progress)
1689 err = mmc_start_init(mmc);
1690
1691 if (!err)
1692 err = mmc_complete_init(mmc);
1693 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1694 return err;
1695 }
1696
1697 int mmc_set_dsr(struct mmc *mmc, u16 val)
1698 {
1699 mmc->dsr = val;
1700 return 0;
1701 }
1702
1703 /* CPU-specific MMC initializations */
1704 __weak int cpu_mmc_init(bd_t *bis)
1705 {
1706 return -1;
1707 }
1708
1709 /* board-specific MMC initializations. */
1710 __weak int board_mmc_init(bd_t *bis)
1711 {
1712 return -1;
1713 }
1714
1715 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1716
1717 void print_mmc_devices(char separator)
1718 {
1719 struct mmc *m;
1720 struct list_head *entry;
1721 char *mmc_type;
1722
1723 list_for_each(entry, &mmc_devices) {
1724 m = list_entry(entry, struct mmc, link);
1725
1726 if (m->has_init)
1727 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1728 else
1729 mmc_type = NULL;
1730
1731 printf("%s: %d", m->cfg->name, m->block_dev.devnum);
1732 if (mmc_type)
1733 printf(" (%s)", mmc_type);
1734
1735 if (entry->next != &mmc_devices) {
1736 printf("%c", separator);
1737 if (separator != '\n')
1738 puts (" ");
1739 }
1740 }
1741
1742 printf("\n");
1743 }
1744
1745 #else
1746 void print_mmc_devices(char separator) { }
1747 #endif
1748
1749 int get_mmc_num(void)
1750 {
1751 return cur_dev_num;
1752 }
1753
1754 void mmc_set_preinit(struct mmc *mmc, int preinit)
1755 {
1756 mmc->preinit = preinit;
1757 }
1758
1759 static void do_preinit(void)
1760 {
1761 struct mmc *m;
1762 struct list_head *entry;
1763
1764 list_for_each(entry, &mmc_devices) {
1765 m = list_entry(entry, struct mmc, link);
1766
1767 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1768 mmc_set_preinit(m, 1);
1769 #endif
1770 if (m->preinit)
1771 mmc_start_init(m);
1772 }
1773 }
1774
1775 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1776 static int mmc_probe(bd_t *bis)
1777 {
1778 return 0;
1779 }
1780 #elif defined(CONFIG_DM_MMC)
1781 static int mmc_probe(bd_t *bis)
1782 {
1783 int ret, i;
1784 struct uclass *uc;
1785 struct udevice *dev;
1786
1787 ret = uclass_get(UCLASS_MMC, &uc);
1788 if (ret)
1789 return ret;
1790
1791 /*
1792 * Try to add them in sequence order. Really with driver model we
1793 * should allow holes, but the current MMC list does not allow that.
1794 * So if we request 0, 1, 3 we will get 0, 1, 2.
1795 */
1796 for (i = 0; ; i++) {
1797 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1798 if (ret == -ENODEV)
1799 break;
1800 }
1801 uclass_foreach_dev(dev, uc) {
1802 ret = device_probe(dev);
1803 if (ret)
1804 printf("%s - probe failed: %d\n", dev->name, ret);
1805 }
1806
1807 return 0;
1808 }
1809 #else
1810 static int mmc_probe(bd_t *bis)
1811 {
1812 if (board_mmc_init(bis) < 0)
1813 cpu_mmc_init(bis);
1814
1815 return 0;
1816 }
1817 #endif
1818
1819 int mmc_initialize(bd_t *bis)
1820 {
1821 static int initialized = 0;
1822 int ret;
1823 if (initialized) /* Avoid initializing mmc multiple times */
1824 return 0;
1825 initialized = 1;
1826
1827 INIT_LIST_HEAD (&mmc_devices);
1828 cur_dev_num = 0;
1829
1830 ret = mmc_probe(bis);
1831 if (ret)
1832 return ret;
1833
1834 #ifndef CONFIG_SPL_BUILD
1835 print_mmc_devices(',');
1836 #endif
1837
1838 do_preinit();
1839 return 0;
1840 }
1841
1842 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1843 /*
1844 * This function changes the size of boot partition and the size of rpmb
1845 * partition present on EMMC devices.
1846 *
1847 * Input Parameters:
1848 * struct *mmc: pointer for the mmc device strcuture
1849 * bootsize: size of boot partition
1850 * rpmbsize: size of rpmb partition
1851 *
1852 * Returns 0 on success.
1853 */
1854
1855 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1856 unsigned long rpmbsize)
1857 {
1858 int err;
1859 struct mmc_cmd cmd;
1860
1861 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1862 cmd.cmdidx = MMC_CMD_RES_MAN;
1863 cmd.resp_type = MMC_RSP_R1b;
1864 cmd.cmdarg = MMC_CMD62_ARG1;
1865
1866 err = mmc_send_cmd(mmc, &cmd, NULL);
1867 if (err) {
1868 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1869 return err;
1870 }
1871
1872 /* Boot partition changing mode */
1873 cmd.cmdidx = MMC_CMD_RES_MAN;
1874 cmd.resp_type = MMC_RSP_R1b;
1875 cmd.cmdarg = MMC_CMD62_ARG2;
1876
1877 err = mmc_send_cmd(mmc, &cmd, NULL);
1878 if (err) {
1879 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1880 return err;
1881 }
1882 /* boot partition size is multiple of 128KB */
1883 bootsize = (bootsize * 1024) / 128;
1884
1885 /* Arg: boot partition size */
1886 cmd.cmdidx = MMC_CMD_RES_MAN;
1887 cmd.resp_type = MMC_RSP_R1b;
1888 cmd.cmdarg = bootsize;
1889
1890 err = mmc_send_cmd(mmc, &cmd, NULL);
1891 if (err) {
1892 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1893 return err;
1894 }
1895 /* RPMB partition size is multiple of 128KB */
1896 rpmbsize = (rpmbsize * 1024) / 128;
1897 /* Arg: RPMB partition size */
1898 cmd.cmdidx = MMC_CMD_RES_MAN;
1899 cmd.resp_type = MMC_RSP_R1b;
1900 cmd.cmdarg = rpmbsize;
1901
1902 err = mmc_send_cmd(mmc, &cmd, NULL);
1903 if (err) {
1904 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1905 return err;
1906 }
1907 return 0;
1908 }
1909
1910 /*
1911 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1912 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1913 * and BOOT_MODE.
1914 *
1915 * Returns 0 on success.
1916 */
1917 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1918 {
1919 int err;
1920
1921 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1922 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1923 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1924 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1925
1926 if (err)
1927 return err;
1928 return 0;
1929 }
1930
1931 /*
1932 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1933 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1934 * PARTITION_ACCESS.
1935 *
1936 * Returns 0 on success.
1937 */
1938 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1939 {
1940 int err;
1941
1942 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1943 EXT_CSD_BOOT_ACK(ack) |
1944 EXT_CSD_BOOT_PART_NUM(part_num) |
1945 EXT_CSD_PARTITION_ACCESS(access));
1946
1947 if (err)
1948 return err;
1949 return 0;
1950 }
1951
1952 /*
1953 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1954 * for enable. Note that this is a write-once field for non-zero values.
1955 *
1956 * Returns 0 on success.
1957 */
1958 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1959 {
1960 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1961 enable);
1962 }
1963 #endif
"Das U-Boot" Source Tree