2 * generic mmc spi driver
4 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
5 * Licensed under the GPL-2 or later.
14 #include <linux/crc7.h>
15 #include <asm/byteorder.h>
17 /* MMC/SD in SPI mode reports R1 status always */
18 #define R1_SPI_IDLE (1 << 0)
19 #define R1_SPI_ERASE_RESET (1 << 1)
20 #define R1_SPI_ILLEGAL_COMMAND (1 << 2)
21 #define R1_SPI_COM_CRC (1 << 3)
22 #define R1_SPI_ERASE_SEQ (1 << 4)
23 #define R1_SPI_ADDRESS (1 << 5)
24 #define R1_SPI_PARAMETER (1 << 6)
25 /* R1 bit 7 is always zero, reuse this bit for error */
26 #define R1_SPI_ERROR (1 << 7)
28 /* Response tokens used to ack each block written: */
29 #define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f)
30 #define SPI_RESPONSE_ACCEPTED ((2 << 1)|1)
31 #define SPI_RESPONSE_CRC_ERR ((5 << 1)|1)
32 #define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1)
34 /* Read and write blocks start with these tokens and end with crc;
35 * on error, read tokens act like a subset of R2_SPI_* values.
37 #define SPI_TOKEN_SINGLE 0xfe /* single block r/w, multiblock read */
38 #define SPI_TOKEN_MULTI_WRITE 0xfc /* multiblock write */
39 #define SPI_TOKEN_STOP_TRAN 0xfd /* terminate multiblock write */
41 /* MMC SPI commands start with a start bit "0" and a transmit bit "1" */
42 #define MMC_SPI_CMD(x) (0x40 | (x & 0x3f))
45 #define MMC_SPI_VOLTAGE (MMC_VDD_32_33 | MMC_VDD_33_34)
46 #define MMC_SPI_MIN_CLOCK 400000 /* 400KHz to meet MMC spec */
50 #define RTOUT 3000000 /* 1 sec */
51 #define WTOUT 3000000 /* 1 sec */
53 static uint
mmc_spi_sendcmd(struct mmc
*mmc
, ushort cmdidx
, u32 cmdarg
)
55 struct spi_slave
*spi
= mmc
->priv
;
60 cmdo
[1] = MMC_SPI_CMD(cmdidx
);
61 cmdo
[2] = cmdarg
>> 24;
62 cmdo
[3] = cmdarg
>> 16;
63 cmdo
[4] = cmdarg
>> 8;
65 cmdo
[6] = (crc7(0, &cmdo
[1], 5) << 1) | 0x01;
66 spi_xfer(spi
, sizeof(cmdo
) * 8, cmdo
, NULL
, 0);
67 for (i
= 0; i
< CTOUT
; i
++) {
68 spi_xfer(spi
, 1 * 8, NULL
, &r1
, 0);
69 if (i
&& (r1
& 0x80) == 0) /* r1 response */
72 debug("%s:cmd%d resp%d %x\n", __func__
, cmdidx
, i
, r1
);
76 static uint
mmc_spi_readdata(struct mmc
*mmc
, void *xbuf
,
79 struct spi_slave
*spi
= mmc
->priv
;
85 for (i
= 0; i
< RTOUT
; i
++) {
86 spi_xfer(spi
, 1 * 8, NULL
, &r1
, 0);
87 if (r1
!= 0xff) /* data token */
90 debug("%s:tok%d %x\n", __func__
, i
, r1
);
91 if (r1
== SPI_TOKEN_SINGLE
) {
92 spi_xfer(spi
, bsize
* 8, NULL
, buf
, 0);
93 spi_xfer(spi
, 2 * 8, NULL
, &crc
, 0);
94 #ifdef CONFIG_MMC_SPI_CRC_ON
95 if (be_to_cpu16(crc16_ccitt(0, buf
, bsize
)) != crc
) {
96 debug("%s: CRC error\n", mmc
->cfg
->name
);
111 static uint
mmc_spi_writedata(struct mmc
*mmc
, const void *xbuf
,
112 u32 bcnt
, u32 bsize
, int multi
)
114 struct spi_slave
*spi
= mmc
->priv
;
115 const u8
*buf
= xbuf
;
121 tok
[1] = multi
? SPI_TOKEN_MULTI_WRITE
: SPI_TOKEN_SINGLE
;
123 #ifdef CONFIG_MMC_SPI_CRC_ON
124 crc
= cpu_to_be16(crc16_ccitt(0, (u8
*)buf
, bsize
));
126 spi_xfer(spi
, 2 * 8, tok
, NULL
, 0);
127 spi_xfer(spi
, bsize
* 8, buf
, NULL
, 0);
128 spi_xfer(spi
, 2 * 8, &crc
, NULL
, 0);
129 for (i
= 0; i
< CTOUT
; i
++) {
130 spi_xfer(spi
, 1 * 8, NULL
, &r1
, 0);
131 if ((r1
& 0x10) == 0) /* response token */
134 debug("%s:tok%d %x\n", __func__
, i
, r1
);
135 if (SPI_MMC_RESPONSE_CODE(r1
) == SPI_RESPONSE_ACCEPTED
) {
136 for (i
= 0; i
< WTOUT
; i
++) { /* wait busy */
137 spi_xfer(spi
, 1 * 8, NULL
, &r1
, 0);
138 if (i
&& r1
== 0xff) {
144 debug("%s:wtout %x\n", __func__
, r1
);
149 debug("%s: err %x\n", __func__
, r1
);
155 if (multi
&& bcnt
== -1) { /* stop multi write */
156 tok
[1] = SPI_TOKEN_STOP_TRAN
;
157 spi_xfer(spi
, 2 * 8, tok
, NULL
, 0);
158 for (i
= 0; i
< WTOUT
; i
++) { /* wait busy */
159 spi_xfer(spi
, 1 * 8, NULL
, &r1
, 0);
160 if (i
&& r1
== 0xff) {
166 debug("%s:wstop %x\n", __func__
, r1
);
173 static int mmc_spi_request(struct mmc
*mmc
, struct mmc_cmd
*cmd
,
174 struct mmc_data
*data
)
176 struct spi_slave
*spi
= mmc
->priv
;
180 debug("%s:cmd%d %x %x\n", __func__
,
181 cmd
->cmdidx
, cmd
->resp_type
, cmd
->cmdarg
);
183 spi_cs_activate(spi
);
184 r1
= mmc_spi_sendcmd(mmc
, cmd
->cmdidx
, cmd
->cmdarg
);
185 if (r1
== 0xff) { /* no response */
188 } else if (r1
& R1_SPI_COM_CRC
) {
191 } else if (r1
& ~R1_SPI_IDLE
) { /* other errors */
194 } else if (cmd
->resp_type
== MMC_RSP_R2
) {
195 r1
= mmc_spi_readdata(mmc
, cmd
->response
, 1, 16);
196 for (i
= 0; i
< 4; i
++)
197 cmd
->response
[i
] = be32_to_cpu(cmd
->response
[i
]);
198 debug("r128 %x %x %x %x\n", cmd
->response
[0], cmd
->response
[1],
199 cmd
->response
[2], cmd
->response
[3]);
201 switch (cmd
->cmdidx
) {
202 case SD_CMD_APP_SEND_OP_COND
:
203 case MMC_CMD_SEND_OP_COND
:
204 cmd
->response
[0] = (r1
& R1_SPI_IDLE
) ? 0 : OCR_BUSY
;
206 case SD_CMD_SEND_IF_COND
:
207 case MMC_CMD_SPI_READ_OCR
:
208 spi_xfer(spi
, 4 * 8, NULL
, cmd
->response
, 0);
209 cmd
->response
[0] = be32_to_cpu(cmd
->response
[0]);
210 debug("r32 %x\n", cmd
->response
[0]);
212 case MMC_CMD_SEND_STATUS
:
213 spi_xfer(spi
, 1 * 8, NULL
, cmd
->response
, 0);
214 cmd
->response
[0] = (cmd
->response
[0] & 0xff) ?
215 MMC_STATUS_ERROR
: MMC_STATUS_RDY_FOR_DATA
;
219 debug("%s:data %x %x %x\n", __func__
,
220 data
->flags
, data
->blocks
, data
->blocksize
);
221 if (data
->flags
== MMC_DATA_READ
)
222 r1
= mmc_spi_readdata(mmc
, data
->dest
,
223 data
->blocks
, data
->blocksize
);
224 else if (data
->flags
== MMC_DATA_WRITE
)
225 r1
= mmc_spi_writedata(mmc
, data
->src
,
226 data
->blocks
, data
->blocksize
,
227 (cmd
->cmdidx
== MMC_CMD_WRITE_MULTIPLE_BLOCK
));
228 if (r1
& R1_SPI_COM_CRC
)
230 else if (r1
) /* other errors */
234 spi_cs_deactivate(spi
);
235 spi_release_bus(spi
);
239 static void mmc_spi_set_ios(struct mmc
*mmc
)
241 struct spi_slave
*spi
= mmc
->priv
;
243 debug("%s: clock %u\n", __func__
, mmc
->clock
);
245 spi_set_speed(spi
, mmc
->clock
);
248 static int mmc_spi_init_p(struct mmc
*mmc
)
250 struct spi_slave
*spi
= mmc
->priv
;
251 spi_set_speed(spi
, MMC_SPI_MIN_CLOCK
);
253 /* cs deactivated for 100+ clock */
254 spi_xfer(spi
, 18 * 8, NULL
, NULL
, 0);
255 spi_release_bus(spi
);
259 static const struct mmc_ops mmc_spi_ops
= {
260 .send_cmd
= mmc_spi_request
,
261 .set_ios
= mmc_spi_set_ios
,
262 .init
= mmc_spi_init_p
,
265 static struct mmc_config mmc_spi_cfg
= {
268 .host_caps
= MMC_MODE_SPI
,
269 .voltages
= MMC_SPI_VOLTAGE
,
270 .f_min
= MMC_SPI_MIN_CLOCK
,
271 .part_type
= PART_TYPE_DOS
,
272 .b_max
= CONFIG_SYS_MMC_MAX_BLK_COUNT
,
275 struct mmc
*mmc_spi_init(uint bus
, uint cs
, uint speed
, uint mode
)
278 struct spi_slave
*spi
;
280 spi
= spi_setup_slave(bus
, cs
, speed
, mode
);
284 mmc_spi_cfg
.f_max
= speed
;
286 mmc
= mmc_create(&mmc_spi_cfg
, spi
);