drivers/mmc/s5p_sdhci.c

   1 /*
   2  * (C) Copyright 2012 SAMSUNG Electronics
   3  * Jaehoon Chung <jh80.chung@samsung.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <malloc.h>
  11 #include <sdhci.h>
  12 #include <fdtdec.h>
  13 #include <libfdt.h>
  14 #include <asm/gpio.h>
  15 #include <asm/arch/mmc.h>
  16 #include <asm/arch/clk.h>
  17 #include <errno.h>
  18 #include <asm/arch/pinmux.h>
  19
  20 #ifdef CONFIG_DM_MMC
  21 struct s5p_sdhci_plat {
  22         struct mmc_config cfg;
  23         struct mmc mmc;
  24 };
  25
  26 DECLARE_GLOBAL_DATA_PTR;
  27 #endif
  28
  29 static char *S5P_NAME = "SAMSUNG SDHCI";
  30 static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
  31 {
  32         unsigned long val, ctrl;
  33         /*
  34          * SELCLKPADDS[17:16]
  35          * 00 = 2mA
  36          * 01 = 4mA
  37          * 10 = 7mA
  38          * 11 = 9mA
  39          */
  40         sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4);
  41
  42         val = sdhci_readl(host, SDHCI_CONTROL2);
  43         val &= SDHCI_CTRL2_SELBASECLK_MASK(3);
  44
  45         val |=  SDHCI_CTRL2_ENSTAASYNCCLR |
  46                 SDHCI_CTRL2_ENCMDCNFMSK |
  47                 SDHCI_CTRL2_ENFBCLKRX |
  48                 SDHCI_CTRL2_ENCLKOUTHOLD;
  49
  50         sdhci_writel(host, val, SDHCI_CONTROL2);
  51
  52         /*
  53          * FCSEL3[31] FCSEL2[23] FCSEL1[15] FCSEL0[7]
  54          * FCSel[1:0] : Rx Feedback Clock Delay Control
  55          *      Inverter delay means10ns delay if SDCLK 50MHz setting
  56          *      01 = Delay1 (basic delay)
  57          *      11 = Delay2 (basic delay + 2ns)
  58          *      00 = Delay3 (inverter delay)
  59          *      10 = Delay4 (inverter delay + 2ns)
  60          */
  61         val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1;
  62         sdhci_writel(host, val, SDHCI_CONTROL3);
  63
  64         /*
  65          * SELBASECLK[5:4]
  66          * 00/01 = HCLK
  67          * 10 = EPLL
  68          * 11 = XTI or XEXTCLK
  69          */
  70         ctrl = sdhci_readl(host, SDHCI_CONTROL2);
  71         ctrl &= ~SDHCI_CTRL2_SELBASECLK_MASK(0x3);
  72         ctrl |= SDHCI_CTRL2_SELBASECLK_MASK(0x2);
  73         sdhci_writel(host, ctrl, SDHCI_CONTROL2);
  74 }
  75
  76 static int s5p_sdhci_core_init(struct sdhci_host *host)
  77 {
  78         host->name = S5P_NAME;
  79
  80         host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
  81                 SDHCI_QUIRK_32BIT_DMA_ADDR |
  82                 SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
  83         host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  84
  85         host->set_control_reg = &s5p_sdhci_set_control_reg;
  86         host->set_clock = set_mmc_clk;
  87
  88         if (host->bus_width == 8)
  89                 host->host_caps |= MMC_MODE_8BIT;
  90
  91 #ifndef CONFIG_BLK
  92         return add_sdhci(host, 52000000, 400000);
  93 #else
  94         return 0;
  95 #endif
  96 }
  97
  98 int s5p_sdhci_init(u32 regbase, int index, int bus_width)
  99 {
 100         struct sdhci_host *host = calloc(1, sizeof(struct sdhci_host));
 101         if (!host) {
 102                 printf("sdhci__host allocation fail!\n");
 103                 return 1;
 104         }
 105         host->ioaddr = (void *)regbase;
 106         host->index = index;
 107         host->bus_width = bus_width;
 108
 109         return s5p_sdhci_core_init(host);
 110 }
 111
 112 #if CONFIG_IS_ENABLED(OF_CONTROL)
 113 struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
 114
 115 static int do_sdhci_init(struct sdhci_host *host)
 116 {
 117         int dev_id, flag, ret;
 118
 119         flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
 120         dev_id = host->index + PERIPH_ID_SDMMC0;
 121
 122         ret = exynos_pinmux_config(dev_id, flag);
 123         if (ret) {
 124                 printf("external SD not configured\n");
 125                 return ret;
 126         }
 127
 128         if (dm_gpio_is_valid(&host->pwr_gpio)) {
 129                 dm_gpio_set_value(&host->pwr_gpio, 1);
 130                 ret = exynos_pinmux_config(dev_id, flag);
 131                 if (ret) {
 132                         debug("MMC not configured\n");
 133                         return ret;
 134                 }
 135         }
 136
 137         if (dm_gpio_is_valid(&host->cd_gpio)) {
 138                 ret = dm_gpio_get_value(&host->cd_gpio);
 139                 if (ret) {
 140                         debug("no SD card detected (%d)\n", ret);
 141                         return -ENODEV;
 142                 }
 143         }
 144
 145         return s5p_sdhci_core_init(host);
 146 }
 147
 148 static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)
 149 {
 150         int bus_width, dev_id;
 151         unsigned int base;
 152
 153         /* Get device id */
 154         dev_id = pinmux_decode_periph_id(blob, node);
 155         if (dev_id < PERIPH_ID_SDMMC0 && dev_id > PERIPH_ID_SDMMC3) {
 156                 debug("MMC: Can't get device id\n");
 157                 return -1;
 158         }
 159         host->index = dev_id - PERIPH_ID_SDMMC0;
 160
 161         /* Get bus width */
 162         bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
 163         if (bus_width <= 0) {
 164                 debug("MMC: Can't get bus-width\n");
 165                 return -1;
 166         }
 167         host->bus_width = bus_width;
 168
 169         /* Get the base address from the device node */
 170         base = fdtdec_get_addr(blob, node, "reg");
 171         if (!base) {
 172                 debug("MMC: Can't get base address\n");
 173                 return -1;
 174         }
 175         host->ioaddr = (void *)base;
 176
 177         gpio_request_by_name_nodev(blob, node, "pwr-gpios", 0, &host->pwr_gpio,
 178                                    GPIOD_IS_OUT);
 179         gpio_request_by_name_nodev(blob, node, "cd-gpios", 0, &host->cd_gpio,
 180                                    GPIOD_IS_IN);
 181
 182         return 0;
 183 }
 184
 185 static int process_nodes(const void *blob, int node_list[], int count)
 186 {
 187         struct sdhci_host *host;
 188         int i, node, ret;
 189         int failed = 0;
 190
 191         debug("%s: count = %d\n", __func__, count);
 192
 193         /* build sdhci_host[] for each controller */
 194         for (i = 0; i < count; i++) {
 195                 node = node_list[i];
 196                 if (node <= 0)
 197                         continue;
 198
 199                 host = &sdhci_host[i];
 200
 201                 ret = sdhci_get_config(blob, node, host);
 202                 if (ret) {
 203                         printf("%s: failed to decode dev %d (%d)\n",    __func__, i, ret);
 204                         failed++;
 205                         continue;
 206                 }
 207
 208                 ret = do_sdhci_init(host);
 209                 if (ret && ret != -ENODEV) {
 210                         printf("%s: failed to initialize dev %d (%d)\n", __func__, i, ret);
 211                         failed++;
 212                 }
 213         }
 214
 215         /* we only consider it an error when all nodes fail */
 216         return (failed == count ? -1 : 0);
 217 }
 218
 219 int exynos_mmc_init(const void *blob)
 220 {
 221         int count;
 222         int node_list[SDHCI_MAX_HOSTS];
 223
 224         count = fdtdec_find_aliases_for_id(blob, "mmc",
 225                         COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
 226                         SDHCI_MAX_HOSTS);
 227
 228         return process_nodes(blob, node_list, count);
 229 }
 230 #endif
 231
 232 #ifdef CONFIG_DM_MMC
 233 static int s5p_sdhci_probe(struct udevice *dev)
 234 {
 235         struct s5p_sdhci_plat *plat = dev_get_platdata(dev);
 236         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 237         struct sdhci_host *host = dev_get_priv(dev);
 238         int ret;
 239
 240         ret = sdhci_get_config(gd->fdt_blob, dev->of_offset, host);
 241         if (ret)
 242                 return ret;
 243
 244         ret = do_sdhci_init(host);
 245         if (ret)
 246                 return ret;
 247
 248         ret = sdhci_setup_cfg(&plat->cfg, host, 52000000, 400000);
 249         if (ret)
 250                 return ret;
 251
 252         host->mmc = &plat->mmc;
 253         host->mmc->priv = host;
 254         host->mmc->dev = dev;
 255         upriv->mmc = host->mmc;
 256
 257         return sdhci_probe(dev);
 258 }
 259
 260 static int s5p_sdhci_bind(struct udevice *dev)
 261 {
 262         struct s5p_sdhci_plat *plat = dev_get_platdata(dev);
 263         int ret;
 264
 265         ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
 266         if (ret)
 267                 return ret;
 268
 269         return 0;
 270 }
 271
 272 static const struct udevice_id s5p_sdhci_ids[] = {
 273         { .compatible = "samsung,exynos4412-sdhci"},
 274         { }
 275 };
 276
 277 U_BOOT_DRIVER(s5p_sdhci_drv) = {
 278         .name           = "s5p_sdhci",
 279         .id             = UCLASS_MMC,
 280         .of_match       = s5p_sdhci_ids,
 281         .bind           = s5p_sdhci_bind,
 282         .ops            = &sdhci_ops,
 283         .probe          = s5p_sdhci_probe,
 284         .priv_auto_alloc_size = sizeof(struct sdhci_host),
 285         .platdata_auto_alloc_size = sizeof(struct s5p_sdhci_plat),
 286 };
 287 #endif /* CONFIG_DM_MMC */