drivers/mmc/s5p_sdhci.c

   1 /*
   2  * (C) Copyright 2012 SAMSUNG Electronics
   3  * Jaehoon Chung <jh80.chung@samsung.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <malloc.h>
  10 #include <sdhci.h>
  11 #include <fdtdec.h>
  12 #include <libfdt.h>
  13 #include <asm/gpio.h>
  14 #include <asm/arch/mmc.h>
  15 #include <asm/arch/clk.h>
  16 #include <errno.h>
  17 #include <asm/arch/pinmux.h>
  18
  19 static char *S5P_NAME = "SAMSUNG SDHCI";
  20 static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
  21 {
  22         unsigned long val, ctrl;
  23         /*
  24          * SELCLKPADDS[17:16]
  25          * 00 = 2mA
  26          * 01 = 4mA
  27          * 10 = 7mA
  28          * 11 = 9mA
  29          */
  30         sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4);
  31
  32         val = sdhci_readl(host, SDHCI_CONTROL2);
  33         val &= SDHCI_CTRL2_SELBASECLK_SHIFT;
  34
  35         val |=  SDHCI_CTRL2_ENSTAASYNCCLR |
  36                 SDHCI_CTRL2_ENCMDCNFMSK |
  37                 SDHCI_CTRL2_ENFBCLKRX |
  38                 SDHCI_CTRL2_ENCLKOUTHOLD;
  39
  40         sdhci_writel(host, val, SDHCI_CONTROL2);
  41
  42         /*
  43          * FCSEL3[31] FCSEL2[23] FCSEL1[15] FCSEL0[7]
  44          * FCSel[1:0] : Rx Feedback Clock Delay Control
  45          *      Inverter delay means10ns delay if SDCLK 50MHz setting
  46          *      01 = Delay1 (basic delay)
  47          *      11 = Delay2 (basic delay + 2ns)
  48          *      00 = Delay3 (inverter delay)
  49          *      10 = Delay4 (inverter delay + 2ns)
  50          */
  51         val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1;
  52         sdhci_writel(host, val, SDHCI_CONTROL3);
  53
  54         /*
  55          * SELBASECLK[5:4]
  56          * 00/01 = HCLK
  57          * 10 = EPLL
  58          * 11 = XTI or XEXTCLK
  59          */
  60         ctrl = sdhci_readl(host, SDHCI_CONTROL2);
  61         ctrl &= ~SDHCI_CTRL2_SELBASECLK_MASK(0x3);
  62         ctrl |= SDHCI_CTRL2_SELBASECLK_MASK(0x2);
  63         sdhci_writel(host, ctrl, SDHCI_CONTROL2);
  64 }
  65
  66 static int s5p_sdhci_core_init(struct sdhci_host *host)
  67 {
  68         host->name = S5P_NAME;
  69
  70         host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
  71                 SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
  72                 SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
  73         host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  74         host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
  75
  76         host->set_control_reg = &s5p_sdhci_set_control_reg;
  77         host->set_clock = set_mmc_clk;
  78
  79         host->host_caps = MMC_MODE_HC;
  80         if (host->bus_width == 8)
  81                 host->host_caps |= MMC_MODE_8BIT;
  82
  83         return add_sdhci(host, 52000000, 400000);
  84 }
  85
  86 int s5p_sdhci_init(u32 regbase, int index, int bus_width)
  87 {
  88         struct sdhci_host *host = malloc(sizeof(struct sdhci_host));
  89         if (!host) {
  90                 printf("sdhci__host malloc fail!\n");
  91                 return 1;
  92         }
  93         host->ioaddr = (void *)regbase;
  94         host->index = index;
  95         host->bus_width = bus_width;
  96
  97         return s5p_sdhci_core_init(host);
  98 }
  99
 100 #ifdef CONFIG_OF_CONTROL
 101 struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
 102
 103 static int do_sdhci_init(struct sdhci_host *host)
 104 {
 105         char str[20];
 106         int dev_id, flag;
 107         int err = 0;
 108
 109         flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
 110         dev_id = host->index + PERIPH_ID_SDMMC0;
 111
 112         if (fdt_gpio_isvalid(&host->pwr_gpio)) {
 113                 sprintf(str, "sdhci%d_power", host->index & 0xf);
 114                 gpio_request(host->pwr_gpio.gpio, str);
 115                 gpio_direction_output(host->pwr_gpio.gpio, 1);
 116                 err = exynos_pinmux_config(dev_id, flag);
 117                 if (err) {
 118                         debug("MMC not configured\n");
 119                         return err;
 120                 }
 121         }
 122
 123         if (fdt_gpio_isvalid(&host->cd_gpio)) {
 124                 sprintf(str, "sdhci%d_cd", host->index & 0xf);
 125                 gpio_request(host->cd_gpio.gpio, str);
 126                 gpio_direction_input(host->cd_gpio.gpio);
 127                 if (gpio_get_value(host->cd_gpio.gpio))
 128                         return -ENODEV;
 129
 130                 err = exynos_pinmux_config(dev_id, flag);
 131                 if (err) {
 132                         printf("external SD not configured\n");
 133                         return err;
 134                 }
 135         }
 136
 137         return s5p_sdhci_core_init(host);
 138 }
 139
 140 static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)
 141 {
 142         int bus_width, dev_id;
 143         unsigned int base;
 144
 145         /* Get device id */
 146         dev_id = pinmux_decode_periph_id(blob, node);
 147         if (dev_id < PERIPH_ID_SDMMC0 && dev_id > PERIPH_ID_SDMMC3) {
 148                 debug("MMC: Can't get device id\n");
 149                 return -1;
 150         }
 151         host->index = dev_id - PERIPH_ID_SDMMC0;
 152
 153         /* Get bus width */
 154         bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
 155         if (bus_width <= 0) {
 156                 debug("MMC: Can't get bus-width\n");
 157                 return -1;
 158         }
 159         host->bus_width = bus_width;
 160
 161         /* Get the base address from the device node */
 162         base = fdtdec_get_addr(blob, node, "reg");
 163         if (!base) {
 164                 debug("MMC: Can't get base address\n");
 165                 return -1;
 166         }
 167         host->ioaddr = (void *)base;
 168
 169         fdtdec_decode_gpio(blob, node, "pwr-gpios", &host->pwr_gpio);
 170         fdtdec_decode_gpio(blob, node, "cd-gpios", &host->cd_gpio);
 171
 172         return 0;
 173 }
 174
 175 static int process_nodes(const void *blob, int node_list[], int count)
 176 {
 177         struct sdhci_host *host;
 178         int i, node;
 179
 180         debug("%s: count = %d\n", __func__, count);
 181
 182         /* build sdhci_host[] for each controller */
 183         for (i = 0; i < count; i++) {
 184                 node = node_list[i];
 185                 if (node <= 0)
 186                         continue;
 187
 188                 host = &sdhci_host[i];
 189
 190                 if (sdhci_get_config(blob, node, host)) {
 191                         printf("%s: failed to decode dev %d\n", __func__, i);
 192                         return -1;
 193                 }
 194                 do_sdhci_init(host);
 195         }
 196         return 0;
 197 }
 198
 199 int exynos_mmc_init(const void *blob)
 200 {
 201         int count;
 202         int node_list[SDHCI_MAX_HOSTS];
 203
 204         count = fdtdec_find_aliases_for_id(blob, "mmc",
 205                         COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
 206                         SDHCI_MAX_HOSTS);
 207
 208         process_nodes(blob, node_list, count);
 209
 210         return 1;
 211 }
 212 #endif