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mtd/spi: fix block count for is25lq040b
[people/ms/u-boot.git] / drivers / mtd / nand / nand_timings.c
1 /*
2 * Copyright (C) 2014 Free Electrons
3 *
4 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11 #include <common.h>
12 #include <linux/kernel.h>
13 #include <linux/mtd/nand.h>
14
15 static const struct nand_sdr_timings onfi_sdr_timings[] = {
16 /* Mode 0 */
17 {
18 .tADL_min = 200000,
19 .tALH_min = 20000,
20 .tALS_min = 50000,
21 .tAR_min = 25000,
22 .tCEA_max = 100000,
23 .tCEH_min = 20000,
24 .tCH_min = 20000,
25 .tCHZ_max = 100000,
26 .tCLH_min = 20000,
27 .tCLR_min = 20000,
28 .tCLS_min = 50000,
29 .tCOH_min = 0,
30 .tCS_min = 70000,
31 .tDH_min = 20000,
32 .tDS_min = 40000,
33 .tFEAT_max = 1000000,
34 .tIR_min = 10000,
35 .tITC_max = 1000000,
36 .tRC_min = 100000,
37 .tREA_max = 40000,
38 .tREH_min = 30000,
39 .tRHOH_min = 0,
40 .tRHW_min = 200000,
41 .tRHZ_max = 200000,
42 .tRLOH_min = 0,
43 .tRP_min = 50000,
44 .tRST_max = 250000000000ULL,
45 .tWB_max = 200000,
46 .tRR_min = 40000,
47 .tWC_min = 100000,
48 .tWH_min = 30000,
49 .tWHR_min = 120000,
50 .tWP_min = 50000,
51 .tWW_min = 100000,
52 },
53 /* Mode 1 */
54 {
55 .tADL_min = 100000,
56 .tALH_min = 10000,
57 .tALS_min = 25000,
58 .tAR_min = 10000,
59 .tCEA_max = 45000,
60 .tCEH_min = 20000,
61 .tCH_min = 10000,
62 .tCHZ_max = 50000,
63 .tCLH_min = 10000,
64 .tCLR_min = 10000,
65 .tCLS_min = 25000,
66 .tCOH_min = 15000,
67 .tCS_min = 35000,
68 .tDH_min = 10000,
69 .tDS_min = 20000,
70 .tFEAT_max = 1000000,
71 .tIR_min = 0,
72 .tITC_max = 1000000,
73 .tRC_min = 50000,
74 .tREA_max = 30000,
75 .tREH_min = 15000,
76 .tRHOH_min = 15000,
77 .tRHW_min = 100000,
78 .tRHZ_max = 100000,
79 .tRLOH_min = 0,
80 .tRP_min = 25000,
81 .tRR_min = 20000,
82 .tRST_max = 500000000,
83 .tWB_max = 100000,
84 .tWC_min = 45000,
85 .tWH_min = 15000,
86 .tWHR_min = 80000,
87 .tWP_min = 25000,
88 .tWW_min = 100000,
89 },
90 /* Mode 2 */
91 {
92 .tADL_min = 100000,
93 .tALH_min = 10000,
94 .tALS_min = 15000,
95 .tAR_min = 10000,
96 .tCEA_max = 30000,
97 .tCEH_min = 20000,
98 .tCH_min = 10000,
99 .tCHZ_max = 50000,
100 .tCLH_min = 10000,
101 .tCLR_min = 10000,
102 .tCLS_min = 15000,
103 .tCOH_min = 15000,
104 .tCS_min = 25000,
105 .tDH_min = 5000,
106 .tDS_min = 15000,
107 .tFEAT_max = 1000000,
108 .tIR_min = 0,
109 .tITC_max = 1000000,
110 .tRC_min = 35000,
111 .tREA_max = 25000,
112 .tREH_min = 15000,
113 .tRHOH_min = 15000,
114 .tRHW_min = 100000,
115 .tRHZ_max = 100000,
116 .tRLOH_min = 0,
117 .tRR_min = 20000,
118 .tRST_max = 500000000,
119 .tWB_max = 100000,
120 .tRP_min = 17000,
121 .tWC_min = 35000,
122 .tWH_min = 15000,
123 .tWHR_min = 80000,
124 .tWP_min = 17000,
125 .tWW_min = 100000,
126 },
127 /* Mode 3 */
128 {
129 .tADL_min = 100000,
130 .tALH_min = 5000,
131 .tALS_min = 10000,
132 .tAR_min = 10000,
133 .tCEA_max = 25000,
134 .tCEH_min = 20000,
135 .tCH_min = 5000,
136 .tCHZ_max = 50000,
137 .tCLH_min = 5000,
138 .tCLR_min = 10000,
139 .tCLS_min = 10000,
140 .tCOH_min = 15000,
141 .tCS_min = 25000,
142 .tDH_min = 5000,
143 .tDS_min = 10000,
144 .tFEAT_max = 1000000,
145 .tIR_min = 0,
146 .tITC_max = 1000000,
147 .tRC_min = 30000,
148 .tREA_max = 20000,
149 .tREH_min = 10000,
150 .tRHOH_min = 15000,
151 .tRHW_min = 100000,
152 .tRHZ_max = 100000,
153 .tRLOH_min = 0,
154 .tRP_min = 15000,
155 .tRR_min = 20000,
156 .tRST_max = 500000000,
157 .tWB_max = 100000,
158 .tWC_min = 30000,
159 .tWH_min = 10000,
160 .tWHR_min = 80000,
161 .tWP_min = 15000,
162 .tWW_min = 100000,
163 },
164 /* Mode 4 */
165 {
166 .tADL_min = 70000,
167 .tALH_min = 5000,
168 .tALS_min = 10000,
169 .tAR_min = 10000,
170 .tCEA_max = 25000,
171 .tCEH_min = 20000,
172 .tCH_min = 5000,
173 .tCHZ_max = 30000,
174 .tCLH_min = 5000,
175 .tCLR_min = 10000,
176 .tCLS_min = 10000,
177 .tCOH_min = 15000,
178 .tCS_min = 20000,
179 .tDH_min = 5000,
180 .tDS_min = 10000,
181 .tFEAT_max = 1000000,
182 .tIR_min = 0,
183 .tITC_max = 1000000,
184 .tRC_min = 25000,
185 .tREA_max = 20000,
186 .tREH_min = 10000,
187 .tRHOH_min = 15000,
188 .tRHW_min = 100000,
189 .tRHZ_max = 100000,
190 .tRLOH_min = 5000,
191 .tRP_min = 12000,
192 .tRR_min = 20000,
193 .tRST_max = 500000000,
194 .tWB_max = 100000,
195 .tWC_min = 25000,
196 .tWH_min = 10000,
197 .tWHR_min = 80000,
198 .tWP_min = 12000,
199 .tWW_min = 100000,
200 },
201 /* Mode 5 */
202 {
203 .tADL_min = 70000,
204 .tALH_min = 5000,
205 .tALS_min = 10000,
206 .tAR_min = 10000,
207 .tCEA_max = 25000,
208 .tCEH_min = 20000,
209 .tCH_min = 5000,
210 .tCHZ_max = 30000,
211 .tCLH_min = 5000,
212 .tCLR_min = 10000,
213 .tCLS_min = 10000,
214 .tCOH_min = 15000,
215 .tCS_min = 15000,
216 .tDH_min = 5000,
217 .tDS_min = 7000,
218 .tFEAT_max = 1000000,
219 .tIR_min = 0,
220 .tITC_max = 1000000,
221 .tRC_min = 20000,
222 .tREA_max = 16000,
223 .tREH_min = 7000,
224 .tRHOH_min = 15000,
225 .tRHW_min = 100000,
226 .tRHZ_max = 100000,
227 .tRLOH_min = 5000,
228 .tRP_min = 10000,
229 .tRR_min = 20000,
230 .tRST_max = 500000000,
231 .tWB_max = 100000,
232 .tWC_min = 20000,
233 .tWH_min = 7000,
234 .tWHR_min = 80000,
235 .tWP_min = 10000,
236 .tWW_min = 100000,
237 },
238 };
239
240 /**
241 * onfi_async_timing_mode_to_sdr_timings - [NAND Interface] Retrieve NAND
242 * timings according to the given ONFI timing mode
243 * @mode: ONFI timing mode
244 */
245 const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode)
246 {
247 if (mode < 0 || mode >= ARRAY_SIZE(onfi_sdr_timings))
248 return ERR_PTR(-EINVAL);
249
250 return &onfi_sdr_timings[mode];
251 }
252 EXPORT_SYMBOL(onfi_async_timing_mode_to_sdr_timings);