drivers/mtd/spi/sf_internal.h

   1 /*
   2  * SPI flash internal definitions
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef _SF_INTERNAL_H_
  11 #define _SF_INTERNAL_H_
  12
  13 #include <linux/types.h>
  14 #include <linux/compiler.h>
  15
  16 /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
  17 enum spi_dual_flash {
  18         SF_SINGLE_FLASH = 0,
  19         SF_DUAL_STACKED_FLASH   = 1 << 0,
  20         SF_DUAL_PARALLEL_FLASH  = 1 << 1,
  21 };
  22
  23 /* Enum list - Full read commands */
  24 enum spi_read_cmds {
  25         ARRAY_SLOW              = 1 << 0,
  26         ARRAY_FAST              = 1 << 1,
  27         DUAL_OUTPUT_FAST        = 1 << 2,
  28         DUAL_IO_FAST            = 1 << 3,
  29         QUAD_OUTPUT_FAST        = 1 << 4,
  30         QUAD_IO_FAST            = 1 << 5,
  31 };
  32
  33 /* Normal - Extended - Full command set */
  34 #define RD_NORM (ARRAY_SLOW | ARRAY_FAST)
  35 #define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
  36 #define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
  37
  38 /* sf param flags */
  39 enum {
  40         SECT_4K         = 1 << 0,
  41         SECT_32K        = 1 << 1,
  42         E_FSR           = 1 << 2,
  43         WR_QPP          = 1 << 3,
  44         SST_WP          = 1 << 4,
  45 };
  46
  47 #define SPI_FLASH_3B_ADDR_LEN           3
  48 #define SPI_FLASH_CMD_LEN               (1 + SPI_FLASH_3B_ADDR_LEN)
  49 #define SPI_FLASH_16MB_BOUN             0x1000000
  50
  51 /* CFI Manufacture ID's */
  52 #define SPI_FLASH_CFI_MFR_SPANSION      0x01
  53 #define SPI_FLASH_CFI_MFR_STMICRO       0x20
  54 #define SPI_FLASH_CFI_MFR_MACRONIX      0xc2
  55 #define SPI_FLASH_CFI_MFR_WINBOND       0xef
  56
  57 /* Erase commands */
  58 #define CMD_ERASE_4K                    0x20
  59 #define CMD_ERASE_32K                   0x52
  60 #define CMD_ERASE_CHIP                  0xc7
  61 #define CMD_ERASE_64K                   0xd8
  62
  63 /* Write commands */
  64 #define CMD_WRITE_STATUS                0x01
  65 #define CMD_PAGE_PROGRAM                0x02
  66 #define CMD_WRITE_DISABLE               0x04
  67 #define CMD_READ_STATUS         0x05
  68 #define CMD_QUAD_PAGE_PROGRAM           0x32
  69 #define CMD_READ_STATUS1                0x35
  70 #define CMD_WRITE_ENABLE                0x06
  71 #define CMD_READ_CONFIG         0x35
  72 #define CMD_FLAG_STATUS         0x70
  73
  74 /* Read commands */
  75 #define CMD_READ_ARRAY_SLOW             0x03
  76 #define CMD_READ_ARRAY_FAST             0x0b
  77 #define CMD_READ_DUAL_OUTPUT_FAST       0x3b
  78 #define CMD_READ_DUAL_IO_FAST           0xbb
  79 #define CMD_READ_QUAD_OUTPUT_FAST       0x6b
  80 #define CMD_READ_QUAD_IO_FAST           0xeb
  81 #define CMD_READ_ID                     0x9f
  82
  83 /* Bank addr access commands */
  84 #ifdef CONFIG_SPI_FLASH_BAR
  85 # define CMD_BANKADDR_BRWR              0x17
  86 # define CMD_BANKADDR_BRRD              0x16
  87 # define CMD_EXTNADDR_WREAR             0xC5
  88 # define CMD_EXTNADDR_RDEAR             0xC8
  89 #endif
  90
  91 /* Common status */
  92 #define STATUS_WIP                      (1 << 0)
  93 #define STATUS_QEB_WINSPAN              (1 << 1)
  94 #define STATUS_QEB_MXIC         (1 << 6)
  95 #define STATUS_PEC                      (1 << 7)
  96
  97 #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
  98 #define STATUS_SRWD                     (1 << 7) /* SR write protect */
  99 #endif
 100
 101 /* Flash timeout values */
 102 #define SPI_FLASH_PROG_TIMEOUT          (2 * CONFIG_SYS_HZ)
 103 #define SPI_FLASH_PAGE_ERASE_TIMEOUT            (5 * CONFIG_SYS_HZ)
 104 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT  (10 * CONFIG_SYS_HZ)
 105
 106 /* SST specific */
 107 #ifdef CONFIG_SPI_FLASH_SST
 108 # define CMD_SST_BP             0x02    /* Byte Program */
 109 # define CMD_SST_AAI_WP 0xAD    /* Auto Address Incr Word Program */
 110
 111 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 112                 const void *buf);
 113 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
 114                 const void *buf);
 115 #endif
 116
 117 /**
 118  * struct spi_flash_params - SPI/QSPI flash device params structure
 119  *
 120  * @name:               Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
 121  * @jedec:              Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
 122  * @ext_jedec:          Device ext_jedec ID
 123  * @sector_size:        Sector size of this device
 124  * @nr_sectors: No.of sectors on this device
 125  * @e_rd_cmd:           Enum list for read commands
 126  * @flags:              Important param, for flash specific behaviour
 127  */
 128 struct spi_flash_params {
 129         const char *name;
 130         u32 jedec;
 131         u16 ext_jedec;
 132         u32 sector_size;
 133         u32 nr_sectors;
 134         u8 e_rd_cmd;
 135         u16 flags;
 136 };
 137
 138 extern const struct spi_flash_params spi_flash_params_table[];
 139
 140 /* Send a single-byte command to the device and read the response */
 141 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
 142
 143 /*
 144  * Send a multi-byte command to the device and read the response. Used
 145  * for flash array reads, etc.
 146  */
 147 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
 148                 size_t cmd_len, void *data, size_t data_len);
 149
 150 /*
 151  * Send a multi-byte command to the device followed by (optional)
 152  * data. Used for programming the flash array, etc.
 153  */
 154 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
 155                 const void *data, size_t data_len);
 156
 157
 158 /* Flash erase(sectors) operation, support all possible erase commands */
 159 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
 160
 161 /* Read the status register */
 162 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
 163
 164 /* Program the status register */
 165 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
 166
 167 /* Read the config register */
 168 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
 169
 170 /* Program the config register */
 171 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
 172
 173 /* Enable writing on the SPI flash */
 174 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
 175 {
 176         return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
 177 }
 178
 179 /* Disable writing on the SPI flash */
 180 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
 181 {
 182         return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
 183 }
 184
 185 /*
 186  * Send the read status command to the device and wait for the wip
 187  * (write-in-progress) bit to clear itself.
 188  */
 189 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
 190
 191 /*
 192  * Used for spi_flash write operation
 193  * - SPI claim
 194  * - spi_flash_cmd_write_enable
 195  * - spi_flash_cmd_write
 196  * - spi_flash_cmd_wait_ready
 197  * - SPI release
 198  */
 199 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 200                 size_t cmd_len, const void *buf, size_t buf_len);
 201
 202 /*
 203  * Flash write operation, support all possible write commands.
 204  * Write the requested data out breaking it up into multiple write
 205  * commands as needed per the write size.
 206  */
 207 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 208                 size_t len, const void *buf);
 209
 210 /*
 211  * Same as spi_flash_cmd_read() except it also claims/releases the SPI
 212  * bus. Used as common part of the ->read() operation.
 213  */
 214 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 215                 size_t cmd_len, void *data, size_t data_len);
 216
 217 /* Flash read operation, support all possible read commands */
 218 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 219                 size_t len, void *data);
 220
 221 #endif /* _SF_INTERNAL_H_ */