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[people/ms/u-boot.git] / drivers / mtd / spi / sf_internal.h
1 /*
2 * SPI flash internal definitions
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef _SF_INTERNAL_H_
11 #define _SF_INTERNAL_H_
12
13 #define SPI_FLASH_3B_ADDR_LEN 3
14 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
15 #define SPI_FLASH_16MB_BOUN 0x1000000
16
17 /* CFI Manufacture ID's */
18 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
19 #define SPI_FLASH_CFI_MFR_STMICRO 0x20
20 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
21 #define SPI_FLASH_CFI_MFR_WINBOND 0xef
22
23 /* Erase commands */
24 #define CMD_ERASE_4K 0x20
25 #define CMD_ERASE_32K 0x52
26 #define CMD_ERASE_CHIP 0xc7
27 #define CMD_ERASE_64K 0xd8
28
29 /* Write commands */
30 #define CMD_WRITE_STATUS 0x01
31 #define CMD_PAGE_PROGRAM 0x02
32 #define CMD_WRITE_DISABLE 0x04
33 #define CMD_READ_STATUS 0x05
34 #define CMD_QUAD_PAGE_PROGRAM 0x32
35 #define CMD_READ_STATUS1 0x35
36 #define CMD_WRITE_ENABLE 0x06
37 #define CMD_READ_CONFIG 0x35
38 #define CMD_FLAG_STATUS 0x70
39
40 /* Read commands */
41 #define CMD_READ_ARRAY_SLOW 0x03
42 #define CMD_READ_ARRAY_FAST 0x0b
43 #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
44 #define CMD_READ_DUAL_IO_FAST 0xbb
45 #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
46 #define CMD_READ_QUAD_IO_FAST 0xeb
47 #define CMD_READ_ID 0x9f
48
49 /* Bank addr access commands */
50 #ifdef CONFIG_SPI_FLASH_BAR
51 # define CMD_BANKADDR_BRWR 0x17
52 # define CMD_BANKADDR_BRRD 0x16
53 # define CMD_EXTNADDR_WREAR 0xC5
54 # define CMD_EXTNADDR_RDEAR 0xC8
55 #endif
56
57 /* Common status */
58 #define STATUS_WIP (1 << 0)
59 #define STATUS_QEB_WINSPAN (1 << 1)
60 #define STATUS_QEB_MXIC (1 << 6)
61 #define STATUS_PEC (1 << 7)
62
63 /* Flash timeout values */
64 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
65 #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
66 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
67
68 /* SST specific */
69 #ifdef CONFIG_SPI_FLASH_SST
70 # define SST_WP 0x01 /* Supports AAI word program */
71 # define CMD_SST_BP 0x02 /* Byte Program */
72 # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
73
74 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
75 const void *buf);
76 #endif
77
78 /* Send a single-byte command to the device and read the response */
79 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
80
81 /*
82 * Send a multi-byte command to the device and read the response. Used
83 * for flash array reads, etc.
84 */
85 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
86 size_t cmd_len, void *data, size_t data_len);
87
88 /*
89 * Send a multi-byte command to the device followed by (optional)
90 * data. Used for programming the flash array, etc.
91 */
92 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
93 const void *data, size_t data_len);
94
95
96 /* Flash erase(sectors) operation, support all possible erase commands */
97 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
98
99 /* Read the status register */
100 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
101
102 /* Program the status register */
103 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
104
105 /* Read the config register */
106 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
107
108 /* Program the config register */
109 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
110
111 /* Enable writing on the SPI flash */
112 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
113 {
114 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
115 }
116
117 /* Disable writing on the SPI flash */
118 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
119 {
120 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
121 }
122
123 /*
124 * Send the read status command to the device and wait for the wip
125 * (write-in-progress) bit to clear itself.
126 */
127 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
128
129 /*
130 * Used for spi_flash write operation
131 * - SPI claim
132 * - spi_flash_cmd_write_enable
133 * - spi_flash_cmd_write
134 * - spi_flash_cmd_wait_ready
135 * - SPI release
136 */
137 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
138 size_t cmd_len, const void *buf, size_t buf_len);
139
140 /*
141 * Flash write operation, support all possible write commands.
142 * Write the requested data out breaking it up into multiple write
143 * commands as needed per the write size.
144 */
145 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
146 size_t len, const void *buf);
147
148 /*
149 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
150 * bus. Used as common part of the ->read() operation.
151 */
152 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
153 size_t cmd_len, void *data, size_t data_len);
154
155 /* Flash read operation, support all possible read commands */
156 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
157 size_t len, void *data);
158
159 #endif /* _SF_INTERNAL_H_ */