drivers/mtd/spi/sf_ops.c

   1 /*
   2  * SPI flash operations
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <errno.h>
  13 #include <malloc.h>
  14 #include <mapmem.h>
  15 #include <spi.h>
  16 #include <spi_flash.h>
  17 #include <watchdog.h>
  18 #include <linux/compiler.h>
  19 #include <linux/log2.h>
  20
  21 #include "sf_internal.h"
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 static void spi_flash_addr(u32 addr, u8 *cmd)
  26 {
  27         /* cmd[0] is actual command */
  28         cmd[1] = addr >> 16;
  29         cmd[2] = addr >> 8;
  30         cmd[3] = addr >> 0;
  31 }
  32
  33 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
  34 {
  35         int ret;
  36         u8 cmd;
  37
  38         cmd = CMD_READ_STATUS;
  39         ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  40         if (ret < 0) {
  41                 debug("SF: fail to read status register\n");
  42                 return ret;
  43         }
  44
  45         return 0;
  46 }
  47
  48 static int read_fsr(struct spi_flash *flash, u8 *fsr)
  49 {
  50         int ret;
  51         const u8 cmd = CMD_FLAG_STATUS;
  52
  53         ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
  54         if (ret < 0) {
  55                 debug("SF: fail to read flag status register\n");
  56                 return ret;
  57         }
  58
  59         return 0;
  60 }
  61
  62 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
  63 {
  64         u8 cmd;
  65         int ret;
  66
  67         cmd = CMD_WRITE_STATUS;
  68         ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  69         if (ret < 0) {
  70                 debug("SF: fail to write status register\n");
  71                 return ret;
  72         }
  73
  74         return 0;
  75 }
  76
  77 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  78 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
  79 {
  80         int ret;
  81         u8 cmd;
  82
  83         cmd = CMD_READ_CONFIG;
  84         ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  85         if (ret < 0) {
  86                 debug("SF: fail to read config register\n");
  87                 return ret;
  88         }
  89
  90         return 0;
  91 }
  92
  93 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
  94 {
  95         u8 data[2];
  96         u8 cmd;
  97         int ret;
  98
  99         ret = spi_flash_cmd_read_status(flash, &data[0]);
 100         if (ret < 0)
 101                 return ret;
 102
 103         cmd = CMD_WRITE_STATUS;
 104         data[1] = wc;
 105         ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
 106         if (ret) {
 107                 debug("SF: fail to write config register\n");
 108                 return ret;
 109         }
 110
 111         return 0;
 112 }
 113 #endif
 114
 115 #ifdef CONFIG_SPI_FLASH_BAR
 116 static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
 117 {
 118         u8 cmd, bank_sel;
 119         int ret;
 120
 121         bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
 122         if (bank_sel == flash->bank_curr)
 123                 goto bar_end;
 124
 125         cmd = flash->bank_write_cmd;
 126         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 127         if (ret < 0) {
 128                 debug("SF: fail to write bank register\n");
 129                 return ret;
 130         }
 131
 132 bar_end:
 133         flash->bank_curr = bank_sel;
 134         return flash->bank_curr;
 135 }
 136 #endif
 137
 138 #ifdef CONFIG_SF_DUAL_FLASH
 139 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
 140 {
 141         switch (flash->dual_flash) {
 142         case SF_DUAL_STACKED_FLASH:
 143                 if (*addr >= (flash->size >> 1)) {
 144                         *addr -= flash->size >> 1;
 145                         flash->spi->flags |= SPI_XFER_U_PAGE;
 146                 } else {
 147                         flash->spi->flags &= ~SPI_XFER_U_PAGE;
 148                 }
 149                 break;
 150         case SF_DUAL_PARALLEL_FLASH:
 151                 *addr >>= flash->shift;
 152                 break;
 153         default:
 154                 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
 155                 break;
 156         }
 157 }
 158 #endif
 159
 160 static int spi_flash_sr_ready(struct spi_flash *flash)
 161 {
 162         u8 sr;
 163         int ret;
 164
 165         ret = spi_flash_cmd_read_status(flash, &sr);
 166         if (ret < 0)
 167                 return ret;
 168
 169         return !(sr & STATUS_WIP);
 170 }
 171
 172 static int spi_flash_fsr_ready(struct spi_flash *flash)
 173 {
 174         u8 fsr;
 175         int ret;
 176
 177         ret = read_fsr(flash, &fsr);
 178         if (ret < 0)
 179                 return ret;
 180
 181         return fsr & STATUS_PEC;
 182 }
 183
 184 static int spi_flash_ready(struct spi_flash *flash)
 185 {
 186         int sr, fsr;
 187
 188         sr = spi_flash_sr_ready(flash);
 189         if (sr < 0)
 190                 return sr;
 191
 192         fsr = 1;
 193         if (flash->flags & SNOR_F_USE_FSR) {
 194                 fsr = spi_flash_fsr_ready(flash);
 195                 if (fsr < 0)
 196                         return fsr;
 197         }
 198
 199         return sr && fsr;
 200 }
 201
 202 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 203 {
 204         int timebase, ret;
 205
 206         timebase = get_timer(0);
 207
 208         while (get_timer(timebase) < timeout) {
 209                 ret = spi_flash_ready(flash);
 210                 if (ret < 0)
 211                         return ret;
 212                 if (ret)
 213                         return 0;
 214         }
 215
 216         printf("SF: Timeout!\n");
 217
 218         return -ETIMEDOUT;
 219 }
 220
 221 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 222                 size_t cmd_len, const void *buf, size_t buf_len)
 223 {
 224         struct spi_slave *spi = flash->spi;
 225         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 226         int ret;
 227
 228         if (buf == NULL)
 229                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 230
 231         ret = spi_claim_bus(flash->spi);
 232         if (ret) {
 233                 debug("SF: unable to claim SPI bus\n");
 234                 return ret;
 235         }
 236
 237         ret = spi_flash_cmd_write_enable(flash);
 238         if (ret < 0) {
 239                 debug("SF: enabling write failed\n");
 240                 return ret;
 241         }
 242
 243         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 244         if (ret < 0) {
 245                 debug("SF: write cmd failed\n");
 246                 return ret;
 247         }
 248
 249         ret = spi_flash_cmd_wait_ready(flash, timeout);
 250         if (ret < 0) {
 251                 debug("SF: write %s timed out\n",
 252                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 253                         "program" : "page erase");
 254                 return ret;
 255         }
 256
 257         spi_release_bus(spi);
 258
 259         return ret;
 260 }
 261
 262 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 263 {
 264         u32 erase_size, erase_addr;
 265         u8 cmd[SPI_FLASH_CMD_LEN];
 266         int ret = -1;
 267
 268         erase_size = flash->erase_size;
 269         if (offset % erase_size || len % erase_size) {
 270                 debug("SF: Erase offset/length not multiple of erase size\n");
 271                 return -1;
 272         }
 273
 274         if (flash->flash_is_locked) {
 275                 if (flash->flash_is_locked(flash, offset, len) > 0) {
 276                         printf("offset 0x%x is protected and cannot be erased\n",
 277                                offset);
 278                         return -EINVAL;
 279                 }
 280         }
 281
 282         cmd[0] = flash->erase_cmd;
 283         while (len) {
 284                 erase_addr = offset;
 285
 286 #ifdef CONFIG_SF_DUAL_FLASH
 287                 if (flash->dual_flash > SF_SINGLE_FLASH)
 288                         spi_flash_dual_flash(flash, &erase_addr);
 289 #endif
 290 #ifdef CONFIG_SPI_FLASH_BAR
 291                 ret = spi_flash_write_bank(flash, erase_addr);
 292                 if (ret < 0)
 293                         return ret;
 294 #endif
 295                 spi_flash_addr(erase_addr, cmd);
 296
 297                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 298                       cmd[2], cmd[3], erase_addr);
 299
 300                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 301                 if (ret < 0) {
 302                         debug("SF: erase failed\n");
 303                         break;
 304                 }
 305
 306                 offset += erase_size;
 307                 len -= erase_size;
 308         }
 309
 310         return ret;
 311 }
 312
 313 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 314                 size_t len, const void *buf)
 315 {
 316         unsigned long byte_addr, page_size;
 317         u32 write_addr;
 318         size_t chunk_len, actual;
 319         u8 cmd[SPI_FLASH_CMD_LEN];
 320         int ret = -1;
 321
 322         page_size = flash->page_size;
 323
 324         if (flash->flash_is_locked) {
 325                 if (flash->flash_is_locked(flash, offset, len) > 0) {
 326                         printf("offset 0x%x is protected and cannot be written\n",
 327                                offset);
 328                         return -EINVAL;
 329                 }
 330         }
 331
 332         cmd[0] = flash->write_cmd;
 333         for (actual = 0; actual < len; actual += chunk_len) {
 334                 write_addr = offset;
 335
 336 #ifdef CONFIG_SF_DUAL_FLASH
 337                 if (flash->dual_flash > SF_SINGLE_FLASH)
 338                         spi_flash_dual_flash(flash, &write_addr);
 339 #endif
 340 #ifdef CONFIG_SPI_FLASH_BAR
 341                 ret = spi_flash_write_bank(flash, write_addr);
 342                 if (ret < 0)
 343                         return ret;
 344 #endif
 345                 byte_addr = offset % page_size;
 346                 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
 347
 348                 if (flash->spi->max_write_size)
 349                         chunk_len = min(chunk_len,
 350                                         (size_t)flash->spi->max_write_size);
 351
 352                 spi_flash_addr(write_addr, cmd);
 353
 354                 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 355                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 356
 357                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 358                                         buf + actual, chunk_len);
 359                 if (ret < 0) {
 360                         debug("SF: write failed\n");
 361                         break;
 362                 }
 363
 364                 offset += chunk_len;
 365         }
 366
 367         return ret;
 368 }
 369
 370 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 371                 size_t cmd_len, void *data, size_t data_len)
 372 {
 373         struct spi_slave *spi = flash->spi;
 374         int ret;
 375
 376         ret = spi_claim_bus(flash->spi);
 377         if (ret) {
 378                 debug("SF: unable to claim SPI bus\n");
 379                 return ret;
 380         }
 381
 382         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 383         if (ret < 0) {
 384                 debug("SF: read cmd failed\n");
 385                 return ret;
 386         }
 387
 388         spi_release_bus(spi);
 389
 390         return ret;
 391 }
 392
 393 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
 394 {
 395         memcpy(data, offset, len);
 396 }
 397
 398 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 399                 size_t len, void *data)
 400 {
 401         u8 *cmd, cmdsz;
 402         u32 remain_len, read_len, read_addr;
 403         int bank_sel = 0;
 404         int ret = -1;
 405
 406         /* Handle memory-mapped SPI */
 407         if (flash->memory_map) {
 408                 ret = spi_claim_bus(flash->spi);
 409                 if (ret) {
 410                         debug("SF: unable to claim SPI bus\n");
 411                         return ret;
 412                 }
 413                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
 414                 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
 415                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
 416                 spi_release_bus(flash->spi);
 417                 return 0;
 418         }
 419
 420         cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
 421         cmd = calloc(1, cmdsz);
 422         if (!cmd) {
 423                 debug("SF: Failed to allocate cmd\n");
 424                 return -ENOMEM;
 425         }
 426
 427         cmd[0] = flash->read_cmd;
 428         while (len) {
 429                 read_addr = offset;
 430
 431 #ifdef CONFIG_SF_DUAL_FLASH
 432                 if (flash->dual_flash > SF_SINGLE_FLASH)
 433                         spi_flash_dual_flash(flash, &read_addr);
 434 #endif
 435 #ifdef CONFIG_SPI_FLASH_BAR
 436                 ret = spi_flash_write_bank(flash, read_addr);
 437                 if (ret < 0)
 438                         return ret;
 439                 bank_sel = flash->bank_curr;
 440 #endif
 441                 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
 442                                 (bank_sel + 1)) - offset;
 443                 if (len < remain_len)
 444                         read_len = len;
 445                 else
 446                         read_len = remain_len;
 447
 448                 spi_flash_addr(read_addr, cmd);
 449
 450                 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 451                 if (ret < 0) {
 452                         debug("SF: read failed\n");
 453                         break;
 454                 }
 455
 456                 offset += read_len;
 457                 len -= read_len;
 458                 data += read_len;
 459         }
 460
 461         free(cmd);
 462         return ret;
 463 }
 464
 465 #ifdef CONFIG_SPI_FLASH_SST
 466 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 467 {
 468         int ret;
 469         u8 cmd[4] = {
 470                 CMD_SST_BP,
 471                 offset >> 16,
 472                 offset >> 8,
 473                 offset,
 474         };
 475
 476         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 477               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 478
 479         ret = spi_flash_cmd_write_enable(flash);
 480         if (ret)
 481                 return ret;
 482
 483         ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
 484         if (ret)
 485                 return ret;
 486
 487         return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 488 }
 489
 490 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 491                 const void *buf)
 492 {
 493         size_t actual, cmd_len;
 494         int ret;
 495         u8 cmd[4];
 496
 497         ret = spi_claim_bus(flash->spi);
 498         if (ret) {
 499                 debug("SF: Unable to claim SPI bus\n");
 500                 return ret;
 501         }
 502
 503         /* If the data is not word aligned, write out leading single byte */
 504         actual = offset % 2;
 505         if (actual) {
 506                 ret = sst_byte_write(flash, offset, buf);
 507                 if (ret)
 508                         goto done;
 509         }
 510         offset += actual;
 511
 512         ret = spi_flash_cmd_write_enable(flash);
 513         if (ret)
 514                 goto done;
 515
 516         cmd_len = 4;
 517         cmd[0] = CMD_SST_AAI_WP;
 518         cmd[1] = offset >> 16;
 519         cmd[2] = offset >> 8;
 520         cmd[3] = offset;
 521
 522         for (; actual < len - 1; actual += 2) {
 523                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 524                       spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
 525                       cmd[0], offset);
 526
 527                 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
 528                                         buf + actual, 2);
 529                 if (ret) {
 530                         debug("SF: sst word program failed\n");
 531                         break;
 532                 }
 533
 534                 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 535                 if (ret)
 536                         break;
 537
 538                 cmd_len = 1;
 539                 offset += 2;
 540         }
 541
 542         if (!ret)
 543                 ret = spi_flash_cmd_write_disable(flash);
 544
 545         /* If there is a single trailing byte, write it out */
 546         if (!ret && actual != len)
 547                 ret = sst_byte_write(flash, offset, buf + actual);
 548
 549  done:
 550         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 551               ret ? "failure" : "success", len, offset - actual);
 552
 553         spi_release_bus(flash->spi);
 554         return ret;
 555 }
 556
 557 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
 558                 const void *buf)
 559 {
 560         size_t actual;
 561         int ret;
 562
 563         ret = spi_claim_bus(flash->spi);
 564         if (ret) {
 565                 debug("SF: Unable to claim SPI bus\n");
 566                 return ret;
 567         }
 568
 569         for (actual = 0; actual < len; actual++) {
 570                 ret = sst_byte_write(flash, offset, buf + actual);
 571                 if (ret) {
 572                         debug("SF: sst byte program failed\n");
 573                         break;
 574                 }
 575                 offset++;
 576         }
 577
 578         if (!ret)
 579                 ret = spi_flash_cmd_write_disable(flash);
 580
 581         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 582               ret ? "failure" : "success", len, offset - actual);
 583
 584         spi_release_bus(flash->spi);
 585         return ret;
 586 }
 587 #endif
 588
 589 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 590 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
 591                                  u32 *len)
 592 {
 593         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 594         int shift = ffs(mask) - 1;
 595         int pow;
 596
 597         if (!(sr & mask)) {
 598                 /* No protection */
 599                 *ofs = 0;
 600                 *len = 0;
 601         } else {
 602                 pow = ((sr & mask) ^ mask) >> shift;
 603                 *len = flash->size >> pow;
 604                 *ofs = flash->size - *len;
 605         }
 606 }
 607
 608 /*
 609  * Return 1 if the entire region is locked, 0 otherwise
 610  */
 611 static int stm_is_locked_sr(struct spi_flash *flash, u32 ofs, u32 len,
 612                             u8 sr)
 613 {
 614         loff_t lock_offs;
 615         u32 lock_len;
 616
 617         stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
 618
 619         return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
 620 }
 621
 622 /*
 623  * Check if a region of the flash is (completely) locked. See stm_lock() for
 624  * more info.
 625  *
 626  * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
 627  * negative on errors.
 628  */
 629 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
 630 {
 631         int status;
 632         u8 sr;
 633
 634         status = spi_flash_cmd_read_status(flash, &sr);
 635         if (status < 0)
 636                 return status;
 637
 638         return stm_is_locked_sr(flash, ofs, len, sr);
 639 }
 640
 641 /*
 642  * Lock a region of the flash. Compatible with ST Micro and similar flash.
 643  * Supports only the block protection bits BP{0,1,2} in the status register
 644  * (SR). Does not support these features found in newer SR bitfields:
 645  *   - TB: top/bottom protect - only handle TB=0 (top protect)
 646  *   - SEC: sector/block protect - only handle SEC=0 (block protect)
 647  *   - CMP: complement protect - only support CMP=0 (range is not complemented)
 648  *
 649  * Sample table portion for 8MB flash (Winbond w25q64fw):
 650  *
 651  *   SEC  |  TB   |  BP2  |  BP1  |  BP0  |  Prot Length  | Protected Portion
 652  *  --------------------------------------------------------------------------
 653  *    X   |   X   |   0   |   0   |   0   |  NONE         | NONE
 654  *    0   |   0   |   0   |   0   |   1   |  128 KB       | Upper 1/64
 655  *    0   |   0   |   0   |   1   |   0   |  256 KB       | Upper 1/32
 656  *    0   |   0   |   0   |   1   |   1   |  512 KB       | Upper 1/16
 657  *    0   |   0   |   1   |   0   |   0   |  1 MB         | Upper 1/8
 658  *    0   |   0   |   1   |   0   |   1   |  2 MB         | Upper 1/4
 659  *    0   |   0   |   1   |   1   |   0   |  4 MB         | Upper 1/2
 660  *    X   |   X   |   1   |   1   |   1   |  8 MB         | ALL
 661  *
 662  * Returns negative on errors, 0 on success.
 663  */
 664 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
 665 {
 666         u8 status_old, status_new;
 667         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 668         u8 shift = ffs(mask) - 1, pow, val;
 669         int ret;
 670
 671         ret = spi_flash_cmd_read_status(flash, &status_old);
 672         if (ret < 0)
 673                 return ret;
 674
 675         /* SPI NOR always locks to the end */
 676         if (ofs + len != flash->size) {
 677                 /* Does combined region extend to end? */
 678                 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
 679                                       status_old))
 680                         return -EINVAL;
 681                 len = flash->size - ofs;
 682         }
 683
 684         /*
 685          * Need smallest pow such that:
 686          *
 687          *   1 / (2^pow) <= (len / size)
 688          *
 689          * so (assuming power-of-2 size) we do:
 690          *
 691          *   pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
 692          */
 693         pow = ilog2(flash->size) - ilog2(len);
 694         val = mask - (pow << shift);
 695         if (val & ~mask)
 696                 return -EINVAL;
 697
 698         /* Don't "lock" with no region! */
 699         if (!(val & mask))
 700                 return -EINVAL;
 701
 702         status_new = (status_old & ~mask) | val;
 703
 704         /* Only modify protection if it will not unlock other areas */
 705         if ((status_new & mask) <= (status_old & mask))
 706                 return -EINVAL;
 707
 708         spi_flash_cmd_write_status(flash, status_new);
 709
 710         return 0;
 711 }
 712
 713 /*
 714  * Unlock a region of the flash. See stm_lock() for more info
 715  *
 716  * Returns negative on errors, 0 on success.
 717  */
 718 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 719 {
 720         uint8_t status_old, status_new;
 721         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 722         u8 shift = ffs(mask) - 1, pow, val;
 723         int ret;
 724
 725         ret = spi_flash_cmd_read_status(flash, &status_old);
 726         if (ret < 0)
 727                 return ret;
 728
 729         /* Cannot unlock; would unlock larger region than requested */
 730         if (stm_is_locked_sr(flash, status_old, ofs - flash->erase_size,
 731                              flash->erase_size))
 732                 return -EINVAL;
 733         /*
 734          * Need largest pow such that:
 735          *
 736          *   1 / (2^pow) >= (len / size)
 737          *
 738          * so (assuming power-of-2 size) we do:
 739          *
 740          *   pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
 741          */
 742         pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
 743         if (ofs + len == flash->size) {
 744                 val = 0; /* fully unlocked */
 745         } else {
 746                 val = mask - (pow << shift);
 747                 /* Some power-of-two sizes are not supported */
 748                 if (val & ~mask)
 749                         return -EINVAL;
 750         }
 751
 752         status_new = (status_old & ~mask) | val;
 753
 754         /* Only modify protection if it will not lock other areas */
 755         if ((status_new & mask) >= (status_old & mask))
 756                 return -EINVAL;
 757
 758         spi_flash_cmd_write_status(flash, status_new);
 759
 760         return 0;
 761 }
 762 #endif
 763
 764
 765 /* Read commands array */
 766 static u8 spi_read_cmds_array[] = {
 767         CMD_READ_ARRAY_SLOW,
 768         CMD_READ_ARRAY_FAST,
 769         CMD_READ_DUAL_OUTPUT_FAST,
 770         CMD_READ_DUAL_IO_FAST,
 771         CMD_READ_QUAD_OUTPUT_FAST,
 772         CMD_READ_QUAD_IO_FAST,
 773 };
 774
 775 #ifdef CONFIG_SPI_FLASH_MACRONIX
 776 static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
 777 {
 778         u8 qeb_status;
 779         int ret;
 780
 781         ret = spi_flash_cmd_read_status(flash, &qeb_status);
 782         if (ret < 0)
 783                 return ret;
 784
 785         if (qeb_status & STATUS_QEB_MXIC) {
 786                 debug("SF: mxic: QEB is already set\n");
 787         } else {
 788                 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
 789                 if (ret < 0)
 790                         return ret;
 791         }
 792
 793         return ret;
 794 }
 795 #endif
 796
 797 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 798 static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
 799 {
 800         u8 qeb_status;
 801         int ret;
 802
 803         ret = spi_flash_cmd_read_config(flash, &qeb_status);
 804         if (ret < 0)
 805                 return ret;
 806
 807         if (qeb_status & STATUS_QEB_WINSPAN) {
 808                 debug("SF: winspan: QEB is already set\n");
 809         } else {
 810                 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
 811                 if (ret < 0)
 812                         return ret;
 813         }
 814
 815         return ret;
 816 }
 817 #endif
 818
 819 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
 820 {
 821         switch (idcode0) {
 822 #ifdef CONFIG_SPI_FLASH_MACRONIX
 823         case SPI_FLASH_CFI_MFR_MACRONIX:
 824                 return spi_flash_set_qeb_mxic(flash);
 825 #endif
 826 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 827         case SPI_FLASH_CFI_MFR_SPANSION:
 828         case SPI_FLASH_CFI_MFR_WINBOND:
 829                 return spi_flash_set_qeb_winspan(flash);
 830 #endif
 831 #ifdef CONFIG_SPI_FLASH_STMICRO
 832         case SPI_FLASH_CFI_MFR_STMICRO:
 833                 debug("SF: QEB is volatile for %02x flash\n", idcode0);
 834                 return 0;
 835 #endif
 836         default:
 837                 printf("SF: Need set QEB func for %02x flash\n", idcode0);
 838                 return -1;
 839         }
 840 }
 841
 842 #ifdef CONFIG_SPI_FLASH_BAR
 843 static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
 844 {
 845         u8 curr_bank = 0;
 846         int ret;
 847
 848         if (flash->size <= SPI_FLASH_16MB_BOUN)
 849                 goto bank_end;
 850
 851         switch (idcode0) {
 852         case SPI_FLASH_CFI_MFR_SPANSION:
 853                 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
 854                 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
 855         default:
 856                 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
 857                 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
 858         }
 859
 860         ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
 861                                     &curr_bank, 1);
 862         if (ret) {
 863                 debug("SF: fail to read bank addr register\n");
 864                 return ret;
 865         }
 866
 867 bank_end:
 868         flash->bank_curr = curr_bank;
 869         return 0;
 870 }
 871 #endif
 872
 873 #if CONFIG_IS_ENABLED(OF_CONTROL)
 874 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 875 {
 876         fdt_addr_t addr;
 877         fdt_size_t size;
 878         int node;
 879
 880         /* If there is no node, do nothing */
 881         node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
 882         if (node < 0)
 883                 return 0;
 884
 885         addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
 886         if (addr == FDT_ADDR_T_NONE) {
 887                 debug("%s: Cannot decode address\n", __func__);
 888                 return 0;
 889         }
 890
 891         if (flash->size != size) {
 892                 debug("%s: Memory map must cover entire device\n", __func__);
 893                 return -1;
 894         }
 895         flash->memory_map = map_sysmem(addr, size);
 896
 897         return 0;
 898 }
 899 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 900
 901 int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash)
 902 {
 903         const struct spi_flash_params *params;
 904         u16 jedec, ext_jedec;
 905         u8 idcode[5];
 906         u8 cmd;
 907         int ret;
 908
 909         /* Read the ID codes */
 910         ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
 911         if (ret) {
 912                 printf("SF: Failed to get idcodes\n");
 913                 return -EINVAL;
 914         }
 915
 916 #ifdef DEBUG
 917         printf("SF: Got idcodes\n");
 918         print_buffer(0, idcode, 1, sizeof(idcode), 0);
 919 #endif
 920
 921         jedec = idcode[1] << 8 | idcode[2];
 922         ext_jedec = idcode[3] << 8 | idcode[4];
 923
 924         /* Validate params from spi_flash_params table */
 925         params = spi_flash_params_table;
 926         for (; params->name != NULL; params++) {
 927                 if ((params->jedec >> 16) == idcode[0]) {
 928                         if ((params->jedec & 0xFFFF) == jedec) {
 929                                 if (params->ext_jedec == 0)
 930                                         break;
 931                                 else if (params->ext_jedec == ext_jedec)
 932                                         break;
 933                         }
 934                 }
 935         }
 936
 937         if (!params->name) {
 938                 printf("SF: Unsupported flash IDs: ");
 939                 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
 940                        idcode[0], jedec, ext_jedec);
 941                 return -EPROTONOSUPPORT;
 942         }
 943
 944         /* Flash powers up read-only, so clear BP# bits */
 945 #if defined(CONFIG_SPI_FLASH_ATMEL) || \
 946         defined(CONFIG_SPI_FLASH_MACRONIX) || \
 947         defined(CONFIG_SPI_FLASH_SST)
 948                 spi_flash_cmd_write_status(flash, 0);
 949 #endif
 950
 951         /* Assign spi data */
 952         flash->spi = spi;
 953         flash->name = params->name;
 954         flash->memory_map = spi->memory_map;
 955         flash->dual_flash = flash->spi->option;
 956
 957         /* Assign spi flash flags */
 958         if (params->flags & SST_WR)
 959                 flash->flags |= SNOR_F_SST_WR;
 960
 961         /* Assign spi_flash ops */
 962 #ifndef CONFIG_DM_SPI_FLASH
 963         flash->write = spi_flash_cmd_write_ops;
 964 #if defined(CONFIG_SPI_FLASH_SST)
 965         if (flash->flags & SNOR_F_SST_WR) {
 966                 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
 967                         flash->write = sst_write_bp;
 968                 else
 969                         flash->write = sst_write_wp;
 970         }
 971 #endif
 972         flash->erase = spi_flash_cmd_erase_ops;
 973         flash->read = spi_flash_cmd_read_ops;
 974 #endif
 975
 976         /* lock hooks are flash specific - assign them based on idcode0 */
 977         switch (idcode[0]) {
 978 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 979         case SPI_FLASH_CFI_MFR_STMICRO:
 980         case SPI_FLASH_CFI_MFR_SST:
 981                 flash->flash_lock = stm_lock;
 982                 flash->flash_unlock = stm_unlock;
 983                 flash->flash_is_locked = stm_is_locked;
 984 #endif
 985                 break;
 986         default:
 987                 debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
 988         }
 989
 990         /* Compute the flash size */
 991         flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
 992         /*
 993          * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
 994          * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
 995          * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
 996          * have 256b pages.
 997          */
 998         if (ext_jedec == 0x4d00) {
 999                 if ((jedec == 0x0215) || (jedec == 0x216))
1000                         flash->page_size = 256;
1001                 else
1002                         flash->page_size = 512;
1003         } else {
1004                 flash->page_size = 256;
1005         }
1006         flash->page_size <<= flash->shift;
1007         flash->sector_size = params->sector_size << flash->shift;
1008         flash->size = flash->sector_size * params->nr_sectors << flash->shift;
1009 #ifdef CONFIG_SF_DUAL_FLASH
1010         if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1011                 flash->size <<= 1;
1012 #endif
1013
1014         /* Compute erase sector and command */
1015         if (params->flags & SECT_4K) {
1016                 flash->erase_cmd = CMD_ERASE_4K;
1017                 flash->erase_size = 4096 << flash->shift;
1018         } else if (params->flags & SECT_32K) {
1019                 flash->erase_cmd = CMD_ERASE_32K;
1020                 flash->erase_size = 32768 << flash->shift;
1021         } else {
1022                 flash->erase_cmd = CMD_ERASE_64K;
1023                 flash->erase_size = flash->sector_size;
1024         }
1025
1026         /* Now erase size becomes valid sector size */
1027         flash->sector_size = flash->erase_size;
1028
1029         /* Look for the fastest read cmd */
1030         cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
1031         if (cmd) {
1032                 cmd = spi_read_cmds_array[cmd - 1];
1033                 flash->read_cmd = cmd;
1034         } else {
1035                 /* Go for default supported read cmd */
1036                 flash->read_cmd = CMD_READ_ARRAY_FAST;
1037         }
1038
1039         /* Not require to look for fastest only two write cmds yet */
1040         if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
1041                 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1042         else
1043                 /* Go for default supported write cmd */
1044                 flash->write_cmd = CMD_PAGE_PROGRAM;
1045
1046         /* Set the quad enable bit - only for quad commands */
1047         if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1048             (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1049             (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1050                 ret = spi_flash_set_qeb(flash, idcode[0]);
1051                 if (ret) {
1052                         debug("SF: Fail to set QEB for %02x\n", idcode[0]);
1053                         return -EINVAL;
1054                 }
1055         }
1056
1057         /* Read dummy_byte: dummy byte is determined based on the
1058          * dummy cycles of a particular command.
1059          * Fast commands - dummy_byte = dummy_cycles/8
1060          * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1061          * For I/O commands except cmd[0] everything goes on no.of lines
1062          * based on particular command but incase of fast commands except
1063          * data all go on single line irrespective of command.
1064          */
1065         switch (flash->read_cmd) {
1066         case CMD_READ_QUAD_IO_FAST:
1067                 flash->dummy_byte = 2;
1068                 break;
1069         case CMD_READ_ARRAY_SLOW:
1070                 flash->dummy_byte = 0;
1071                 break;
1072         default:
1073                 flash->dummy_byte = 1;
1074         }
1075
1076 #ifdef CONFIG_SPI_FLASH_STMICRO
1077         if (params->flags & E_FSR)
1078                 flash->flags |= SNOR_F_USE_FSR;
1079 #endif
1080
1081         /* Configure the BAR - discover bank cmds and read current bank */
1082 #ifdef CONFIG_SPI_FLASH_BAR
1083         ret = spi_flash_read_bank(flash, idcode[0]);
1084         if (ret < 0)
1085                 return ret;
1086 #endif
1087
1088 #if CONFIG_IS_ENABLED(OF_CONTROL)
1089         ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
1090         if (ret) {
1091                 debug("SF: FDT decode error\n");
1092                 return -EINVAL;
1093         }
1094 #endif
1095
1096 #ifndef CONFIG_SPL_BUILD
1097         printf("SF: Detected %s with page size ", flash->name);
1098         print_size(flash->page_size, ", erase size ");
1099         print_size(flash->erase_size, ", total ");
1100         print_size(flash->size, "");
1101         if (flash->memory_map)
1102                 printf(", mapped at %p", flash->memory_map);
1103         puts("\n");
1104 #endif
1105
1106 #ifndef CONFIG_SPI_FLASH_BAR
1107         if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1108              (flash->size > SPI_FLASH_16MB_BOUN)) ||
1109              ((flash->dual_flash > SF_SINGLE_FLASH) &&
1110              (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1111                 puts("SF: Warning - Only lower 16MiB accessible,");
1112                 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
1113         }
1114 #endif
1115
1116         return ret;
1117 }