drivers/mtd/spi/sf_ops.c

   1 /*
   2  * SPI flash operations
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <errno.h>
  13 #include <malloc.h>
  14 #include <mapmem.h>
  15 #include <spi.h>
  16 #include <spi_flash.h>
  17 #include <watchdog.h>
  18 #include <linux/compiler.h>
  19 #include <linux/log2.h>
  20
  21 #include "sf_internal.h"
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 static void spi_flash_addr(u32 addr, u8 *cmd)
  26 {
  27         /* cmd[0] is actual command */
  28         cmd[1] = addr >> 16;
  29         cmd[2] = addr >> 8;
  30         cmd[3] = addr >> 0;
  31 }
  32
  33 /* Read commands array */
  34 static u8 spi_read_cmds_array[] = {
  35         CMD_READ_ARRAY_SLOW,
  36         CMD_READ_ARRAY_FAST,
  37         CMD_READ_DUAL_OUTPUT_FAST,
  38         CMD_READ_DUAL_IO_FAST,
  39         CMD_READ_QUAD_OUTPUT_FAST,
  40         CMD_READ_QUAD_IO_FAST,
  41 };
  42
  43 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
  44 {
  45         int ret;
  46         u8 cmd;
  47
  48         cmd = CMD_READ_STATUS;
  49         ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  50         if (ret < 0) {
  51                 debug("SF: fail to read status register\n");
  52                 return ret;
  53         }
  54
  55         return 0;
  56 }
  57
  58 static int read_fsr(struct spi_flash *flash, u8 *fsr)
  59 {
  60         int ret;
  61         const u8 cmd = CMD_FLAG_STATUS;
  62
  63         ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
  64         if (ret < 0) {
  65                 debug("SF: fail to read flag status register\n");
  66                 return ret;
  67         }
  68
  69         return 0;
  70 }
  71
  72 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
  73 {
  74         u8 cmd;
  75         int ret;
  76
  77         cmd = CMD_WRITE_STATUS;
  78         ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  79         if (ret < 0) {
  80                 debug("SF: fail to write status register\n");
  81                 return ret;
  82         }
  83
  84         return 0;
  85 }
  86
  87 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  88 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
  89 {
  90         int ret;
  91         u8 cmd;
  92
  93         cmd = CMD_READ_CONFIG;
  94         ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  95         if (ret < 0) {
  96                 debug("SF: fail to read config register\n");
  97                 return ret;
  98         }
  99
 100         return 0;
 101 }
 102
 103 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
 104 {
 105         u8 data[2];
 106         u8 cmd;
 107         int ret;
 108
 109         ret = spi_flash_cmd_read_status(flash, &data[0]);
 110         if (ret < 0)
 111                 return ret;
 112
 113         cmd = CMD_WRITE_STATUS;
 114         data[1] = wc;
 115         ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
 116         if (ret) {
 117                 debug("SF: fail to write config register\n");
 118                 return ret;
 119         }
 120
 121         return 0;
 122 }
 123 #endif
 124
 125 #ifdef CONFIG_SPI_FLASH_BAR
 126 static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
 127 {
 128         u8 cmd, bank_sel;
 129         int ret;
 130
 131         bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
 132         if (bank_sel == flash->bank_curr)
 133                 goto bar_end;
 134
 135         cmd = flash->bank_write_cmd;
 136         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 137         if (ret < 0) {
 138                 debug("SF: fail to write bank register\n");
 139                 return ret;
 140         }
 141
 142 bar_end:
 143         flash->bank_curr = bank_sel;
 144         return flash->bank_curr;
 145 }
 146
 147 static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
 148 {
 149         u8 curr_bank = 0;
 150         int ret;
 151
 152         if (flash->size <= SPI_FLASH_16MB_BOUN)
 153                 goto bank_end;
 154
 155         switch (idcode0) {
 156         case SPI_FLASH_CFI_MFR_SPANSION:
 157                 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
 158                 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
 159         default:
 160                 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
 161                 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
 162         }
 163
 164         ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
 165                                     &curr_bank, 1);
 166         if (ret) {
 167                 debug("SF: fail to read bank addr register\n");
 168                 return ret;
 169         }
 170
 171 bank_end:
 172         flash->bank_curr = curr_bank;
 173         return 0;
 174 }
 175 #endif
 176
 177 #ifdef CONFIG_SF_DUAL_FLASH
 178 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
 179 {
 180         switch (flash->dual_flash) {
 181         case SF_DUAL_STACKED_FLASH:
 182                 if (*addr >= (flash->size >> 1)) {
 183                         *addr -= flash->size >> 1;
 184                         flash->spi->flags |= SPI_XFER_U_PAGE;
 185                 } else {
 186                         flash->spi->flags &= ~SPI_XFER_U_PAGE;
 187                 }
 188                 break;
 189         case SF_DUAL_PARALLEL_FLASH:
 190                 *addr >>= flash->shift;
 191                 break;
 192         default:
 193                 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
 194                 break;
 195         }
 196 }
 197 #endif
 198
 199 static int spi_flash_sr_ready(struct spi_flash *flash)
 200 {
 201         u8 sr;
 202         int ret;
 203
 204         ret = spi_flash_cmd_read_status(flash, &sr);
 205         if (ret < 0)
 206                 return ret;
 207
 208         return !(sr & STATUS_WIP);
 209 }
 210
 211 static int spi_flash_fsr_ready(struct spi_flash *flash)
 212 {
 213         u8 fsr;
 214         int ret;
 215
 216         ret = read_fsr(flash, &fsr);
 217         if (ret < 0)
 218                 return ret;
 219
 220         return fsr & STATUS_PEC;
 221 }
 222
 223 static int spi_flash_ready(struct spi_flash *flash)
 224 {
 225         int sr, fsr;
 226
 227         sr = spi_flash_sr_ready(flash);
 228         if (sr < 0)
 229                 return sr;
 230
 231         fsr = 1;
 232         if (flash->flags & SNOR_F_USE_FSR) {
 233                 fsr = spi_flash_fsr_ready(flash);
 234                 if (fsr < 0)
 235                         return fsr;
 236         }
 237
 238         return sr && fsr;
 239 }
 240
 241 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 242 {
 243         int timebase, ret;
 244
 245         timebase = get_timer(0);
 246
 247         while (get_timer(timebase) < timeout) {
 248                 ret = spi_flash_ready(flash);
 249                 if (ret < 0)
 250                         return ret;
 251                 if (ret)
 252                         return 0;
 253         }
 254
 255         printf("SF: Timeout!\n");
 256
 257         return -ETIMEDOUT;
 258 }
 259
 260 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 261                 size_t cmd_len, const void *buf, size_t buf_len)
 262 {
 263         struct spi_slave *spi = flash->spi;
 264         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 265         int ret;
 266
 267         if (buf == NULL)
 268                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 269
 270         ret = spi_claim_bus(flash->spi);
 271         if (ret) {
 272                 debug("SF: unable to claim SPI bus\n");
 273                 return ret;
 274         }
 275
 276         ret = spi_flash_cmd_write_enable(flash);
 277         if (ret < 0) {
 278                 debug("SF: enabling write failed\n");
 279                 return ret;
 280         }
 281
 282         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 283         if (ret < 0) {
 284                 debug("SF: write cmd failed\n");
 285                 return ret;
 286         }
 287
 288         ret = spi_flash_cmd_wait_ready(flash, timeout);
 289         if (ret < 0) {
 290                 debug("SF: write %s timed out\n",
 291                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 292                         "program" : "page erase");
 293                 return ret;
 294         }
 295
 296         spi_release_bus(spi);
 297
 298         return ret;
 299 }
 300
 301 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 302 {
 303         u32 erase_size, erase_addr;
 304         u8 cmd[SPI_FLASH_CMD_LEN];
 305         int ret = -1;
 306
 307         erase_size = flash->erase_size;
 308         if (offset % erase_size || len % erase_size) {
 309                 debug("SF: Erase offset/length not multiple of erase size\n");
 310                 return -1;
 311         }
 312
 313         if (flash->flash_is_locked) {
 314                 if (flash->flash_is_locked(flash, offset, len) > 0) {
 315                         printf("offset 0x%x is protected and cannot be erased\n",
 316                                offset);
 317                         return -EINVAL;
 318                 }
 319         }
 320
 321         cmd[0] = flash->erase_cmd;
 322         while (len) {
 323                 erase_addr = offset;
 324
 325 #ifdef CONFIG_SF_DUAL_FLASH
 326                 if (flash->dual_flash > SF_SINGLE_FLASH)
 327                         spi_flash_dual_flash(flash, &erase_addr);
 328 #endif
 329 #ifdef CONFIG_SPI_FLASH_BAR
 330                 ret = spi_flash_write_bank(flash, erase_addr);
 331                 if (ret < 0)
 332                         return ret;
 333 #endif
 334                 spi_flash_addr(erase_addr, cmd);
 335
 336                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 337                       cmd[2], cmd[3], erase_addr);
 338
 339                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 340                 if (ret < 0) {
 341                         debug("SF: erase failed\n");
 342                         break;
 343                 }
 344
 345                 offset += erase_size;
 346                 len -= erase_size;
 347         }
 348
 349         return ret;
 350 }
 351
 352 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 353                 size_t len, const void *buf)
 354 {
 355         unsigned long byte_addr, page_size;
 356         u32 write_addr;
 357         size_t chunk_len, actual;
 358         u8 cmd[SPI_FLASH_CMD_LEN];
 359         int ret = -1;
 360
 361         page_size = flash->page_size;
 362
 363         if (flash->flash_is_locked) {
 364                 if (flash->flash_is_locked(flash, offset, len) > 0) {
 365                         printf("offset 0x%x is protected and cannot be written\n",
 366                                offset);
 367                         return -EINVAL;
 368                 }
 369         }
 370
 371         cmd[0] = flash->write_cmd;
 372         for (actual = 0; actual < len; actual += chunk_len) {
 373                 write_addr = offset;
 374
 375 #ifdef CONFIG_SF_DUAL_FLASH
 376                 if (flash->dual_flash > SF_SINGLE_FLASH)
 377                         spi_flash_dual_flash(flash, &write_addr);
 378 #endif
 379 #ifdef CONFIG_SPI_FLASH_BAR
 380                 ret = spi_flash_write_bank(flash, write_addr);
 381                 if (ret < 0)
 382                         return ret;
 383 #endif
 384                 byte_addr = offset % page_size;
 385                 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
 386
 387                 if (flash->spi->max_write_size)
 388                         chunk_len = min(chunk_len,
 389                                         (size_t)flash->spi->max_write_size);
 390
 391                 spi_flash_addr(write_addr, cmd);
 392
 393                 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 394                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 395
 396                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 397                                         buf + actual, chunk_len);
 398                 if (ret < 0) {
 399                         debug("SF: write failed\n");
 400                         break;
 401                 }
 402
 403                 offset += chunk_len;
 404         }
 405
 406         return ret;
 407 }
 408
 409 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 410                 size_t cmd_len, void *data, size_t data_len)
 411 {
 412         struct spi_slave *spi = flash->spi;
 413         int ret;
 414
 415         ret = spi_claim_bus(flash->spi);
 416         if (ret) {
 417                 debug("SF: unable to claim SPI bus\n");
 418                 return ret;
 419         }
 420
 421         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 422         if (ret < 0) {
 423                 debug("SF: read cmd failed\n");
 424                 return ret;
 425         }
 426
 427         spi_release_bus(spi);
 428
 429         return ret;
 430 }
 431
 432 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
 433 {
 434         memcpy(data, offset, len);
 435 }
 436
 437 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 438                 size_t len, void *data)
 439 {
 440         u8 *cmd, cmdsz;
 441         u32 remain_len, read_len, read_addr;
 442         int bank_sel = 0;
 443         int ret = -1;
 444
 445         /* Handle memory-mapped SPI */
 446         if (flash->memory_map) {
 447                 ret = spi_claim_bus(flash->spi);
 448                 if (ret) {
 449                         debug("SF: unable to claim SPI bus\n");
 450                         return ret;
 451                 }
 452                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
 453                 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
 454                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
 455                 spi_release_bus(flash->spi);
 456                 return 0;
 457         }
 458
 459         cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
 460         cmd = calloc(1, cmdsz);
 461         if (!cmd) {
 462                 debug("SF: Failed to allocate cmd\n");
 463                 return -ENOMEM;
 464         }
 465
 466         cmd[0] = flash->read_cmd;
 467         while (len) {
 468                 read_addr = offset;
 469
 470 #ifdef CONFIG_SF_DUAL_FLASH
 471                 if (flash->dual_flash > SF_SINGLE_FLASH)
 472                         spi_flash_dual_flash(flash, &read_addr);
 473 #endif
 474 #ifdef CONFIG_SPI_FLASH_BAR
 475                 ret = spi_flash_write_bank(flash, read_addr);
 476                 if (ret < 0)
 477                         return ret;
 478                 bank_sel = flash->bank_curr;
 479 #endif
 480                 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
 481                                 (bank_sel + 1)) - offset;
 482                 if (len < remain_len)
 483                         read_len = len;
 484                 else
 485                         read_len = remain_len;
 486
 487                 spi_flash_addr(read_addr, cmd);
 488
 489                 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 490                 if (ret < 0) {
 491                         debug("SF: read failed\n");
 492                         break;
 493                 }
 494
 495                 offset += read_len;
 496                 len -= read_len;
 497                 data += read_len;
 498         }
 499
 500         free(cmd);
 501         return ret;
 502 }
 503
 504 #ifdef CONFIG_SPI_FLASH_SST
 505 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 506 {
 507         int ret;
 508         u8 cmd[4] = {
 509                 CMD_SST_BP,
 510                 offset >> 16,
 511                 offset >> 8,
 512                 offset,
 513         };
 514
 515         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 516               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 517
 518         ret = spi_flash_cmd_write_enable(flash);
 519         if (ret)
 520                 return ret;
 521
 522         ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
 523         if (ret)
 524                 return ret;
 525
 526         return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 527 }
 528
 529 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 530                 const void *buf)
 531 {
 532         size_t actual, cmd_len;
 533         int ret;
 534         u8 cmd[4];
 535
 536         ret = spi_claim_bus(flash->spi);
 537         if (ret) {
 538                 debug("SF: Unable to claim SPI bus\n");
 539                 return ret;
 540         }
 541
 542         /* If the data is not word aligned, write out leading single byte */
 543         actual = offset % 2;
 544         if (actual) {
 545                 ret = sst_byte_write(flash, offset, buf);
 546                 if (ret)
 547                         goto done;
 548         }
 549         offset += actual;
 550
 551         ret = spi_flash_cmd_write_enable(flash);
 552         if (ret)
 553                 goto done;
 554
 555         cmd_len = 4;
 556         cmd[0] = CMD_SST_AAI_WP;
 557         cmd[1] = offset >> 16;
 558         cmd[2] = offset >> 8;
 559         cmd[3] = offset;
 560
 561         for (; actual < len - 1; actual += 2) {
 562                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 563                       spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
 564                       cmd[0], offset);
 565
 566                 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
 567                                         buf + actual, 2);
 568                 if (ret) {
 569                         debug("SF: sst word program failed\n");
 570                         break;
 571                 }
 572
 573                 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 574                 if (ret)
 575                         break;
 576
 577                 cmd_len = 1;
 578                 offset += 2;
 579         }
 580
 581         if (!ret)
 582                 ret = spi_flash_cmd_write_disable(flash);
 583
 584         /* If there is a single trailing byte, write it out */
 585         if (!ret && actual != len)
 586                 ret = sst_byte_write(flash, offset, buf + actual);
 587
 588  done:
 589         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 590               ret ? "failure" : "success", len, offset - actual);
 591
 592         spi_release_bus(flash->spi);
 593         return ret;
 594 }
 595
 596 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
 597                 const void *buf)
 598 {
 599         size_t actual;
 600         int ret;
 601
 602         ret = spi_claim_bus(flash->spi);
 603         if (ret) {
 604                 debug("SF: Unable to claim SPI bus\n");
 605                 return ret;
 606         }
 607
 608         for (actual = 0; actual < len; actual++) {
 609                 ret = sst_byte_write(flash, offset, buf + actual);
 610                 if (ret) {
 611                         debug("SF: sst byte program failed\n");
 612                         break;
 613                 }
 614                 offset++;
 615         }
 616
 617         if (!ret)
 618                 ret = spi_flash_cmd_write_disable(flash);
 619
 620         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 621               ret ? "failure" : "success", len, offset - actual);
 622
 623         spi_release_bus(flash->spi);
 624         return ret;
 625 }
 626 #endif
 627
 628 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 629 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
 630                                  u32 *len)
 631 {
 632         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 633         int shift = ffs(mask) - 1;
 634         int pow;
 635
 636         if (!(sr & mask)) {
 637                 /* No protection */
 638                 *ofs = 0;
 639                 *len = 0;
 640         } else {
 641                 pow = ((sr & mask) ^ mask) >> shift;
 642                 *len = flash->size >> pow;
 643                 *ofs = flash->size - *len;
 644         }
 645 }
 646
 647 /*
 648  * Return 1 if the entire region is locked, 0 otherwise
 649  */
 650 static int stm_is_locked_sr(struct spi_flash *flash, u32 ofs, u32 len,
 651                             u8 sr)
 652 {
 653         loff_t lock_offs;
 654         u32 lock_len;
 655
 656         stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
 657
 658         return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
 659 }
 660
 661 /*
 662  * Check if a region of the flash is (completely) locked. See stm_lock() for
 663  * more info.
 664  *
 665  * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
 666  * negative on errors.
 667  */
 668 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
 669 {
 670         int status;
 671         u8 sr;
 672
 673         status = spi_flash_cmd_read_status(flash, &sr);
 674         if (status < 0)
 675                 return status;
 676
 677         return stm_is_locked_sr(flash, ofs, len, sr);
 678 }
 679
 680 /*
 681  * Lock a region of the flash. Compatible with ST Micro and similar flash.
 682  * Supports only the block protection bits BP{0,1,2} in the status register
 683  * (SR). Does not support these features found in newer SR bitfields:
 684  *   - TB: top/bottom protect - only handle TB=0 (top protect)
 685  *   - SEC: sector/block protect - only handle SEC=0 (block protect)
 686  *   - CMP: complement protect - only support CMP=0 (range is not complemented)
 687  *
 688  * Sample table portion for 8MB flash (Winbond w25q64fw):
 689  *
 690  *   SEC  |  TB   |  BP2  |  BP1  |  BP0  |  Prot Length  | Protected Portion
 691  *  --------------------------------------------------------------------------
 692  *    X   |   X   |   0   |   0   |   0   |  NONE         | NONE
 693  *    0   |   0   |   0   |   0   |   1   |  128 KB       | Upper 1/64
 694  *    0   |   0   |   0   |   1   |   0   |  256 KB       | Upper 1/32
 695  *    0   |   0   |   0   |   1   |   1   |  512 KB       | Upper 1/16
 696  *    0   |   0   |   1   |   0   |   0   |  1 MB         | Upper 1/8
 697  *    0   |   0   |   1   |   0   |   1   |  2 MB         | Upper 1/4
 698  *    0   |   0   |   1   |   1   |   0   |  4 MB         | Upper 1/2
 699  *    X   |   X   |   1   |   1   |   1   |  8 MB         | ALL
 700  *
 701  * Returns negative on errors, 0 on success.
 702  */
 703 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
 704 {
 705         u8 status_old, status_new;
 706         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 707         u8 shift = ffs(mask) - 1, pow, val;
 708         int ret;
 709
 710         ret = spi_flash_cmd_read_status(flash, &status_old);
 711         if (ret < 0)
 712                 return ret;
 713
 714         /* SPI NOR always locks to the end */
 715         if (ofs + len != flash->size) {
 716                 /* Does combined region extend to end? */
 717                 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
 718                                       status_old))
 719                         return -EINVAL;
 720                 len = flash->size - ofs;
 721         }
 722
 723         /*
 724          * Need smallest pow such that:
 725          *
 726          *   1 / (2^pow) <= (len / size)
 727          *
 728          * so (assuming power-of-2 size) we do:
 729          *
 730          *   pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
 731          */
 732         pow = ilog2(flash->size) - ilog2(len);
 733         val = mask - (pow << shift);
 734         if (val & ~mask)
 735                 return -EINVAL;
 736
 737         /* Don't "lock" with no region! */
 738         if (!(val & mask))
 739                 return -EINVAL;
 740
 741         status_new = (status_old & ~mask) | val;
 742
 743         /* Only modify protection if it will not unlock other areas */
 744         if ((status_new & mask) <= (status_old & mask))
 745                 return -EINVAL;
 746
 747         spi_flash_cmd_write_status(flash, status_new);
 748
 749         return 0;
 750 }
 751
 752 /*
 753  * Unlock a region of the flash. See stm_lock() for more info
 754  *
 755  * Returns negative on errors, 0 on success.
 756  */
 757 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 758 {
 759         uint8_t status_old, status_new;
 760         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 761         u8 shift = ffs(mask) - 1, pow, val;
 762         int ret;
 763
 764         ret = spi_flash_cmd_read_status(flash, &status_old);
 765         if (ret < 0)
 766                 return ret;
 767
 768         /* Cannot unlock; would unlock larger region than requested */
 769         if (stm_is_locked_sr(flash, status_old, ofs - flash->erase_size,
 770                              flash->erase_size))
 771                 return -EINVAL;
 772         /*
 773          * Need largest pow such that:
 774          *
 775          *   1 / (2^pow) >= (len / size)
 776          *
 777          * so (assuming power-of-2 size) we do:
 778          *
 779          *   pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
 780          */
 781         pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
 782         if (ofs + len == flash->size) {
 783                 val = 0; /* fully unlocked */
 784         } else {
 785                 val = mask - (pow << shift);
 786                 /* Some power-of-two sizes are not supported */
 787                 if (val & ~mask)
 788                         return -EINVAL;
 789         }
 790
 791         status_new = (status_old & ~mask) | val;
 792
 793         /* Only modify protection if it will not lock other areas */
 794         if ((status_new & mask) >= (status_old & mask))
 795                 return -EINVAL;
 796
 797         spi_flash_cmd_write_status(flash, status_new);
 798
 799         return 0;
 800 }
 801 #endif
 802
 803
 804 #ifdef CONFIG_SPI_FLASH_MACRONIX
 805 static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
 806 {
 807         u8 qeb_status;
 808         int ret;
 809
 810         ret = spi_flash_cmd_read_status(flash, &qeb_status);
 811         if (ret < 0)
 812                 return ret;
 813
 814         if (qeb_status & STATUS_QEB_MXIC) {
 815                 debug("SF: mxic: QEB is already set\n");
 816         } else {
 817                 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
 818                 if (ret < 0)
 819                         return ret;
 820         }
 821
 822         return ret;
 823 }
 824 #endif
 825
 826 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 827 static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
 828 {
 829         u8 qeb_status;
 830         int ret;
 831
 832         ret = spi_flash_cmd_read_config(flash, &qeb_status);
 833         if (ret < 0)
 834                 return ret;
 835
 836         if (qeb_status & STATUS_QEB_WINSPAN) {
 837                 debug("SF: winspan: QEB is already set\n");
 838         } else {
 839                 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
 840                 if (ret < 0)
 841                         return ret;
 842         }
 843
 844         return ret;
 845 }
 846 #endif
 847
 848 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
 849 {
 850         switch (idcode0) {
 851 #ifdef CONFIG_SPI_FLASH_MACRONIX
 852         case SPI_FLASH_CFI_MFR_MACRONIX:
 853                 return spi_flash_set_qeb_mxic(flash);
 854 #endif
 855 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 856         case SPI_FLASH_CFI_MFR_SPANSION:
 857         case SPI_FLASH_CFI_MFR_WINBOND:
 858                 return spi_flash_set_qeb_winspan(flash);
 859 #endif
 860 #ifdef CONFIG_SPI_FLASH_STMICRO
 861         case SPI_FLASH_CFI_MFR_STMICRO:
 862                 debug("SF: QEB is volatile for %02x flash\n", idcode0);
 863                 return 0;
 864 #endif
 865         default:
 866                 printf("SF: Need set QEB func for %02x flash\n", idcode0);
 867                 return -1;
 868         }
 869 }
 870
 871 #if CONFIG_IS_ENABLED(OF_CONTROL)
 872 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 873 {
 874         fdt_addr_t addr;
 875         fdt_size_t size;
 876         int node;
 877
 878         /* If there is no node, do nothing */
 879         node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
 880         if (node < 0)
 881                 return 0;
 882
 883         addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
 884         if (addr == FDT_ADDR_T_NONE) {
 885                 debug("%s: Cannot decode address\n", __func__);
 886                 return 0;
 887         }
 888
 889         if (flash->size != size) {
 890                 debug("%s: Memory map must cover entire device\n", __func__);
 891                 return -1;
 892         }
 893         flash->memory_map = map_sysmem(addr, size);
 894
 895         return 0;
 896 }
 897 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 898
 899 int spi_flash_scan(struct spi_slave *spi, struct spi_flash *flash)
 900 {
 901         const struct spi_flash_params *params;
 902         u16 jedec, ext_jedec;
 903         u8 idcode[5];
 904         u8 cmd;
 905         int ret;
 906
 907         /* Read the ID codes */
 908         ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
 909         if (ret) {
 910                 printf("SF: Failed to get idcodes\n");
 911                 return -EINVAL;
 912         }
 913
 914 #ifdef DEBUG
 915         printf("SF: Got idcodes\n");
 916         print_buffer(0, idcode, 1, sizeof(idcode), 0);
 917 #endif
 918
 919         jedec = idcode[1] << 8 | idcode[2];
 920         ext_jedec = idcode[3] << 8 | idcode[4];
 921
 922         /* Validate params from spi_flash_params table */
 923         params = spi_flash_params_table;
 924         for (; params->name != NULL; params++) {
 925                 if ((params->jedec >> 16) == idcode[0]) {
 926                         if ((params->jedec & 0xFFFF) == jedec) {
 927                                 if (params->ext_jedec == 0)
 928                                         break;
 929                                 else if (params->ext_jedec == ext_jedec)
 930                                         break;
 931                         }
 932                 }
 933         }
 934
 935         if (!params->name) {
 936                 printf("SF: Unsupported flash IDs: ");
 937                 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
 938                        idcode[0], jedec, ext_jedec);
 939                 return -EPROTONOSUPPORT;
 940         }
 941
 942         /* Flash powers up read-only, so clear BP# bits */
 943 #if defined(CONFIG_SPI_FLASH_ATMEL) || \
 944         defined(CONFIG_SPI_FLASH_MACRONIX) || \
 945         defined(CONFIG_SPI_FLASH_SST)
 946                 spi_flash_cmd_write_status(flash, 0);
 947 #endif
 948
 949         /* Assign spi data */
 950         flash->spi = spi;
 951         flash->name = params->name;
 952         flash->memory_map = spi->memory_map;
 953         flash->dual_flash = flash->spi->option;
 954
 955         /* Assign spi flash flags */
 956         if (params->flags & SST_WR)
 957                 flash->flags |= SNOR_F_SST_WR;
 958
 959         /* Assign spi_flash ops */
 960 #ifndef CONFIG_DM_SPI_FLASH
 961         flash->write = spi_flash_cmd_write_ops;
 962 #if defined(CONFIG_SPI_FLASH_SST)
 963         if (flash->flags & SNOR_F_SST_WR) {
 964                 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
 965                         flash->write = sst_write_bp;
 966                 else
 967                         flash->write = sst_write_wp;
 968         }
 969 #endif
 970         flash->erase = spi_flash_cmd_erase_ops;
 971         flash->read = spi_flash_cmd_read_ops;
 972 #endif
 973
 974         /* lock hooks are flash specific - assign them based on idcode0 */
 975         switch (idcode[0]) {
 976 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 977         case SPI_FLASH_CFI_MFR_STMICRO:
 978         case SPI_FLASH_CFI_MFR_SST:
 979                 flash->flash_lock = stm_lock;
 980                 flash->flash_unlock = stm_unlock;
 981                 flash->flash_is_locked = stm_is_locked;
 982 #endif
 983                 break;
 984         default:
 985                 debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
 986         }
 987
 988         /* Compute the flash size */
 989         flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
 990         /*
 991          * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
 992          * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
 993          * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
 994          * have 256b pages.
 995          */
 996         if (ext_jedec == 0x4d00) {
 997                 if ((jedec == 0x0215) || (jedec == 0x216))
 998                         flash->page_size = 256;
 999                 else
1000                         flash->page_size = 512;
1001         } else {
1002                 flash->page_size = 256;
1003         }
1004         flash->page_size <<= flash->shift;
1005         flash->sector_size = params->sector_size << flash->shift;
1006         flash->size = flash->sector_size * params->nr_sectors << flash->shift;
1007 #ifdef CONFIG_SF_DUAL_FLASH
1008         if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1009                 flash->size <<= 1;
1010 #endif
1011
1012         /* Compute erase sector and command */
1013         if (params->flags & SECT_4K) {
1014                 flash->erase_cmd = CMD_ERASE_4K;
1015                 flash->erase_size = 4096 << flash->shift;
1016         } else if (params->flags & SECT_32K) {
1017                 flash->erase_cmd = CMD_ERASE_32K;
1018                 flash->erase_size = 32768 << flash->shift;
1019         } else {
1020                 flash->erase_cmd = CMD_ERASE_64K;
1021                 flash->erase_size = flash->sector_size;
1022         }
1023
1024         /* Now erase size becomes valid sector size */
1025         flash->sector_size = flash->erase_size;
1026
1027         /* Look for the fastest read cmd */
1028         cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
1029         if (cmd) {
1030                 cmd = spi_read_cmds_array[cmd - 1];
1031                 flash->read_cmd = cmd;
1032         } else {
1033                 /* Go for default supported read cmd */
1034                 flash->read_cmd = CMD_READ_ARRAY_FAST;
1035         }
1036
1037         /* Not require to look for fastest only two write cmds yet */
1038         if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
1039                 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1040         else
1041                 /* Go for default supported write cmd */
1042                 flash->write_cmd = CMD_PAGE_PROGRAM;
1043
1044         /* Set the quad enable bit - only for quad commands */
1045         if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1046             (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1047             (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1048                 ret = spi_flash_set_qeb(flash, idcode[0]);
1049                 if (ret) {
1050                         debug("SF: Fail to set QEB for %02x\n", idcode[0]);
1051                         return -EINVAL;
1052                 }
1053         }
1054
1055         /* Read dummy_byte: dummy byte is determined based on the
1056          * dummy cycles of a particular command.
1057          * Fast commands - dummy_byte = dummy_cycles/8
1058          * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1059          * For I/O commands except cmd[0] everything goes on no.of lines
1060          * based on particular command but incase of fast commands except
1061          * data all go on single line irrespective of command.
1062          */
1063         switch (flash->read_cmd) {
1064         case CMD_READ_QUAD_IO_FAST:
1065                 flash->dummy_byte = 2;
1066                 break;
1067         case CMD_READ_ARRAY_SLOW:
1068                 flash->dummy_byte = 0;
1069                 break;
1070         default:
1071                 flash->dummy_byte = 1;
1072         }
1073
1074 #ifdef CONFIG_SPI_FLASH_STMICRO
1075         if (params->flags & E_FSR)
1076                 flash->flags |= SNOR_F_USE_FSR;
1077 #endif
1078
1079         /* Configure the BAR - discover bank cmds and read current bank */
1080 #ifdef CONFIG_SPI_FLASH_BAR
1081         ret = spi_flash_read_bank(flash, idcode[0]);
1082         if (ret < 0)
1083                 return ret;
1084 #endif
1085
1086 #if CONFIG_IS_ENABLED(OF_CONTROL)
1087         ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
1088         if (ret) {
1089                 debug("SF: FDT decode error\n");
1090                 return -EINVAL;
1091         }
1092 #endif
1093
1094 #ifndef CONFIG_SPL_BUILD
1095         printf("SF: Detected %s with page size ", flash->name);
1096         print_size(flash->page_size, ", erase size ");
1097         print_size(flash->erase_size, ", total ");
1098         print_size(flash->size, "");
1099         if (flash->memory_map)
1100                 printf(", mapped at %p", flash->memory_map);
1101         puts("\n");
1102 #endif
1103
1104 #ifndef CONFIG_SPI_FLASH_BAR
1105         if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1106              (flash->size > SPI_FLASH_16MB_BOUN)) ||
1107              ((flash->dual_flash > SF_SINGLE_FLASH) &&
1108              (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1109                 puts("SF: Warning - Only lower 16MiB accessible,");
1110                 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
1111         }
1112 #endif
1113
1114         return ret;
1115 }