drivers/mtd/spi/spi_flash.c

   1 /*
   2  * SPI Flash Core
   3  *
   4  * Copyright (C) 2015 Jagan Teki <jteki@openedev.com>
   5  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   6  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   7  * Copyright (C) 2008 Atmel Corporation
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  */
  11
  12 #include <common.h>
  13 #include <errno.h>
  14 #include <malloc.h>
  15 #include <mapmem.h>
  16 #include <spi.h>
  17 #include <spi_flash.h>
  18 #include <linux/log2.h>
  19 #include <dma.h>
  20
  21 #include "sf_internal.h"
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 static void spi_flash_addr(u32 addr, u8 *cmd)
  26 {
  27         /* cmd[0] is actual command */
  28         cmd[1] = addr >> 16;
  29         cmd[2] = addr >> 8;
  30         cmd[3] = addr >> 0;
  31 }
  32
  33 static int read_sr(struct spi_flash *flash, u8 *rs)
  34 {
  35         int ret;
  36         u8 cmd;
  37
  38         cmd = CMD_READ_STATUS;
  39         ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  40         if (ret < 0) {
  41                 debug("SF: fail to read status register\n");
  42                 return ret;
  43         }
  44
  45         return 0;
  46 }
  47
  48 static int read_fsr(struct spi_flash *flash, u8 *fsr)
  49 {
  50         int ret;
  51         const u8 cmd = CMD_FLAG_STATUS;
  52
  53         ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
  54         if (ret < 0) {
  55                 debug("SF: fail to read flag status register\n");
  56                 return ret;
  57         }
  58
  59         return 0;
  60 }
  61
  62 static int write_sr(struct spi_flash *flash, u8 ws)
  63 {
  64         u8 cmd;
  65         int ret;
  66
  67         cmd = CMD_WRITE_STATUS;
  68         ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  69         if (ret < 0) {
  70                 debug("SF: fail to write status register\n");
  71                 return ret;
  72         }
  73
  74         return 0;
  75 }
  76
  77 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  78 static int read_cr(struct spi_flash *flash, u8 *rc)
  79 {
  80         int ret;
  81         u8 cmd;
  82
  83         cmd = CMD_READ_CONFIG;
  84         ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  85         if (ret < 0) {
  86                 debug("SF: fail to read config register\n");
  87                 return ret;
  88         }
  89
  90         return 0;
  91 }
  92
  93 static int write_cr(struct spi_flash *flash, u8 wc)
  94 {
  95         u8 data[2];
  96         u8 cmd;
  97         int ret;
  98
  99         ret = read_sr(flash, &data[0]);
 100         if (ret < 0)
 101                 return ret;
 102
 103         cmd = CMD_WRITE_STATUS;
 104         data[1] = wc;
 105         ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
 106         if (ret) {
 107                 debug("SF: fail to write config register\n");
 108                 return ret;
 109         }
 110
 111         return 0;
 112 }
 113 #endif
 114
 115 #ifdef CONFIG_SPI_FLASH_BAR
 116 static int write_bar(struct spi_flash *flash, u32 offset)
 117 {
 118         u8 cmd, bank_sel;
 119         int ret;
 120
 121         bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
 122         if (bank_sel == flash->bank_curr)
 123                 goto bar_end;
 124
 125         cmd = flash->bank_write_cmd;
 126         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 127         if (ret < 0) {
 128                 debug("SF: fail to write bank register\n");
 129                 return ret;
 130         }
 131
 132 bar_end:
 133         flash->bank_curr = bank_sel;
 134         return flash->bank_curr;
 135 }
 136
 137 static int read_bar(struct spi_flash *flash, const struct spi_flash_info *info)
 138 {
 139         u8 curr_bank = 0;
 140         int ret;
 141
 142         if (flash->size <= SPI_FLASH_16MB_BOUN)
 143                 goto bar_end;
 144
 145         switch (JEDEC_MFR(info)) {
 146         case SPI_FLASH_CFI_MFR_SPANSION:
 147                 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
 148                 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
 149                 break;
 150         default:
 151                 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
 152                 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
 153         }
 154
 155         ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
 156                                     &curr_bank, 1);
 157         if (ret) {
 158                 debug("SF: fail to read bank addr register\n");
 159                 return ret;
 160         }
 161
 162 bar_end:
 163         flash->bank_curr = curr_bank;
 164         return 0;
 165 }
 166 #endif
 167
 168 #ifdef CONFIG_SF_DUAL_FLASH
 169 static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
 170 {
 171         switch (flash->dual_flash) {
 172         case SF_DUAL_STACKED_FLASH:
 173                 if (*addr >= (flash->size >> 1)) {
 174                         *addr -= flash->size >> 1;
 175                         flash->flags |= SNOR_F_USE_UPAGE;
 176                 } else {
 177                         flash->flags &= ~SNOR_F_USE_UPAGE;
 178                 }
 179                 break;
 180         case SF_DUAL_PARALLEL_FLASH:
 181                 *addr >>= flash->shift;
 182                 break;
 183         default:
 184                 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
 185                 break;
 186         }
 187 }
 188 #endif
 189
 190 static int spi_flash_sr_ready(struct spi_flash *flash)
 191 {
 192         u8 sr;
 193         int ret;
 194
 195         ret = read_sr(flash, &sr);
 196         if (ret < 0)
 197                 return ret;
 198
 199         return !(sr & STATUS_WIP);
 200 }
 201
 202 static int spi_flash_fsr_ready(struct spi_flash *flash)
 203 {
 204         u8 fsr;
 205         int ret;
 206
 207         ret = read_fsr(flash, &fsr);
 208         if (ret < 0)
 209                 return ret;
 210
 211         return fsr & STATUS_PEC;
 212 }
 213
 214 static int spi_flash_ready(struct spi_flash *flash)
 215 {
 216         int sr, fsr;
 217
 218         sr = spi_flash_sr_ready(flash);
 219         if (sr < 0)
 220                 return sr;
 221
 222         fsr = 1;
 223         if (flash->flags & SNOR_F_USE_FSR) {
 224                 fsr = spi_flash_fsr_ready(flash);
 225                 if (fsr < 0)
 226                         return fsr;
 227         }
 228
 229         return sr && fsr;
 230 }
 231
 232 static int spi_flash_wait_till_ready(struct spi_flash *flash,
 233                                      unsigned long timeout)
 234 {
 235         unsigned long timebase;
 236         int ret;
 237
 238         timebase = get_timer(0);
 239
 240         while (get_timer(timebase) < timeout) {
 241                 ret = spi_flash_ready(flash);
 242                 if (ret < 0)
 243                         return ret;
 244                 if (ret)
 245                         return 0;
 246         }
 247
 248         printf("SF: Timeout!\n");
 249
 250         return -ETIMEDOUT;
 251 }
 252
 253 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 254                 size_t cmd_len, const void *buf, size_t buf_len)
 255 {
 256         struct spi_slave *spi = flash->spi;
 257         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 258         int ret;
 259
 260         if (buf == NULL)
 261                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 262
 263         ret = spi_claim_bus(spi);
 264         if (ret) {
 265                 debug("SF: unable to claim SPI bus\n");
 266                 return ret;
 267         }
 268
 269         ret = spi_flash_cmd_write_enable(flash);
 270         if (ret < 0) {
 271                 debug("SF: enabling write failed\n");
 272                 return ret;
 273         }
 274
 275         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 276         if (ret < 0) {
 277                 debug("SF: write cmd failed\n");
 278                 return ret;
 279         }
 280
 281         ret = spi_flash_wait_till_ready(flash, timeout);
 282         if (ret < 0) {
 283                 debug("SF: write %s timed out\n",
 284                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 285                         "program" : "page erase");
 286                 return ret;
 287         }
 288
 289         spi_release_bus(spi);
 290
 291         return ret;
 292 }
 293
 294 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 295 {
 296         u32 erase_size, erase_addr;
 297         u8 cmd[SPI_FLASH_CMD_LEN];
 298         int ret = -1;
 299
 300         erase_size = flash->erase_size;
 301         if (offset % erase_size || len % erase_size) {
 302                 debug("SF: Erase offset/length not multiple of erase size\n");
 303                 return -1;
 304         }
 305
 306         if (flash->flash_is_locked) {
 307                 if (flash->flash_is_locked(flash, offset, len) > 0) {
 308                         printf("offset 0x%x is protected and cannot be erased\n",
 309                                offset);
 310                         return -EINVAL;
 311                 }
 312         }
 313
 314         cmd[0] = flash->erase_cmd;
 315         while (len) {
 316                 erase_addr = offset;
 317
 318 #ifdef CONFIG_SF_DUAL_FLASH
 319                 if (flash->dual_flash > SF_SINGLE_FLASH)
 320                         spi_flash_dual(flash, &erase_addr);
 321 #endif
 322 #ifdef CONFIG_SPI_FLASH_BAR
 323                 ret = write_bar(flash, erase_addr);
 324                 if (ret < 0)
 325                         return ret;
 326 #endif
 327                 spi_flash_addr(erase_addr, cmd);
 328
 329                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 330                       cmd[2], cmd[3], erase_addr);
 331
 332                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 333                 if (ret < 0) {
 334                         debug("SF: erase failed\n");
 335                         break;
 336                 }
 337
 338                 offset += erase_size;
 339                 len -= erase_size;
 340         }
 341
 342         return ret;
 343 }
 344
 345 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 346                 size_t len, const void *buf)
 347 {
 348         struct spi_slave *spi = flash->spi;
 349         unsigned long byte_addr, page_size;
 350         u32 write_addr;
 351         size_t chunk_len, actual;
 352         u8 cmd[SPI_FLASH_CMD_LEN];
 353         int ret = -1;
 354
 355         page_size = flash->page_size;
 356
 357         if (flash->flash_is_locked) {
 358                 if (flash->flash_is_locked(flash, offset, len) > 0) {
 359                         printf("offset 0x%x is protected and cannot be written\n",
 360                                offset);
 361                         return -EINVAL;
 362                 }
 363         }
 364
 365         cmd[0] = flash->write_cmd;
 366         for (actual = 0; actual < len; actual += chunk_len) {
 367                 write_addr = offset;
 368
 369 #ifdef CONFIG_SF_DUAL_FLASH
 370                 if (flash->dual_flash > SF_SINGLE_FLASH)
 371                         spi_flash_dual(flash, &write_addr);
 372 #endif
 373 #ifdef CONFIG_SPI_FLASH_BAR
 374                 ret = write_bar(flash, write_addr);
 375                 if (ret < 0)
 376                         return ret;
 377 #endif
 378                 byte_addr = offset % page_size;
 379                 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
 380
 381                 if (spi->max_write_size)
 382                         chunk_len = min(chunk_len,
 383                                         (size_t)spi->max_write_size);
 384
 385                 spi_flash_addr(write_addr, cmd);
 386
 387                 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 388                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 389
 390                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 391                                         buf + actual, chunk_len);
 392                 if (ret < 0) {
 393                         debug("SF: write failed\n");
 394                         break;
 395                 }
 396
 397                 offset += chunk_len;
 398         }
 399
 400         return ret;
 401 }
 402
 403 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 404                 size_t cmd_len, void *data, size_t data_len)
 405 {
 406         struct spi_slave *spi = flash->spi;
 407         int ret;
 408
 409         ret = spi_claim_bus(spi);
 410         if (ret) {
 411                 debug("SF: unable to claim SPI bus\n");
 412                 return ret;
 413         }
 414
 415         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 416         if (ret < 0) {
 417                 debug("SF: read cmd failed\n");
 418                 return ret;
 419         }
 420
 421         spi_release_bus(spi);
 422
 423         return ret;
 424 }
 425
 426 /*
 427  * TODO: remove the weak after all the other spi_flash_copy_mmap
 428  * implementations removed from drivers
 429  */
 430 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
 431 {
 432 #ifdef CONFIG_DMA
 433         if (!dma_memcpy(data, offset, len))
 434                 return;
 435 #endif
 436         memcpy(data, offset, len);
 437 }
 438
 439 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 440                 size_t len, void *data)
 441 {
 442         struct spi_slave *spi = flash->spi;
 443         u8 *cmd, cmdsz;
 444         u32 remain_len, read_len, read_addr;
 445         int bank_sel = 0;
 446         int ret = -1;
 447
 448         /* Handle memory-mapped SPI */
 449         if (flash->memory_map) {
 450                 ret = spi_claim_bus(spi);
 451                 if (ret) {
 452                         debug("SF: unable to claim SPI bus\n");
 453                         return ret;
 454                 }
 455                 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
 456                 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
 457                 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
 458                 spi_release_bus(spi);
 459                 return 0;
 460         }
 461
 462         cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
 463         cmd = calloc(1, cmdsz);
 464         if (!cmd) {
 465                 debug("SF: Failed to allocate cmd\n");
 466                 return -ENOMEM;
 467         }
 468
 469         cmd[0] = flash->read_cmd;
 470         while (len) {
 471                 read_addr = offset;
 472
 473 #ifdef CONFIG_SF_DUAL_FLASH
 474                 if (flash->dual_flash > SF_SINGLE_FLASH)
 475                         spi_flash_dual(flash, &read_addr);
 476 #endif
 477 #ifdef CONFIG_SPI_FLASH_BAR
 478                 ret = write_bar(flash, read_addr);
 479                 if (ret < 0)
 480                         return ret;
 481                 bank_sel = flash->bank_curr;
 482 #endif
 483                 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
 484                                 (bank_sel + 1)) - offset;
 485                 if (len < remain_len)
 486                         read_len = len;
 487                 else
 488                         read_len = remain_len;
 489
 490                 spi_flash_addr(read_addr, cmd);
 491
 492                 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 493                 if (ret < 0) {
 494                         debug("SF: read failed\n");
 495                         break;
 496                 }
 497
 498                 offset += read_len;
 499                 len -= read_len;
 500                 data += read_len;
 501         }
 502
 503         free(cmd);
 504         return ret;
 505 }
 506
 507 #ifdef CONFIG_SPI_FLASH_SST
 508 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 509 {
 510         struct spi_slave *spi = flash->spi;
 511         int ret;
 512         u8 cmd[4] = {
 513                 CMD_SST_BP,
 514                 offset >> 16,
 515                 offset >> 8,
 516                 offset,
 517         };
 518
 519         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 520               spi_w8r8(spi, CMD_READ_STATUS), buf, cmd[0], offset);
 521
 522         ret = spi_flash_cmd_write_enable(flash);
 523         if (ret)
 524                 return ret;
 525
 526         ret = spi_flash_cmd_write(spi, cmd, sizeof(cmd), buf, 1);
 527         if (ret)
 528                 return ret;
 529
 530         return spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 531 }
 532
 533 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 534                 const void *buf)
 535 {
 536         struct spi_slave *spi = flash->spi;
 537         size_t actual, cmd_len;
 538         int ret;
 539         u8 cmd[4];
 540
 541         ret = spi_claim_bus(spi);
 542         if (ret) {
 543                 debug("SF: Unable to claim SPI bus\n");
 544                 return ret;
 545         }
 546
 547         /* If the data is not word aligned, write out leading single byte */
 548         actual = offset % 2;
 549         if (actual) {
 550                 ret = sst_byte_write(flash, offset, buf);
 551                 if (ret)
 552                         goto done;
 553         }
 554         offset += actual;
 555
 556         ret = spi_flash_cmd_write_enable(flash);
 557         if (ret)
 558                 goto done;
 559
 560         cmd_len = 4;
 561         cmd[0] = CMD_SST_AAI_WP;
 562         cmd[1] = offset >> 16;
 563         cmd[2] = offset >> 8;
 564         cmd[3] = offset;
 565
 566         for (; actual < len - 1; actual += 2) {
 567                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 568                       spi_w8r8(spi, CMD_READ_STATUS), buf + actual,
 569                       cmd[0], offset);
 570
 571                 ret = spi_flash_cmd_write(spi, cmd, cmd_len,
 572                                         buf + actual, 2);
 573                 if (ret) {
 574                         debug("SF: sst word program failed\n");
 575                         break;
 576                 }
 577
 578                 ret = spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 579                 if (ret)
 580                         break;
 581
 582                 cmd_len = 1;
 583                 offset += 2;
 584         }
 585
 586         if (!ret)
 587                 ret = spi_flash_cmd_write_disable(flash);
 588
 589         /* If there is a single trailing byte, write it out */
 590         if (!ret && actual != len)
 591                 ret = sst_byte_write(flash, offset, buf + actual);
 592
 593  done:
 594         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 595               ret ? "failure" : "success", len, offset - actual);
 596
 597         spi_release_bus(spi);
 598         return ret;
 599 }
 600
 601 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
 602                 const void *buf)
 603 {
 604         struct spi_slave *spi = flash->spi;
 605         size_t actual;
 606         int ret;
 607
 608         ret = spi_claim_bus(spi);
 609         if (ret) {
 610                 debug("SF: Unable to claim SPI bus\n");
 611                 return ret;
 612         }
 613
 614         for (actual = 0; actual < len; actual++) {
 615                 ret = sst_byte_write(flash, offset, buf + actual);
 616                 if (ret) {
 617                         debug("SF: sst byte program failed\n");
 618                         break;
 619                 }
 620                 offset++;
 621         }
 622
 623         if (!ret)
 624                 ret = spi_flash_cmd_write_disable(flash);
 625
 626         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 627               ret ? "failure" : "success", len, offset - actual);
 628
 629         spi_release_bus(spi);
 630         return ret;
 631 }
 632 #endif
 633
 634 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 635 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
 636                                  u64 *len)
 637 {
 638         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 639         int shift = ffs(mask) - 1;
 640         int pow;
 641
 642         if (!(sr & mask)) {
 643                 /* No protection */
 644                 *ofs = 0;
 645                 *len = 0;
 646         } else {
 647                 pow = ((sr & mask) ^ mask) >> shift;
 648                 *len = flash->size >> pow;
 649                 *ofs = flash->size - *len;
 650         }
 651 }
 652
 653 /*
 654  * Return 1 if the entire region is locked, 0 otherwise
 655  */
 656 static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u64 len,
 657                             u8 sr)
 658 {
 659         loff_t lock_offs;
 660         u64 lock_len;
 661
 662         stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
 663
 664         return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
 665 }
 666
 667 /*
 668  * Check if a region of the flash is (completely) locked. See stm_lock() for
 669  * more info.
 670  *
 671  * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
 672  * negative on errors.
 673  */
 674 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
 675 {
 676         int status;
 677         u8 sr;
 678
 679         status = read_sr(flash, &sr);
 680         if (status < 0)
 681                 return status;
 682
 683         return stm_is_locked_sr(flash, ofs, len, sr);
 684 }
 685
 686 /*
 687  * Lock a region of the flash. Compatible with ST Micro and similar flash.
 688  * Supports only the block protection bits BP{0,1,2} in the status register
 689  * (SR). Does not support these features found in newer SR bitfields:
 690  *   - TB: top/bottom protect - only handle TB=0 (top protect)
 691  *   - SEC: sector/block protect - only handle SEC=0 (block protect)
 692  *   - CMP: complement protect - only support CMP=0 (range is not complemented)
 693  *
 694  * Sample table portion for 8MB flash (Winbond w25q64fw):
 695  *
 696  *   SEC  |  TB   |  BP2  |  BP1  |  BP0  |  Prot Length  | Protected Portion
 697  *  --------------------------------------------------------------------------
 698  *    X   |   X   |   0   |   0   |   0   |  NONE         | NONE
 699  *    0   |   0   |   0   |   0   |   1   |  128 KB       | Upper 1/64
 700  *    0   |   0   |   0   |   1   |   0   |  256 KB       | Upper 1/32
 701  *    0   |   0   |   0   |   1   |   1   |  512 KB       | Upper 1/16
 702  *    0   |   0   |   1   |   0   |   0   |  1 MB         | Upper 1/8
 703  *    0   |   0   |   1   |   0   |   1   |  2 MB         | Upper 1/4
 704  *    0   |   0   |   1   |   1   |   0   |  4 MB         | Upper 1/2
 705  *    X   |   X   |   1   |   1   |   1   |  8 MB         | ALL
 706  *
 707  * Returns negative on errors, 0 on success.
 708  */
 709 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
 710 {
 711         u8 status_old, status_new;
 712         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 713         u8 shift = ffs(mask) - 1, pow, val;
 714         int ret;
 715
 716         ret = read_sr(flash, &status_old);
 717         if (ret < 0)
 718                 return ret;
 719
 720         /* SPI NOR always locks to the end */
 721         if (ofs + len != flash->size) {
 722                 /* Does combined region extend to end? */
 723                 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
 724                                       status_old))
 725                         return -EINVAL;
 726                 len = flash->size - ofs;
 727         }
 728
 729         /*
 730          * Need smallest pow such that:
 731          *
 732          *   1 / (2^pow) <= (len / size)
 733          *
 734          * so (assuming power-of-2 size) we do:
 735          *
 736          *   pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
 737          */
 738         pow = ilog2(flash->size) - ilog2(len);
 739         val = mask - (pow << shift);
 740         if (val & ~mask)
 741                 return -EINVAL;
 742
 743         /* Don't "lock" with no region! */
 744         if (!(val & mask))
 745                 return -EINVAL;
 746
 747         status_new = (status_old & ~mask) | val;
 748
 749         /* Only modify protection if it will not unlock other areas */
 750         if ((status_new & mask) <= (status_old & mask))
 751                 return -EINVAL;
 752
 753         write_sr(flash, status_new);
 754
 755         return 0;
 756 }
 757
 758 /*
 759  * Unlock a region of the flash. See stm_lock() for more info
 760  *
 761  * Returns negative on errors, 0 on success.
 762  */
 763 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 764 {
 765         uint8_t status_old, status_new;
 766         u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 767         u8 shift = ffs(mask) - 1, pow, val;
 768         int ret;
 769
 770         ret = read_sr(flash, &status_old);
 771         if (ret < 0)
 772                 return ret;
 773
 774         /* Cannot unlock; would unlock larger region than requested */
 775         if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
 776                              status_old))
 777                 return -EINVAL;
 778         /*
 779          * Need largest pow such that:
 780          *
 781          *   1 / (2^pow) >= (len / size)
 782          *
 783          * so (assuming power-of-2 size) we do:
 784          *
 785          *   pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
 786          */
 787         pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
 788         if (ofs + len == flash->size) {
 789                 val = 0; /* fully unlocked */
 790         } else {
 791                 val = mask - (pow << shift);
 792                 /* Some power-of-two sizes are not supported */
 793                 if (val & ~mask)
 794                         return -EINVAL;
 795         }
 796
 797         status_new = (status_old & ~mask) | val;
 798
 799         /* Only modify protection if it will not lock other areas */
 800         if ((status_new & mask) >= (status_old & mask))
 801                 return -EINVAL;
 802
 803         write_sr(flash, status_new);
 804
 805         return 0;
 806 }
 807 #endif
 808
 809
 810 #ifdef CONFIG_SPI_FLASH_MACRONIX
 811 static int macronix_quad_enable(struct spi_flash *flash)
 812 {
 813         u8 qeb_status;
 814         int ret;
 815
 816         ret = read_sr(flash, &qeb_status);
 817         if (ret < 0)
 818                 return ret;
 819
 820         if (qeb_status & STATUS_QEB_MXIC)
 821                 return 0;
 822
 823         ret = write_sr(flash, qeb_status | STATUS_QEB_MXIC);
 824         if (ret < 0)
 825                 return ret;
 826
 827         /* read SR and check it */
 828         ret = read_sr(flash, &qeb_status);
 829         if (!(ret >= 0 && (qeb_status & STATUS_QEB_MXIC))) {
 830                 printf("SF: Macronix SR Quad bit not clear\n");
 831                 return -EINVAL;
 832         }
 833
 834         return ret;
 835 }
 836 #endif
 837
 838 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 839 static int spansion_quad_enable(struct spi_flash *flash)
 840 {
 841         u8 qeb_status;
 842         int ret;
 843
 844         ret = read_cr(flash, &qeb_status);
 845         if (ret < 0)
 846                 return ret;
 847
 848         if (qeb_status & STATUS_QEB_WINSPAN)
 849                 return 0;
 850
 851         ret = write_cr(flash, qeb_status | STATUS_QEB_WINSPAN);
 852         if (ret < 0)
 853                 return ret;
 854
 855         /* read CR and check it */
 856         ret = read_cr(flash, &qeb_status);
 857         if (!(ret >= 0 && (qeb_status & STATUS_QEB_WINSPAN))) {
 858                 printf("SF: Spansion CR Quad bit not clear\n");
 859                 return -EINVAL;
 860         }
 861
 862         return ret;
 863 }
 864 #endif
 865
 866 static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash)
 867 {
 868         int                             tmp;
 869         u8                              id[SPI_FLASH_MAX_ID_LEN];
 870         const struct spi_flash_info     *info;
 871
 872         tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, SPI_FLASH_MAX_ID_LEN);
 873         if (tmp < 0) {
 874                 printf("SF: error %d reading JEDEC ID\n", tmp);
 875                 return ERR_PTR(tmp);
 876         }
 877
 878         info = spi_flash_ids;
 879         for (; info->name != NULL; info++) {
 880                 if (info->id_len) {
 881                         if (!memcmp(info->id, id, info->id_len))
 882                                 return info;
 883                 }
 884         }
 885
 886         printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
 887                id[0], id[1], id[2]);
 888         return ERR_PTR(-ENODEV);
 889 }
 890
 891 static int set_quad_mode(struct spi_flash *flash,
 892                          const struct spi_flash_info *info)
 893 {
 894         switch (JEDEC_MFR(info)) {
 895 #ifdef CONFIG_SPI_FLASH_MACRONIX
 896         case SPI_FLASH_CFI_MFR_MACRONIX:
 897                 return macronix_quad_enable(flash);
 898 #endif
 899 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 900         case SPI_FLASH_CFI_MFR_SPANSION:
 901         case SPI_FLASH_CFI_MFR_WINBOND:
 902                 return spansion_quad_enable(flash);
 903 #endif
 904 #ifdef CONFIG_SPI_FLASH_STMICRO
 905         case SPI_FLASH_CFI_MFR_STMICRO:
 906                 debug("SF: QEB is volatile for %02x flash\n", JEDEC_MFR(info));
 907                 return 0;
 908 #endif
 909         default:
 910                 printf("SF: Need set QEB func for %02x flash\n",
 911                        JEDEC_MFR(info));
 912                 return -1;
 913         }
 914 }
 915
 916 #if CONFIG_IS_ENABLED(OF_CONTROL)
 917 int spi_flash_decode_fdt(struct spi_flash *flash)
 918 {
 919 #ifdef CONFIG_DM_SPI_FLASH
 920         fdt_addr_t addr;
 921         fdt_size_t size;
 922
 923         addr = dev_read_addr_size(flash->dev, "memory-map", &size);
 924         if (addr == FDT_ADDR_T_NONE) {
 925                 debug("%s: Cannot decode address\n", __func__);
 926                 return 0;
 927         }
 928
 929         if (flash->size > size) {
 930                 debug("%s: Memory map must cover entire device\n", __func__);
 931                 return -1;
 932         }
 933         flash->memory_map = map_sysmem(addr, size);
 934 #endif
 935
 936         return 0;
 937 }
 938 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 939
 940 int spi_flash_scan(struct spi_flash *flash)
 941 {
 942         struct spi_slave *spi = flash->spi;
 943         const struct spi_flash_info *info = NULL;
 944         int ret;
 945
 946         info = spi_flash_read_id(flash);
 947         if (IS_ERR_OR_NULL(info))
 948                 return -ENOENT;
 949
 950         /*
 951          * Flash powers up read-only, so clear BP# bits.
 952          *
 953          * Note on some flash (like Macronix), QE (quad enable) bit is in the
 954          * same status register as BP# bits, and we need preserve its original
 955          * value during a reboot cycle as this is required by some platforms
 956          * (like Intel ICH SPI controller working under descriptor mode).
 957          */
 958         if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
 959            (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) ||
 960            (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX)) {
 961                 u8 sr = 0;
 962
 963                 if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX) {
 964                         read_sr(flash, &sr);
 965                         sr &= STATUS_QEB_MXIC;
 966                 }
 967                 write_sr(flash, sr);
 968         }
 969
 970         flash->name = info->name;
 971         flash->memory_map = spi->memory_map;
 972
 973         if (info->flags & SST_WR)
 974                 flash->flags |= SNOR_F_SST_WR;
 975
 976 #ifndef CONFIG_DM_SPI_FLASH
 977         flash->write = spi_flash_cmd_write_ops;
 978 #if defined(CONFIG_SPI_FLASH_SST)
 979         if (flash->flags & SNOR_F_SST_WR) {
 980                 if (spi->mode & SPI_TX_BYTE)
 981                         flash->write = sst_write_bp;
 982                 else
 983                         flash->write = sst_write_wp;
 984         }
 985 #endif
 986         flash->erase = spi_flash_cmd_erase_ops;
 987         flash->read = spi_flash_cmd_read_ops;
 988 #endif
 989
 990 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 991         /* NOR protection support for STmicro/Micron chips and similar */
 992         if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO ||
 993             JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) {
 994                 flash->flash_lock = stm_lock;
 995                 flash->flash_unlock = stm_unlock;
 996                 flash->flash_is_locked = stm_is_locked;
 997         }
 998 #endif
 999
1000         /* Compute the flash size */
1001         flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
1002         flash->page_size = info->page_size;
1003         /*
1004          * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
1005          * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
1006          * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
1007          * have 256b pages.
1008          */
1009         if (JEDEC_EXT(info) == 0x4d00) {
1010                 if ((JEDEC_ID(info) != 0x0215) &&
1011                     (JEDEC_ID(info) != 0x0216))
1012                         flash->page_size = 512;
1013         }
1014         flash->page_size <<= flash->shift;
1015         flash->sector_size = info->sector_size << flash->shift;
1016         flash->size = flash->sector_size * info->n_sectors << flash->shift;
1017 #ifdef CONFIG_SF_DUAL_FLASH
1018         if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1019                 flash->size <<= 1;
1020 #endif
1021
1022 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
1023         /* Compute erase sector and command */
1024         if (info->flags & SECT_4K) {
1025                 flash->erase_cmd = CMD_ERASE_4K;
1026                 flash->erase_size = 4096 << flash->shift;
1027         } else
1028 #endif
1029         {
1030                 flash->erase_cmd = CMD_ERASE_64K;
1031                 flash->erase_size = flash->sector_size;
1032         }
1033
1034         /* Now erase size becomes valid sector size */
1035         flash->sector_size = flash->erase_size;
1036
1037         /* Look for read commands */
1038         flash->read_cmd = CMD_READ_ARRAY_FAST;
1039         if (spi->mode & SPI_RX_SLOW)
1040                 flash->read_cmd = CMD_READ_ARRAY_SLOW;
1041         else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
1042                 flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
1043         else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
1044                 flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
1045
1046         /* Look for write commands */
1047         if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
1048                 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1049         else
1050                 /* Go for default supported write cmd */
1051                 flash->write_cmd = CMD_PAGE_PROGRAM;
1052
1053         /* Set the quad enable bit - only for quad commands */
1054         if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1055             (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1056             (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1057                 ret = set_quad_mode(flash, info);
1058                 if (ret) {
1059                         debug("SF: Fail to set QEB for %02x\n",
1060                               JEDEC_MFR(info));
1061                         return -EINVAL;
1062                 }
1063         }
1064
1065         /* Read dummy_byte: dummy byte is determined based on the
1066          * dummy cycles of a particular command.
1067          * Fast commands - dummy_byte = dummy_cycles/8
1068          * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1069          * For I/O commands except cmd[0] everything goes on no.of lines
1070          * based on particular command but incase of fast commands except
1071          * data all go on single line irrespective of command.
1072          */
1073         switch (flash->read_cmd) {
1074         case CMD_READ_QUAD_IO_FAST:
1075                 flash->dummy_byte = 2;
1076                 break;
1077         case CMD_READ_ARRAY_SLOW:
1078                 flash->dummy_byte = 0;
1079                 break;
1080         default:
1081                 flash->dummy_byte = 1;
1082         }
1083
1084 #ifdef CONFIG_SPI_FLASH_STMICRO
1085         if (info->flags & E_FSR)
1086                 flash->flags |= SNOR_F_USE_FSR;
1087 #endif
1088
1089         /* Configure the BAR - discover bank cmds and read current bank */
1090 #ifdef CONFIG_SPI_FLASH_BAR
1091         ret = read_bar(flash, info);
1092         if (ret < 0)
1093                 return ret;
1094 #endif
1095
1096 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
1097         ret = spi_flash_decode_fdt(flash);
1098         if (ret) {
1099                 debug("SF: FDT decode error\n");
1100                 return -EINVAL;
1101         }
1102 #endif
1103
1104 #ifndef CONFIG_SPL_BUILD
1105         printf("SF: Detected %s with page size ", flash->name);
1106         print_size(flash->page_size, ", erase size ");
1107         print_size(flash->erase_size, ", total ");
1108         print_size(flash->size, "");
1109         if (flash->memory_map)
1110                 printf(", mapped at %p", flash->memory_map);
1111         puts("\n");
1112 #endif
1113
1114 #ifndef CONFIG_SPI_FLASH_BAR
1115         if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1116              (flash->size > SPI_FLASH_16MB_BOUN)) ||
1117              ((flash->dual_flash > SF_SINGLE_FLASH) &&
1118              (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1119                 puts("SF: Warning - Only lower 16MiB accessible,");
1120                 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
1121         }
1122 #endif
1123
1124         return 0;
1125 }