drivers/net/fm/b4860.c

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  *      Roy Zang <tie-fei.zang@freescale.com>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18  * MA 02111-1307 USA
  19  */
  20 #include <common.h>
  21 #include <phy.h>
  22 #include <fm_eth.h>
  23 #include <asm/io.h>
  24 #include <asm/immap_85xx.h>
  25 #include <asm/fsl_serdes.h>
  26
  27 u32 port_to_devdisr[] = {
  28         [FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
  29         [FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
  30         [FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
  31         [FM1_DTSEC4] = FSL_CORENET_DEVDISR2_DTSEC1_4,
  32         [FM1_DTSEC5] = FSL_CORENET_DEVDISR2_DTSEC1_5,
  33         [FM1_DTSEC6] = FSL_CORENET_DEVDISR2_DTSEC1_6,
  34         [FM1_10GEC1] = FSL_CORENET_DEVDISR2_10GEC1_1,
  35         [FM1_10GEC2] = FSL_CORENET_DEVDISR2_10GEC1_2,
  36 };
  37
  38 static int is_device_disabled(enum fm_port port)
  39 {
  40         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  41         u32 devdisr2 = in_be32(&gur->devdisr2);
  42
  43         return port_to_devdisr[port] & devdisr2;
  44 }
  45
  46 void fman_disable_port(enum fm_port port)
  47 {
  48         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  49
  50         setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
  51 }
  52
  53 phy_interface_t fman_port_enet_if(enum fm_port port)
  54 {
  55         if (is_device_disabled(port))
  56                 return PHY_INTERFACE_MODE_NONE;
  57
  58         /*B4860 has two 10Gig Mac*/
  59         if ((port == FM1_10GEC1 || port == FM1_10GEC2)  &&
  60             ((is_serdes_configured(XAUI_FM1_MAC9))      ||
  61             (is_serdes_configured(XAUI_FM1_MAC10))))
  62                 return PHY_INTERFACE_MODE_XGMII;
  63
  64         /* Fix me need to handle RGMII here first */
  65
  66         switch (port) {
  67         case FM1_DTSEC1:
  68         case FM1_DTSEC2:
  69         case FM1_DTSEC3:
  70         case FM1_DTSEC4:
  71         case FM1_DTSEC5:
  72         case FM1_DTSEC6:
  73                 if (is_serdes_configured(SGMII_FM1_DTSEC1 + port - FM1_DTSEC1))
  74                         return PHY_INTERFACE_MODE_SGMII;
  75                 break;
  76         default:
  77                 return PHY_INTERFACE_MODE_NONE;
  78         }
  79
  80         return PHY_INTERFACE_MODE_NONE;
  81 }