2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Roy Zang <tie-fei.zang@freescale.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/immap_85xx.h>
12 #include <asm/fsl_serdes.h>
14 u32 port_to_devdisr
[] = {
15 [FM1_DTSEC1
] = FSL_CORENET_DEVDISR2_DTSEC1_1
,
16 [FM1_DTSEC2
] = FSL_CORENET_DEVDISR2_DTSEC1_2
,
17 [FM1_DTSEC3
] = FSL_CORENET_DEVDISR2_DTSEC1_3
,
18 [FM1_DTSEC4
] = FSL_CORENET_DEVDISR2_DTSEC1_4
,
19 [FM1_DTSEC5
] = FSL_CORENET_DEVDISR2_DTSEC1_5
,
20 [FM1_DTSEC6
] = FSL_CORENET_DEVDISR2_DTSEC1_6
,
21 [FM1_10GEC1
] = FSL_CORENET_DEVDISR2_10GEC1_1
,
22 [FM1_10GEC2
] = FSL_CORENET_DEVDISR2_10GEC1_2
,
25 static int is_device_disabled(enum fm_port port
)
27 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
28 u32 devdisr2
= in_be32(&gur
->devdisr2
);
30 return port_to_devdisr
[port
] & devdisr2
;
33 void fman_disable_port(enum fm_port port
)
35 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
37 setbits_be32(&gur
->devdisr2
, port_to_devdisr
[port
]);
40 phy_interface_t
fman_port_enet_if(enum fm_port port
)
42 if (is_device_disabled(port
))
43 return PHY_INTERFACE_MODE_NONE
;
45 /*B4860 has two 10Gig Mac*/
46 if ((port
== FM1_10GEC1
|| port
== FM1_10GEC2
) &&
47 ((is_serdes_configured(XAUI_FM1_MAC9
)) ||
48 (is_serdes_configured(XAUI_FM1_MAC10
))))
49 return PHY_INTERFACE_MODE_XGMII
;
51 /* Fix me need to handle RGMII here first */
60 if (is_serdes_configured(SGMII_FM1_DTSEC1
+ port
- FM1_DTSEC1
))
61 return PHY_INTERFACE_MODE_SGMII
;
64 return PHY_INTERFACE_MODE_NONE
;
67 return PHY_INTERFACE_MODE_NONE
;