2 * Copyright 2011-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #ifdef CONFIG_FSL_LAYERSCAPE
11 #include <asm/arch/fsl_serdes.h>
13 #include <asm/fsl_serdes.h>
18 struct fm_eth_info fm_info
[] = {
19 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
20 FM_DTSEC_INFO_INITIALIZER(1, 1),
22 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2)
23 FM_DTSEC_INFO_INITIALIZER(1, 2),
25 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3)
26 FM_DTSEC_INFO_INITIALIZER(1, 3),
28 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4)
29 FM_DTSEC_INFO_INITIALIZER(1, 4),
31 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5)
32 FM_DTSEC_INFO_INITIALIZER(1, 5),
34 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6)
35 FM_DTSEC_INFO_INITIALIZER(1, 6),
37 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7)
38 FM_DTSEC_INFO_INITIALIZER(1, 9),
40 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8)
41 FM_DTSEC_INFO_INITIALIZER(1, 10),
43 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1)
44 FM_DTSEC_INFO_INITIALIZER(2, 1),
46 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2)
47 FM_DTSEC_INFO_INITIALIZER(2, 2),
49 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3)
50 FM_DTSEC_INFO_INITIALIZER(2, 3),
52 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4)
53 FM_DTSEC_INFO_INITIALIZER(2, 4),
55 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5)
56 FM_DTSEC_INFO_INITIALIZER(2, 5),
58 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6)
59 FM_DTSEC_INFO_INITIALIZER(2, 6),
61 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7)
62 FM_DTSEC_INFO_INITIALIZER(2, 9),
64 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8)
65 FM_DTSEC_INFO_INITIALIZER(2, 10),
67 #if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
68 FM_TGEC_INFO_INITIALIZER(1, 1),
70 #if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
71 FM_TGEC_INFO_INITIALIZER(1, 2),
73 #if (CONFIG_SYS_NUM_FM1_10GEC >= 3)
74 FM_TGEC_INFO_INITIALIZER2(1, 3),
76 #if (CONFIG_SYS_NUM_FM1_10GEC >= 4)
77 FM_TGEC_INFO_INITIALIZER2(1, 4),
79 #if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
80 FM_TGEC_INFO_INITIALIZER(2, 1),
82 #if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
83 FM_TGEC_INFO_INITIALIZER(2, 2),
87 int fm_standard_init(bd_t
*bis
)
90 struct ccsr_fman
*reg
;
92 reg
= (void *)CONFIG_SYS_FSL_FM1_ADDR
;
93 if (fm_init_common(0, reg
))
96 for (i
= 0; i
< ARRAY_SIZE(fm_info
); i
++) {
97 if ((fm_info
[i
].enabled
) && (fm_info
[i
].index
== 1))
98 fm_eth_initialize(reg
, &fm_info
[i
]);
101 #if (CONFIG_SYS_NUM_FMAN == 2)
102 reg
= (void *)CONFIG_SYS_FSL_FM2_ADDR
;
103 if (fm_init_common(1, reg
))
106 for (i
= 0; i
< ARRAY_SIZE(fm_info
); i
++) {
107 if ((fm_info
[i
].enabled
) && (fm_info
[i
].index
== 2))
108 fm_eth_initialize(reg
, &fm_info
[i
]);
115 /* simple linear search to map from port to array index */
116 static int fm_port_to_index(enum fm_port port
)
120 for (i
= 0; i
< ARRAY_SIZE(fm_info
); i
++) {
121 if (fm_info
[i
].port
== port
)
129 * Determine if an interface is actually active based on HW config
130 * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
131 * the interface is not active based on HW cfg of the SoC
133 void fman_enet_init(void)
137 for (i
= 0; i
< ARRAY_SIZE(fm_info
); i
++) {
138 phy_interface_t enet_if
;
140 enet_if
= fman_port_enet_if(fm_info
[i
].port
);
141 if (enet_if
!= PHY_INTERFACE_MODE_NONE
) {
142 fm_info
[i
].enabled
= 1;
143 fm_info
[i
].enet_if
= enet_if
;
145 fm_info
[i
].enabled
= 0;
152 void fm_disable_port(enum fm_port port
)
154 int i
= fm_port_to_index(port
);
159 fm_info
[i
].enabled
= 0;
160 #ifndef CONFIG_SYS_FMAN_V3
161 fman_disable_port(port
);
165 void fm_enable_port(enum fm_port port
)
167 int i
= fm_port_to_index(port
);
172 fm_info
[i
].enabled
= 1;
173 fman_enable_port(port
);
176 void fm_info_set_mdio(enum fm_port port
, struct mii_dev
*bus
)
178 int i
= fm_port_to_index(port
);
183 fm_info
[i
].bus
= bus
;
186 void fm_info_set_phy_address(enum fm_port port
, int address
)
188 int i
= fm_port_to_index(port
);
193 fm_info
[i
].phy_addr
= address
;
197 * Returns the PHY address for a given Fman port
199 * The port must be set via a prior call to fm_info_set_phy_address().
200 * A negative error code is returned if the port is invalid.
202 int fm_info_get_phy_address(enum fm_port port
)
204 int i
= fm_port_to_index(port
);
209 return fm_info
[i
].phy_addr
;
213 * Returns the type of the data interface between the given MAC and its PHY.
214 * This is typically determined by the RCW.
216 phy_interface_t
fm_info_get_enet_if(enum fm_port port
)
218 int i
= fm_port_to_index(port
);
221 return PHY_INTERFACE_MODE_NONE
;
223 if (fm_info
[i
].enabled
)
224 return fm_info
[i
].enet_if
;
226 return PHY_INTERFACE_MODE_NONE
;
230 __def_board_ft_fman_fixup_port(void *blob
, char * prop
, phys_addr_t pa
,
231 enum fm_port port
, int offset
)
236 void board_ft_fman_fixup_port(void *blob
, char * prop
, phys_addr_t pa
,
237 enum fm_port port
, int offset
)
238 __attribute__((weak
, alias("__def_board_ft_fman_fixup_port")));
240 int ft_fixup_port(void *blob
, struct fm_eth_info
*info
, char *prop
)
244 phys_addr_t paddr
= CONFIG_SYS_CCSRBAR_PHYS
+ info
->compat_offset
;
245 #ifndef CONFIG_SYS_FMAN_V3
246 u64 dtsec1_addr
= (u64
)CONFIG_SYS_CCSRBAR_PHYS
+
247 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET
;
250 off
= fdt_node_offset_by_compat_reg(blob
, prop
, paddr
);
251 if (off
== -FDT_ERR_NOTFOUND
)
255 fdt_fixup_phy_connection(blob
, off
, info
->enet_if
);
256 board_ft_fman_fixup_port(blob
, prop
, paddr
, info
->port
, off
);
260 #ifdef CONFIG_SYS_FMAN_V3
261 #ifndef CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
263 * On T2/T4 SoCs, physically FM1_DTSEC9 and FM1_10GEC1 use the same
264 * dual-role MAC, when FM1_10GEC1 is enabled and FM1_DTSEC9
265 * is disabled, ensure that the dual-role MAC is not disabled,
266 * ditto for other dual-role MACs.
268 if (((info
->port
== FM1_DTSEC9
) && (PORT_IS_ENABLED(FM1_10GEC1
))) ||
269 ((info
->port
== FM1_DTSEC10
) && (PORT_IS_ENABLED(FM1_10GEC2
))) ||
270 ((info
->port
== FM1_DTSEC1
) && (PORT_IS_ENABLED(FM1_10GEC3
))) ||
271 ((info
->port
== FM1_DTSEC2
) && (PORT_IS_ENABLED(FM1_10GEC4
))) ||
272 ((info
->port
== FM1_10GEC1
) && (PORT_IS_ENABLED(FM1_DTSEC9
))) ||
273 ((info
->port
== FM1_10GEC2
) && (PORT_IS_ENABLED(FM1_DTSEC10
))) ||
274 ((info
->port
== FM1_10GEC3
) && (PORT_IS_ENABLED(FM1_DTSEC1
))) ||
275 ((info
->port
== FM1_10GEC4
) && (PORT_IS_ENABLED(FM1_DTSEC2
)))
276 #if (CONFIG_SYS_NUM_FMAN == 2)
278 ((info
->port
== FM2_DTSEC9
) && (PORT_IS_ENABLED(FM2_10GEC1
))) ||
279 ((info
->port
== FM2_DTSEC10
) && (PORT_IS_ENABLED(FM2_10GEC2
))) ||
280 ((info
->port
== FM2_10GEC1
) && (PORT_IS_ENABLED(FM2_DTSEC9
))) ||
281 ((info
->port
== FM2_10GEC2
) && (PORT_IS_ENABLED(FM2_DTSEC10
)))
284 /* FM1_DTSECx and FM1_10GECx use the same dual-role MAC */
285 if (((info
->port
== FM1_DTSEC1
) && (PORT_IS_ENABLED(FM1_10GEC1
))) ||
286 ((info
->port
== FM1_DTSEC2
) && (PORT_IS_ENABLED(FM1_10GEC2
))) ||
287 ((info
->port
== FM1_DTSEC3
) && (PORT_IS_ENABLED(FM1_10GEC3
))) ||
288 ((info
->port
== FM1_DTSEC4
) && (PORT_IS_ENABLED(FM1_10GEC4
))) ||
289 ((info
->port
== FM1_10GEC1
) && (PORT_IS_ENABLED(FM1_DTSEC1
))) ||
290 ((info
->port
== FM1_10GEC2
) && (PORT_IS_ENABLED(FM1_DTSEC2
))) ||
291 ((info
->port
== FM1_10GEC3
) && (PORT_IS_ENABLED(FM1_DTSEC3
))) ||
292 ((info
->port
== FM1_10GEC4
) && (PORT_IS_ENABLED(FM1_DTSEC4
)))
297 /* board code might have caused offset to change */
298 off
= fdt_node_offset_by_compat_reg(blob
, prop
, paddr
);
300 #ifndef CONFIG_SYS_FMAN_V3
301 /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
302 if (paddr
!= dtsec1_addr
)
304 fdt_status_disabled(blob
, off
); /* disable the MAC node */
306 /* disable the fsl,dpa-ethernet node that points to the MAC */
307 ph
= fdt_get_phandle(blob
, off
);
308 do_fixup_by_prop(blob
, "fsl,fman-mac", &ph
, sizeof(ph
),
309 "status", "disabled", strlen("disabled") + 1, 1);
314 void fdt_fixup_fman_ethernet(void *blob
)
318 #ifdef CONFIG_SYS_FMAN_V3
319 for (i
= 0; i
< ARRAY_SIZE(fm_info
); i
++)
320 ft_fixup_port(blob
, &fm_info
[i
], "fsl,fman-memac");
322 for (i
= 0; i
< ARRAY_SIZE(fm_info
); i
++) {
323 /* Try the new compatible first.
324 * If the node is missing, try the old.
326 if (fm_info
[i
].type
== FM_ETH_1G_E
) {
327 if (ft_fixup_port(blob
, &fm_info
[i
], "fsl,fman-dtsec"))
328 ft_fixup_port(blob
, &fm_info
[i
],
331 if (ft_fixup_port(blob
, &fm_info
[i
], "fsl,fman-tgec"))
332 ft_fixup_port(blob
, &fm_info
[i
],
339 /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different.
340 *This function scans which Riser Card being used(QSGMII or SGMII Riser Card),
341 *then set the correct PHY address
343 void set_sgmii_phy(struct mii_dev
*bus
, enum fm_port base_port
,
344 unsigned int port_num
, int phy_base_addr
)
346 unsigned int regnum
= 0;
351 qsgmii
= is_qsgmii_riser_card(bus
, phy_base_addr
, port_num
, regnum
);
356 for (i
= base_port
; i
< base_port
+ port_num
; i
++) {
357 if (fm_info_get_enet_if(i
) == PHY_INTERFACE_MODE_SGMII
) {
358 phy_real_addr
= phy_base_addr
+ i
- base_port
;
359 fm_info_set_phy_address(i
, phy_real_addr
);
364 /*to check whether qsgmii riser card is used*/
365 int is_qsgmii_riser_card(struct mii_dev
*bus
, int phy_base_addr
,
366 unsigned int port_num
, unsigned regnum
)
374 for (i
= phy_base_addr
; i
< phy_base_addr
+ port_num
; i
++) {
375 val
= bus
->read(bus
, i
, MDIO_DEVAD_NONE
, regnum
);
376 if (val
!= MIIM_TIMEOUT
)