2 * Copyright 2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/immap_85xx.h>
11 #include <asm/fsl_serdes.h>
13 static u32 port_to_devdisr
[] = {
14 [FM1_DTSEC1
] = MPC85xx_DEVDISR_TSEC1
,
15 [FM1_DTSEC2
] = MPC85xx_DEVDISR_TSEC2
,
18 static int is_device_disabled(enum fm_port port
)
20 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
21 u32 devdisr
= in_be32(&gur
->devdisr
);
23 return port_to_devdisr
[port
] & devdisr
;
26 void fman_disable_port(enum fm_port port
)
28 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
30 /* don't allow disabling of DTSEC1 as its needed for MDIO */
31 if (port
== FM1_DTSEC1
)
34 setbits_be32(&gur
->devdisr
, port_to_devdisr
[port
]);
37 phy_interface_t
fman_port_enet_if(enum fm_port port
)
39 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
40 u32 pordevsr
= in_be32(&gur
->pordevsr
);
42 if (is_device_disabled(port
))
43 return PHY_INTERFACE_MODE_NONE
;
45 /* DTSEC1 can be SGMII, RGMII or RMII */
46 if (port
== FM1_DTSEC1
) {
47 if (is_serdes_configured(SGMII_FM1_DTSEC1
))
48 return PHY_INTERFACE_MODE_SGMII
;
49 if (pordevsr
& MPC85xx_PORDEVSR_SGMII1_DIS
) {
50 if (pordevsr
& MPC85xx_PORDEVSR_TSEC1_PRTC
)
51 return PHY_INTERFACE_MODE_RGMII
;
53 return PHY_INTERFACE_MODE_RMII
;
57 /* DTSEC2 only supports SGMII or RGMII */
58 if (port
== FM1_DTSEC2
) {
59 if (is_serdes_configured(SGMII_FM1_DTSEC2
))
60 return PHY_INTERFACE_MODE_SGMII
;
61 if (pordevsr
& MPC85xx_PORDEVSR_SGMII2_DIS
)
62 return PHY_INTERFACE_MODE_RGMII
;
65 return PHY_INTERFACE_MODE_NONE
;