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git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/net/mcfmii.c
2 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
3 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
5 * SPDX-License-Identifier: GPL-2.0+
13 #ifdef CONFIG_MCF547x_8x
14 #include <asm/fsl_mcdmafec.h>
18 #include <asm/immap.h>
20 DECLARE_GLOBAL_DATA_PTR
;
22 #if defined(CONFIG_CMD_NET)
26 /*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/
28 #if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
31 /* Make MII read/write commands for the FEC. */
32 #define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \
34 #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
35 (REG & 0x1f) << 18) | (VAL & 0xffff))
37 #ifndef CONFIG_SYS_UNSPEC_PHYID
38 # define CONFIG_SYS_UNSPEC_PHYID 0
40 #ifndef CONFIG_SYS_UNSPEC_STRID
41 # define CONFIG_SYS_UNSPEC_STRID 0
44 #ifdef CONFIG_MCF547x_8x
45 typedef struct fec_info_dma FEC_INFO_T
;
46 #define FEC_T fecdma_t
48 typedef struct fec_info_s FEC_INFO_T
;
52 typedef struct phy_info_struct
{
57 phy_info_t phyinfo
[] = {
58 {0x0022561B, "AMD79C784VC"}, /* AMD 79C784VC */
59 {0x00406322, "BCM5222"}, /* Broadcom 5222 */
60 {0x02a80150, "Intel82555"}, /* Intel 82555 */
61 {0x0016f870, "LSI80225"}, /* LSI 80225 */
62 {0x0016f880, "LSI80225/B"}, /* LSI 80225/B */
63 {0x78100000, "LXT970"}, /* LXT970 */
64 {0x001378e0, "LXT971"}, /* LXT971 and 972 */
65 {0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */
66 {0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */
67 {0x20005CE1, "N83640"}, /* National 83640 */
68 {0x20005C90, "N83848"}, /* National 83848 */
69 {0x20005CA2, "N83849"}, /* National 83849 */
70 {0x01814400, "QS6612"}, /* QS6612 */
71 #if defined(CONFIG_SYS_UNSPEC_PHYID) && defined(CONFIG_SYS_UNSPEC_STRID)
72 {CONFIG_SYS_UNSPEC_PHYID
, CONFIG_SYS_UNSPEC_STRID
},
78 * mii_init -- Initialize the MII for MII command without ethernet
79 * This function is a subset of eth_init
81 void mii_reset(FEC_INFO_T
*info
)
83 volatile FEC_T
*fecp
= (FEC_T
*) (info
->miibase
);
86 fecp
->ecr
= FEC_ECR_RESET
;
88 for (i
= 0; (fecp
->ecr
& FEC_ECR_RESET
) && (i
< FEC_RESET_DELAY
); ++i
) {
91 if (i
== FEC_RESET_DELAY
)
92 printf("FEC_RESET_DELAY timeout\n");
95 /* send command to phy using mii, wait for result */
96 uint
mii_send(uint mii_cmd
)
100 struct eth_device
*dev
;
104 /* retrieve from register structure */
108 ep
= (FEC_T
*) info
->miibase
;
110 ep
->mmfr
= mii_cmd
; /* command to phy */
112 /* wait for mii complete */
113 while (!(ep
->eir
& FEC_EIR_MII
) && (j
< MCFFEC_TOUT_LOOP
)) {
117 if (j
>= MCFFEC_TOUT_LOOP
) {
118 printf("MII not complete\n");
122 mii_reply
= ep
->mmfr
; /* result from phy */
123 ep
->eir
= FEC_EIR_MII
; /* clear MII complete */
125 printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
126 __FILE__
, __LINE__
, __FUNCTION__
, mii_cmd
, mii_reply
);
129 return (mii_reply
& 0xffff); /* data read from phy */
131 #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
133 #if defined(CONFIG_SYS_DISCOVER_PHY)
134 int mii_discover_phy(struct eth_device
*dev
)
136 #define MAX_PHY_PASSES 11
137 FEC_INFO_T
*info
= dev
->priv
;
142 if (info
->phyname_init
)
143 return info
->phy_addr
;
145 phyaddr
= -1; /* didn't find a PHY yet */
146 for (pass
= 1; pass
<= MAX_PHY_PASSES
&& phyaddr
< 0; ++pass
) {
148 /* PHY may need more time to recover from reset.
149 * The LXT970 needs 50ms typical, no maximum is
150 * specified, so wait 10ms before try again.
151 * With 11 passes this gives it 100ms to wake up.
153 udelay(10000); /* wait 10ms */
156 for (phyno
= 0; phyno
< 32 && phyaddr
< 0; ++phyno
) {
158 phytype
= mii_send(mk_mii_read(phyno
, MII_PHYSID1
));
160 printf("PHY type 0x%x pass %d type\n", phytype
, pass
);
162 if (phytype
== 0xffff)
167 mii_send(mk_mii_read(phyno
, MII_PHYSID2
));
170 printf("PHY @ 0x%x pass %d\n", phyno
, pass
);
173 for (i
= 0; (i
< ARRAY_SIZE(phyinfo
))
174 && (phyinfo
[i
].phyid
!= 0); i
++) {
175 if (phyinfo
[i
].phyid
== phytype
) {
177 printf("phyid %x - %s\n",
181 strcpy(info
->phy_name
, phyinfo
[i
].strid
);
182 info
->phyname_init
= 1;
190 printf("0x%08x\n", phytype
);
192 strcpy(info
->phy_name
, "unknown");
193 info
->phyname_init
= 1;
200 printf("No PHY device found.\n");
204 #endif /* CONFIG_SYS_DISCOVER_PHY */
206 void mii_init(void) __attribute__((weak
,alias("__mii_init")));
208 void __mii_init(void)
211 volatile FEC_T
*fecp
;
212 struct eth_device
*dev
;
213 int miispd
= 0, i
= 0;
217 /* retrieve from register structure */
221 fecp
= (FEC_T
*) info
->miibase
;
223 fecpin_setclear(dev
, 1);
227 /* We use strictly polling mode only */
230 /* Clear any pending interrupt */
231 fecp
->eir
= 0xffffffff;
234 miispd
= (gd
->bus_clk
/ 1000000) / 5;
235 fecp
->mscr
= miispd
<< 1;
237 info
->phy_addr
= mii_discover_phy(dev
);
239 while (i
< MCFFEC_TOUT_LOOP
) {
242 /* Read PHY control register */
243 miiphy_read(dev
->name
, info
->phy_addr
, MII_BMCR
, &status
);
245 /* If phy set to autonegotiate, wait for autonegotiation done,
246 * if phy is not autonegotiating, just wait for link up.
248 if ((status
& BMCR_ANENABLE
) == BMCR_ANENABLE
) {
249 linkgood
= (BMSR_ANEGCOMPLETE
| BMSR_LSTATUS
);
251 linkgood
= BMSR_LSTATUS
;
253 /* Read PHY status register */
254 miiphy_read(dev
->name
, info
->phy_addr
, MII_BMSR
, &status
);
255 if ((status
& linkgood
) == linkgood
)
260 if (i
>= MCFFEC_TOUT_LOOP
) {
261 printf("Link UP timeout\n");
264 /* adapt to the duplex and speed settings of the phy */
265 info
->dup_spd
= miiphy_duplex(dev
->name
, info
->phy_addr
) << 16;
266 info
->dup_spd
|= miiphy_speed(dev
->name
, info
->phy_addr
);
270 * Read and write a MII PHY register, routines used by MII Utilities
272 * FIXME: These routines are expected to return 0 on success, but mii_send
273 * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
274 * no PHY connected...
275 * For now always return 0.
276 * FIXME: These routines only work after calling eth_init() at least once!
277 * Otherwise they hang in mii_send() !!! Sorry!
280 int mcffec_miiphy_read(struct mii_dev
*bus
, int addr
, int devad
, int reg
)
282 short rdreg
; /* register working value */
285 printf("miiphy_read(0x%x) @ 0x%x = ", reg
, addr
);
287 rdreg
= mii_send(mk_mii_read(addr
, reg
));
290 printf("0x%04x\n", rdreg
);
296 int mcffec_miiphy_write(struct mii_dev
*bus
, int addr
, int devad
, int reg
,
300 printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg
, addr
, value
);
303 mii_send(mk_mii_write(addr
, reg
, value
));
308 #endif /* CONFIG_CMD_NET */