drivers/pci/pci-uclass.c

   1 /*
   2  * Copyright (c) 2014 Google, Inc
   3  * Written by Simon Glass <sjg@chromium.org>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <errno.h>
  11 #include <fdtdec.h>
  12 #include <inttypes.h>
  13 #include <pci.h>
  14 #include <dm/lists.h>
  15 #include <dm/root.h>
  16 #include <dm/device-internal.h>
  17 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
  18 #include <asm/fsp/fsp_support.h>
  19 #endif
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 static int pci_get_bus(int busnum, struct udevice **busp)
  24 {
  25         int ret;
  26
  27         ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp);
  28
  29         /* Since buses may not be numbered yet try a little harder with bus 0 */
  30         if (ret == -ENODEV) {
  31                 ret = uclass_first_device(UCLASS_PCI, busp);
  32                 if (ret)
  33                         return ret;
  34                 else if (!*busp)
  35                         return -ENODEV;
  36                 ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp);
  37         }
  38
  39         return ret;
  40 }
  41
  42 struct pci_controller *pci_bus_to_hose(int busnum)
  43 {
  44         struct udevice *bus;
  45         int ret;
  46
  47         ret = pci_get_bus(busnum, &bus);
  48         if (ret) {
  49                 debug("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret);
  50                 return NULL;
  51         }
  52
  53         return dev_get_uclass_priv(bus);
  54 }
  55
  56 pci_dev_t pci_get_bdf(struct udevice *dev)
  57 {
  58         struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
  59         struct udevice *bus = dev->parent;
  60
  61         return PCI_ADD_BUS(bus->seq, pplat->devfn);
  62 }
  63
  64 /**
  65  * pci_get_bus_max() - returns the bus number of the last active bus
  66  *
  67  * @return last bus number, or -1 if no active buses
  68  */
  69 static int pci_get_bus_max(void)
  70 {
  71         struct udevice *bus;
  72         struct uclass *uc;
  73         int ret = -1;
  74
  75         ret = uclass_get(UCLASS_PCI, &uc);
  76         uclass_foreach_dev(bus, uc) {
  77                 if (bus->seq > ret)
  78                         ret = bus->seq;
  79         }
  80
  81         debug("%s: ret=%d\n", __func__, ret);
  82
  83         return ret;
  84 }
  85
  86 int pci_last_busno(void)
  87 {
  88         return pci_get_bus_max();
  89 }
  90
  91 int pci_get_ff(enum pci_size_t size)
  92 {
  93         switch (size) {
  94         case PCI_SIZE_8:
  95                 return 0xff;
  96         case PCI_SIZE_16:
  97                 return 0xffff;
  98         default:
  99                 return 0xffffffff;
 100         }
 101 }
 102
 103 int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn,
 104                        struct udevice **devp)
 105 {
 106         struct udevice *dev;
 107
 108         for (device_find_first_child(bus, &dev);
 109              dev;
 110              device_find_next_child(&dev)) {
 111                 struct pci_child_platdata *pplat;
 112
 113                 pplat = dev_get_parent_platdata(dev);
 114                 if (pplat && pplat->devfn == find_devfn) {
 115                         *devp = dev;
 116                         return 0;
 117                 }
 118         }
 119
 120         return -ENODEV;
 121 }
 122
 123 int pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp)
 124 {
 125         struct udevice *bus;
 126         int ret;
 127
 128         ret = pci_get_bus(PCI_BUS(bdf), &bus);
 129         if (ret)
 130                 return ret;
 131         return pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), devp);
 132 }
 133
 134 static int pci_device_matches_ids(struct udevice *dev,
 135                                   struct pci_device_id *ids)
 136 {
 137         struct pci_child_platdata *pplat;
 138         int i;
 139
 140         pplat = dev_get_parent_platdata(dev);
 141         if (!pplat)
 142                 return -EINVAL;
 143         for (i = 0; ids[i].vendor != 0; i++) {
 144                 if (pplat->vendor == ids[i].vendor &&
 145                     pplat->device == ids[i].device)
 146                         return i;
 147         }
 148
 149         return -EINVAL;
 150 }
 151
 152 int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids,
 153                          int *indexp, struct udevice **devp)
 154 {
 155         struct udevice *dev;
 156
 157         /* Scan all devices on this bus */
 158         for (device_find_first_child(bus, &dev);
 159              dev;
 160              device_find_next_child(&dev)) {
 161                 if (pci_device_matches_ids(dev, ids) >= 0) {
 162                         if ((*indexp)-- <= 0) {
 163                                 *devp = dev;
 164                                 return 0;
 165                         }
 166                 }
 167         }
 168
 169         return -ENODEV;
 170 }
 171
 172 int pci_find_device_id(struct pci_device_id *ids, int index,
 173                        struct udevice **devp)
 174 {
 175         struct udevice *bus;
 176
 177         /* Scan all known buses */
 178         for (uclass_first_device(UCLASS_PCI, &bus);
 179              bus;
 180              uclass_next_device(&bus)) {
 181                 if (!pci_bus_find_devices(bus, ids, &index, devp))
 182                         return 0;
 183         }
 184         *devp = NULL;
 185
 186         return -ENODEV;
 187 }
 188
 189 int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset,
 190                          unsigned long value, enum pci_size_t size)
 191 {
 192         struct dm_pci_ops *ops;
 193
 194         ops = pci_get_ops(bus);
 195         if (!ops->write_config)
 196                 return -ENOSYS;
 197         return ops->write_config(bus, bdf, offset, value, size);
 198 }
 199
 200 int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
 201                      enum pci_size_t size)
 202 {
 203         struct udevice *bus;
 204         int ret;
 205
 206         ret = pci_get_bus(PCI_BUS(bdf), &bus);
 207         if (ret)
 208                 return ret;
 209
 210         return pci_bus_write_config(bus, bdf, offset, value, size);
 211 }
 212
 213 int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value,
 214                         enum pci_size_t size)
 215 {
 216         struct udevice *bus;
 217
 218         for (bus = dev; device_is_on_pci_bus(bus);)
 219                 bus = bus->parent;
 220         return pci_bus_write_config(bus, pci_get_bdf(dev), offset, value, size);
 221 }
 222
 223
 224 int pci_write_config32(pci_dev_t bdf, int offset, u32 value)
 225 {
 226         return pci_write_config(bdf, offset, value, PCI_SIZE_32);
 227 }
 228
 229 int pci_write_config16(pci_dev_t bdf, int offset, u16 value)
 230 {
 231         return pci_write_config(bdf, offset, value, PCI_SIZE_16);
 232 }
 233
 234 int pci_write_config8(pci_dev_t bdf, int offset, u8 value)
 235 {
 236         return pci_write_config(bdf, offset, value, PCI_SIZE_8);
 237 }
 238
 239 int dm_pci_write_config8(struct udevice *dev, int offset, u8 value)
 240 {
 241         return dm_pci_write_config(dev, offset, value, PCI_SIZE_8);
 242 }
 243
 244 int dm_pci_write_config16(struct udevice *dev, int offset, u16 value)
 245 {
 246         return dm_pci_write_config(dev, offset, value, PCI_SIZE_16);
 247 }
 248
 249 int dm_pci_write_config32(struct udevice *dev, int offset, u32 value)
 250 {
 251         return dm_pci_write_config(dev, offset, value, PCI_SIZE_32);
 252 }
 253
 254 int pci_bus_read_config(struct udevice *bus, pci_dev_t bdf, int offset,
 255                         unsigned long *valuep, enum pci_size_t size)
 256 {
 257         struct dm_pci_ops *ops;
 258
 259         ops = pci_get_ops(bus);
 260         if (!ops->read_config)
 261                 return -ENOSYS;
 262         return ops->read_config(bus, bdf, offset, valuep, size);
 263 }
 264
 265 int pci_read_config(pci_dev_t bdf, int offset, unsigned long *valuep,
 266                     enum pci_size_t size)
 267 {
 268         struct udevice *bus;
 269         int ret;
 270
 271         ret = pci_get_bus(PCI_BUS(bdf), &bus);
 272         if (ret)
 273                 return ret;
 274
 275         return pci_bus_read_config(bus, bdf, offset, valuep, size);
 276 }
 277
 278 int dm_pci_read_config(struct udevice *dev, int offset, unsigned long *valuep,
 279                        enum pci_size_t size)
 280 {
 281         struct udevice *bus;
 282
 283         for (bus = dev; device_is_on_pci_bus(bus);)
 284                 bus = bus->parent;
 285         return pci_bus_read_config(bus, pci_get_bdf(dev), offset, valuep,
 286                                    size);
 287 }
 288
 289 int pci_read_config32(pci_dev_t bdf, int offset, u32 *valuep)
 290 {
 291         unsigned long value;
 292         int ret;
 293
 294         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_32);
 295         if (ret)
 296                 return ret;
 297         *valuep = value;
 298
 299         return 0;
 300 }
 301
 302 int pci_read_config16(pci_dev_t bdf, int offset, u16 *valuep)
 303 {
 304         unsigned long value;
 305         int ret;
 306
 307         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_16);
 308         if (ret)
 309                 return ret;
 310         *valuep = value;
 311
 312         return 0;
 313 }
 314
 315 int pci_read_config8(pci_dev_t bdf, int offset, u8 *valuep)
 316 {
 317         unsigned long value;
 318         int ret;
 319
 320         ret = pci_read_config(bdf, offset, &value, PCI_SIZE_8);
 321         if (ret)
 322                 return ret;
 323         *valuep = value;
 324
 325         return 0;
 326 }
 327
 328 int dm_pci_read_config8(struct udevice *dev, int offset, u8 *valuep)
 329 {
 330         unsigned long value;
 331         int ret;
 332
 333         ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_8);
 334         if (ret)
 335                 return ret;
 336         *valuep = value;
 337
 338         return 0;
 339 }
 340
 341 int dm_pci_read_config16(struct udevice *dev, int offset, u16 *valuep)
 342 {
 343         unsigned long value;
 344         int ret;
 345
 346         ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_16);
 347         if (ret)
 348                 return ret;
 349         *valuep = value;
 350
 351         return 0;
 352 }
 353
 354 int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)
 355 {
 356         unsigned long value;
 357         int ret;
 358
 359         ret = dm_pci_read_config(dev, offset, &value, PCI_SIZE_32);
 360         if (ret)
 361                 return ret;
 362         *valuep = value;
 363
 364         return 0;
 365 }
 366
 367 int pci_auto_config_devices(struct udevice *bus)
 368 {
 369         struct pci_controller *hose = bus->uclass_priv;
 370         unsigned int sub_bus;
 371         struct udevice *dev;
 372         int ret;
 373
 374         sub_bus = bus->seq;
 375         debug("%s: start\n", __func__);
 376         pciauto_config_init(hose);
 377         for (ret = device_find_first_child(bus, &dev);
 378              !ret && dev;
 379              ret = device_find_next_child(&dev)) {
 380                 unsigned int max_bus;
 381                 int ret;
 382
 383                 debug("%s: device %s\n", __func__, dev->name);
 384                 ret = pciauto_config_device(hose, pci_get_bdf(dev));
 385                 if (ret < 0)
 386                         return ret;
 387                 max_bus = ret;
 388                 sub_bus = max(sub_bus, max_bus);
 389         }
 390         debug("%s: done\n", __func__);
 391
 392         return sub_bus;
 393 }
 394
 395 int dm_pci_hose_probe_bus(struct pci_controller *hose, pci_dev_t bdf)
 396 {
 397         struct udevice *parent, *bus;
 398         int sub_bus;
 399         int ret;
 400
 401         debug("%s\n", __func__);
 402         parent = hose->bus;
 403
 404         /* Find the bus within the parent */
 405         ret = pci_bus_find_devfn(parent, PCI_MASK_BUS(bdf), &bus);
 406         if (ret) {
 407                 debug("%s: Cannot find device %x on bus %s: %d\n", __func__,
 408                       bdf, parent->name, ret);
 409                 return ret;
 410         }
 411
 412         sub_bus = pci_get_bus_max() + 1;
 413         debug("%s: bus = %d/%s\n", __func__, sub_bus, bus->name);
 414         pciauto_prescan_setup_bridge(hose, bdf, sub_bus);
 415
 416         ret = device_probe(bus);
 417         if (ret) {
 418                 debug("%s: Cannot probe bus %s: %d\n", __func__, bus->name,
 419                       ret);
 420                 return ret;
 421         }
 422         if (sub_bus != bus->seq) {
 423                 printf("%s: Internal error, bus '%s' got seq %d, expected %d\n",
 424                        __func__, bus->name, bus->seq, sub_bus);
 425                 return -EPIPE;
 426         }
 427         sub_bus = pci_get_bus_max();
 428         pciauto_postscan_setup_bridge(hose, bdf, sub_bus);
 429
 430         return sub_bus;
 431 }
 432
 433 /**
 434  * pci_match_one_device - Tell if a PCI device structure has a matching
 435  *                        PCI device id structure
 436  * @id: single PCI device id structure to match
 437  * @dev: the PCI device structure to match against
 438  *
 439  * Returns the matching pci_device_id structure or %NULL if there is no match.
 440  */
 441 static bool pci_match_one_id(const struct pci_device_id *id,
 442                              const struct pci_device_id *find)
 443 {
 444         if ((id->vendor == PCI_ANY_ID || id->vendor == find->vendor) &&
 445             (id->device == PCI_ANY_ID || id->device == find->device) &&
 446             (id->subvendor == PCI_ANY_ID || id->subvendor == find->subvendor) &&
 447             (id->subdevice == PCI_ANY_ID || id->subdevice == find->subdevice) &&
 448             !((id->class ^ find->class) & id->class_mask))
 449                 return true;
 450
 451         return false;
 452 }
 453
 454 /**
 455  * pci_find_and_bind_driver() - Find and bind the right PCI driver
 456  *
 457  * This only looks at certain fields in the descriptor.
 458  *
 459  * @parent:     Parent bus
 460  * @find_id:    Specification of the driver to find
 461  * @bdf:        Bus/device/function addreess - see PCI_BDF()
 462  * @devp:       Returns a pointer to the device created
 463  * @return 0 if OK, -EPERM if the device is not needed before relocation and
 464  *         therefore was not created, other -ve value on error
 465  */
 466 static int pci_find_and_bind_driver(struct udevice *parent,
 467                                     struct pci_device_id *find_id,
 468                                     pci_dev_t bdf, struct udevice **devp)
 469 {
 470         struct pci_driver_entry *start, *entry;
 471         const char *drv;
 472         int n_ents;
 473         int ret;
 474         char name[30], *str;
 475         bool bridge;
 476
 477         *devp = NULL;
 478
 479         debug("%s: Searching for driver: vendor=%x, device=%x\n", __func__,
 480               find_id->vendor, find_id->device);
 481         start = ll_entry_start(struct pci_driver_entry, pci_driver_entry);
 482         n_ents = ll_entry_count(struct pci_driver_entry, pci_driver_entry);
 483         for (entry = start; entry != start + n_ents; entry++) {
 484                 const struct pci_device_id *id;
 485                 struct udevice *dev;
 486                 const struct driver *drv;
 487
 488                 for (id = entry->match;
 489                      id->vendor || id->subvendor || id->class_mask;
 490                      id++) {
 491                         if (!pci_match_one_id(id, find_id))
 492                                 continue;
 493
 494                         drv = entry->driver;
 495
 496                         /*
 497                          * In the pre-relocation phase, we only bind devices
 498                          * whose driver has the DM_FLAG_PRE_RELOC set, to save
 499                          * precious memory space as on some platforms as that
 500                          * space is pretty limited (ie: using Cache As RAM).
 501                          */
 502                         if (!(gd->flags & GD_FLG_RELOC) &&
 503                             !(drv->flags & DM_FLAG_PRE_RELOC))
 504                                 return -EPERM;
 505
 506                         /*
 507                          * We could pass the descriptor to the driver as
 508                          * platdata (instead of NULL) and allow its bind()
 509                          * method to return -ENOENT if it doesn't support this
 510                          * device. That way we could continue the search to
 511                          * find another driver. For now this doesn't seem
 512                          * necesssary, so just bind the first match.
 513                          */
 514                         ret = device_bind(parent, drv, drv->name, NULL, -1,
 515                                           &dev);
 516                         if (ret)
 517                                 goto error;
 518                         debug("%s: Match found: %s\n", __func__, drv->name);
 519                         dev->driver_data = find_id->driver_data;
 520                         *devp = dev;
 521                         return 0;
 522                 }
 523         }
 524
 525         bridge = (find_id->class >> 8) == PCI_CLASS_BRIDGE_PCI;
 526         /*
 527          * In the pre-relocation phase, we only bind bridge devices to save
 528          * precious memory space as on some platforms as that space is pretty
 529          * limited (ie: using Cache As RAM).
 530          */
 531         if (!(gd->flags & GD_FLG_RELOC) && !bridge)
 532                 return -EPERM;
 533
 534         /* Bind a generic driver so that the device can be used */
 535         sprintf(name, "pci_%x:%x.%x", parent->seq, PCI_DEV(bdf),
 536                 PCI_FUNC(bdf));
 537         str = strdup(name);
 538         if (!str)
 539                 return -ENOMEM;
 540         drv = bridge ? "pci_bridge_drv" : "pci_generic_drv";
 541
 542         ret = device_bind_driver(parent, drv, str, devp);
 543         if (ret) {
 544                 debug("%s: Failed to bind generic driver: %d\n", __func__, ret);
 545                 return ret;
 546         }
 547         debug("%s: No match found: bound generic driver instead\n", __func__);
 548
 549         return 0;
 550
 551 error:
 552         debug("%s: No match found: error %d\n", __func__, ret);
 553         return ret;
 554 }
 555
 556 int pci_bind_bus_devices(struct udevice *bus)
 557 {
 558         ulong vendor, device;
 559         ulong header_type;
 560         pci_dev_t bdf, end;
 561         bool found_multi;
 562         int ret;
 563
 564         found_multi = false;
 565         end = PCI_BDF(bus->seq, PCI_MAX_PCI_DEVICES - 1,
 566                       PCI_MAX_PCI_FUNCTIONS - 1);
 567         for (bdf = PCI_BDF(bus->seq, 0, 0); bdf < end;
 568              bdf += PCI_BDF(0, 0, 1)) {
 569                 struct pci_child_platdata *pplat;
 570                 struct udevice *dev;
 571                 ulong class;
 572
 573                 if (PCI_FUNC(bdf) && !found_multi)
 574                         continue;
 575                 /* Check only the first access, we don't expect problems */
 576                 ret = pci_bus_read_config(bus, bdf, PCI_HEADER_TYPE,
 577                                           &header_type, PCI_SIZE_8);
 578                 if (ret)
 579                         goto error;
 580                 pci_bus_read_config(bus, bdf, PCI_VENDOR_ID, &vendor,
 581                                     PCI_SIZE_16);
 582                 if (vendor == 0xffff || vendor == 0x0000)
 583                         continue;
 584
 585                 if (!PCI_FUNC(bdf))
 586                         found_multi = header_type & 0x80;
 587
 588                 debug("%s: bus %d/%s: found device %x, function %d\n", __func__,
 589                       bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf));
 590                 pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device,
 591                                     PCI_SIZE_16);
 592                 pci_bus_read_config(bus, bdf, PCI_CLASS_REVISION, &class,
 593                                     PCI_SIZE_32);
 594                 class >>= 8;
 595
 596                 /* Find this device in the device tree */
 597                 ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev);
 598
 599                 /* Search for a driver */
 600
 601                 /* If nothing in the device tree, bind a generic device */
 602                 if (ret == -ENODEV) {
 603                         struct pci_device_id find_id;
 604                         ulong val;
 605
 606                         memset(&find_id, '\0', sizeof(find_id));
 607                         find_id.vendor = vendor;
 608                         find_id.device = device;
 609                         find_id.class = class;
 610                         if ((header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL) {
 611                                 pci_bus_read_config(bus, bdf,
 612                                                     PCI_SUBSYSTEM_VENDOR_ID,
 613                                                     &val, PCI_SIZE_32);
 614                                 find_id.subvendor = val & 0xffff;
 615                                 find_id.subdevice = val >> 16;
 616                         }
 617                         ret = pci_find_and_bind_driver(bus, &find_id, bdf,
 618                                                        &dev);
 619                 }
 620                 if (ret == -EPERM)
 621                         continue;
 622                 else if (ret)
 623                         return ret;
 624
 625                 /* Update the platform data */
 626                 pplat = dev_get_parent_platdata(dev);
 627                 pplat->devfn = PCI_MASK_BUS(bdf);
 628                 pplat->vendor = vendor;
 629                 pplat->device = device;
 630                 pplat->class = class;
 631         }
 632
 633         return 0;
 634 error:
 635         printf("Cannot read bus configuration: %d\n", ret);
 636
 637         return ret;
 638 }
 639
 640 static int pci_uclass_post_bind(struct udevice *bus)
 641 {
 642         /*
 643          * If there is no pci device listed in the device tree,
 644          * don't bother scanning the device tree.
 645          */
 646         if (bus->of_offset == -1)
 647                 return 0;
 648
 649         /*
 650          * Scan the device tree for devices. This does not probe the PCI bus,
 651          * as this is not permitted while binding. It just finds devices
 652          * mentioned in the device tree.
 653          *
 654          * Before relocation, only bind devices marked for pre-relocation
 655          * use.
 656          */
 657         return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset,
 658                                 gd->flags & GD_FLG_RELOC ? false : true);
 659 }
 660
 661 static int decode_regions(struct pci_controller *hose, const void *blob,
 662                           int parent_node, int node)
 663 {
 664         int pci_addr_cells, addr_cells, size_cells;
 665         int cells_per_record;
 666         phys_addr_t addr;
 667         const u32 *prop;
 668         int len;
 669         int i;
 670
 671         prop = fdt_getprop(blob, node, "ranges", &len);
 672         if (!prop)
 673                 return -EINVAL;
 674         pci_addr_cells = fdt_address_cells(blob, node);
 675         addr_cells = fdt_address_cells(blob, parent_node);
 676         size_cells = fdt_size_cells(blob, node);
 677
 678         /* PCI addresses are always 3-cells */
 679         len /= sizeof(u32);
 680         cells_per_record = pci_addr_cells + addr_cells + size_cells;
 681         hose->region_count = 0;
 682         debug("%s: len=%d, cells_per_record=%d\n", __func__, len,
 683               cells_per_record);
 684         for (i = 0; i < MAX_PCI_REGIONS; i++, len -= cells_per_record) {
 685                 u64 pci_addr, addr, size;
 686                 int space_code;
 687                 u32 flags;
 688                 int type;
 689
 690                 if (len < cells_per_record)
 691                         break;
 692                 flags = fdt32_to_cpu(prop[0]);
 693                 space_code = (flags >> 24) & 3;
 694                 pci_addr = fdtdec_get_number(prop + 1, 2);
 695                 prop += pci_addr_cells;
 696                 addr = fdtdec_get_number(prop, addr_cells);
 697                 prop += addr_cells;
 698                 size = fdtdec_get_number(prop, size_cells);
 699                 prop += size_cells;
 700                 debug("%s: region %d, pci_addr=%" PRIx64 ", addr=%" PRIx64
 701                       ", size=%" PRIx64 ", space_code=%d\n", __func__,
 702                       hose->region_count, pci_addr, addr, size, space_code);
 703                 if (space_code & 2) {
 704                         type = flags & (1U << 30) ? PCI_REGION_PREFETCH :
 705                                         PCI_REGION_MEM;
 706                 } else if (space_code & 1) {
 707                         type = PCI_REGION_IO;
 708                 } else {
 709                         continue;
 710                 }
 711                 debug(" - type=%d\n", type);
 712                 pci_set_region(hose->regions + hose->region_count++, pci_addr,
 713                                addr, size, type);
 714         }
 715
 716         /* Add a region for our local memory */
 717         addr = gd->ram_size;
 718         if (gd->pci_ram_top && gd->pci_ram_top < addr)
 719                 addr = gd->pci_ram_top;
 720         pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
 721                        PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 722
 723         return 0;
 724 }
 725
 726 static int pci_uclass_pre_probe(struct udevice *bus)
 727 {
 728         struct pci_controller *hose;
 729         int ret;
 730
 731         debug("%s, bus=%d/%s, parent=%s\n", __func__, bus->seq, bus->name,
 732               bus->parent->name);
 733         hose = bus->uclass_priv;
 734
 735         /* For bridges, use the top-level PCI controller */
 736         if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) {
 737                 hose->ctlr = bus;
 738                 ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset,
 739                                 bus->of_offset);
 740                 if (ret) {
 741                         debug("%s: Cannot decode regions\n", __func__);
 742                         return ret;
 743                 }
 744         } else {
 745                 struct pci_controller *parent_hose;
 746
 747                 parent_hose = dev_get_uclass_priv(bus->parent);
 748                 hose->ctlr = parent_hose->bus;
 749         }
 750         hose->bus = bus;
 751         hose->first_busno = bus->seq;
 752         hose->last_busno = bus->seq;
 753
 754         return 0;
 755 }
 756
 757 static int pci_uclass_post_probe(struct udevice *bus)
 758 {
 759         int ret;
 760
 761         debug("%s: probing bus %d\n", __func__, bus->seq);
 762         ret = pci_bind_bus_devices(bus);
 763         if (ret)
 764                 return ret;
 765
 766 #ifdef CONFIG_PCI_PNP
 767         ret = pci_auto_config_devices(bus);
 768         if (ret < 0)
 769                 return ret;
 770 #endif
 771
 772 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 773         /*
 774          * Per Intel FSP specification, we should call FSP notify API to
 775          * inform FSP that PCI enumeration has been done so that FSP will
 776          * do any necessary initialization as required by the chipset's
 777          * BIOS Writer's Guide (BWG).
 778          *
 779          * Unfortunately we have to put this call here as with driver model,
 780          * the enumeration is all done on a lazy basis as needed, so until
 781          * something is touched on PCI it won't happen.
 782          *
 783          * Note we only call this 1) after U-Boot is relocated, and 2)
 784          * root bus has finished probing.
 785          */
 786         if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0)) {
 787                 ret = fsp_init_phase_pci();
 788                 if (ret)
 789                         return ret;
 790         }
 791 #endif
 792
 793         return 0;
 794 }
 795
 796 static int pci_uclass_child_post_bind(struct udevice *dev)
 797 {
 798         struct pci_child_platdata *pplat;
 799         struct fdt_pci_addr addr;
 800         int ret;
 801
 802         if (dev->of_offset == -1)
 803                 return 0;
 804
 805         /*
 806          * We could read vendor, device, class if available. But for now we
 807          * just check the address.
 808          */
 809         pplat = dev_get_parent_platdata(dev);
 810         ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
 811                                   FDT_PCI_SPACE_CONFIG, "reg", &addr);
 812
 813         if (ret) {
 814                 if (ret != -ENOENT)
 815                         return -EINVAL;
 816         } else {
 817                 /* extract the devfn from fdt_pci_addr */
 818                 pplat->devfn = addr.phys_hi & 0xff00;
 819         }
 820
 821         return 0;
 822 }
 823
 824 static int pci_bridge_read_config(struct udevice *bus, pci_dev_t bdf,
 825                                   uint offset, ulong *valuep,
 826                                   enum pci_size_t size)
 827 {
 828         struct pci_controller *hose = bus->uclass_priv;
 829
 830         return pci_bus_read_config(hose->ctlr, bdf, offset, valuep, size);
 831 }
 832
 833 static int pci_bridge_write_config(struct udevice *bus, pci_dev_t bdf,
 834                                    uint offset, ulong value,
 835                                    enum pci_size_t size)
 836 {
 837         struct pci_controller *hose = bus->uclass_priv;
 838
 839         return pci_bus_write_config(hose->ctlr, bdf, offset, value, size);
 840 }
 841
 842 static int skip_to_next_device(struct udevice *bus, struct udevice **devp)
 843 {
 844         struct udevice *dev;
 845         int ret = 0;
 846
 847         /*
 848          * Scan through all the PCI controllers. On x86 there will only be one
 849          * but that is not necessarily true on other hardware.
 850          */
 851         do {
 852                 device_find_first_child(bus, &dev);
 853                 if (dev) {
 854                         *devp = dev;
 855                         return 0;
 856                 }
 857                 ret = uclass_next_device(&bus);
 858                 if (ret)
 859                         return ret;
 860         } while (bus);
 861
 862         return 0;
 863 }
 864
 865 int pci_find_next_device(struct udevice **devp)
 866 {
 867         struct udevice *child = *devp;
 868         struct udevice *bus = child->parent;
 869         int ret;
 870
 871         /* First try all the siblings */
 872         *devp = NULL;
 873         while (child) {
 874                 device_find_next_child(&child);
 875                 if (child) {
 876                         *devp = child;
 877                         return 0;
 878                 }
 879         }
 880
 881         /* We ran out of siblings. Try the next bus */
 882         ret = uclass_next_device(&bus);
 883         if (ret)
 884                 return ret;
 885
 886         return bus ? skip_to_next_device(bus, devp) : 0;
 887 }
 888
 889 int pci_find_first_device(struct udevice **devp)
 890 {
 891         struct udevice *bus;
 892         int ret;
 893
 894         *devp = NULL;
 895         ret = uclass_first_device(UCLASS_PCI, &bus);
 896         if (ret)
 897                 return ret;
 898
 899         return skip_to_next_device(bus, devp);
 900 }
 901
 902 UCLASS_DRIVER(pci) = {
 903         .id             = UCLASS_PCI,
 904         .name           = "pci",
 905         .flags          = DM_UC_FLAG_SEQ_ALIAS,
 906         .post_bind      = pci_uclass_post_bind,
 907         .pre_probe      = pci_uclass_pre_probe,
 908         .post_probe     = pci_uclass_post_probe,
 909         .child_post_bind = pci_uclass_child_post_bind,
 910         .per_device_auto_alloc_size = sizeof(struct pci_controller),
 911         .per_child_platdata_auto_alloc_size =
 912                         sizeof(struct pci_child_platdata),
 913 };
 914
 915 static const struct dm_pci_ops pci_bridge_ops = {
 916         .read_config    = pci_bridge_read_config,
 917         .write_config   = pci_bridge_write_config,
 918 };
 919
 920 static const struct udevice_id pci_bridge_ids[] = {
 921         { .compatible = "pci-bridge" },
 922         { }
 923 };
 924
 925 U_BOOT_DRIVER(pci_bridge_drv) = {
 926         .name           = "pci_bridge_drv",
 927         .id             = UCLASS_PCI,
 928         .of_match       = pci_bridge_ids,
 929         .ops            = &pci_bridge_ops,
 930 };
 931
 932 UCLASS_DRIVER(pci_generic) = {
 933         .id             = UCLASS_PCI_GENERIC,
 934         .name           = "pci_generic",
 935 };
 936
 937 static const struct udevice_id pci_generic_ids[] = {
 938         { .compatible = "pci-generic" },
 939         { }
 940 };
 941
 942 U_BOOT_DRIVER(pci_generic_drv) = {
 943         .name           = "pci_generic_drv",
 944         .id             = UCLASS_PCI_GENERIC,
 945         .of_match       = pci_generic_ids,
 946 };