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LWMON5: POST RTC fix
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1 /*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Keith Outwater, keith_outwater@mvis.com`
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 /*
26 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
27 * DS1337 Real Time Clock (RTC).
28 */
29
30 #include <common.h>
31 #include <command.h>
32 #include <rtc.h>
33 #include <i2c.h>
34
35 #if defined(CONFIG_RTC_DS1337) && defined(CONFIG_CMD_DATE)
36
37 /*---------------------------------------------------------------------*/
38 #undef DEBUG_RTC
39
40 #ifdef DEBUG_RTC
41 #define DEBUGR(fmt,args...) printf(fmt ,##args)
42 #else
43 #define DEBUGR(fmt,args...)
44 #endif
45 /*---------------------------------------------------------------------*/
46
47 /*
48 * RTC register addresses
49 */
50 #define RTC_SEC_REG_ADDR 0x0
51 #define RTC_MIN_REG_ADDR 0x1
52 #define RTC_HR_REG_ADDR 0x2
53 #define RTC_DAY_REG_ADDR 0x3
54 #define RTC_DATE_REG_ADDR 0x4
55 #define RTC_MON_REG_ADDR 0x5
56 #define RTC_YR_REG_ADDR 0x6
57 #define RTC_CTL_REG_ADDR 0x0e
58 #define RTC_STAT_REG_ADDR 0x0f
59
60 /*
61 * RTC control register bits
62 */
63 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
64 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
65 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
66 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
67 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
68 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
69
70 /*
71 * RTC status register bits
72 */
73 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
74 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
75 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
76
77
78 static uchar rtc_read (uchar reg);
79 static void rtc_write (uchar reg, uchar val);
80 static uchar bin2bcd (unsigned int n);
81 static unsigned bcd2bin (uchar c);
82
83
84 /*
85 * Get the current time from the RTC
86 */
87 int rtc_get (struct rtc_time *tmp)
88 {
89 int rel = 0;
90 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
91
92 control = rtc_read (RTC_CTL_REG_ADDR);
93 status = rtc_read (RTC_STAT_REG_ADDR);
94 sec = rtc_read (RTC_SEC_REG_ADDR);
95 min = rtc_read (RTC_MIN_REG_ADDR);
96 hour = rtc_read (RTC_HR_REG_ADDR);
97 wday = rtc_read (RTC_DAY_REG_ADDR);
98 mday = rtc_read (RTC_DATE_REG_ADDR);
99 mon_cent = rtc_read (RTC_MON_REG_ADDR);
100 year = rtc_read (RTC_YR_REG_ADDR);
101
102 DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
103 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
104 year, mon_cent, mday, wday, hour, min, sec, control, status);
105
106 if (status & RTC_STAT_BIT_OSF) {
107 printf ("### Warning: RTC oscillator has stopped\n");
108 /* clear the OSF flag */
109 rtc_write (RTC_STAT_REG_ADDR,
110 rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
111 rel = -1;
112 }
113
114 tmp->tm_sec = bcd2bin (sec & 0x7F);
115 tmp->tm_min = bcd2bin (min & 0x7F);
116 tmp->tm_hour = bcd2bin (hour & 0x3F);
117 tmp->tm_mday = bcd2bin (mday & 0x3F);
118 tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
119 tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
120 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
121 tmp->tm_yday = 0;
122 tmp->tm_isdst= 0;
123
124 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
125 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
126 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
127
128 return rel;
129 }
130
131
132 /*
133 * Set the RTC
134 */
135 void rtc_set (struct rtc_time *tmp)
136 {
137 uchar century;
138
139 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
140 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
141 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
142
143 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
144
145 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
146 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
147
148 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
149 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
150 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
151 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
152 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
153 }
154
155
156 /*
157 * Reset the RTC. We also enable the oscillator output on the
158 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
159 * according to the datasheet, turning on the square wave output
160 * increases the current drain on the backup battery from about
161 * 600 nA to 2uA.
162 */
163 void rtc_reset (void)
164 {
165 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
166 }
167
168
169 /*
170 * Helper functions
171 */
172
173 static
174 uchar rtc_read (uchar reg)
175 {
176 return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
177 }
178
179
180 static void rtc_write (uchar reg, uchar val)
181 {
182 i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
183 }
184
185 static unsigned bcd2bin (uchar n)
186 {
187 return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
188 }
189
190 static unsigned char bin2bcd (unsigned int n)
191 {
192 return (((n / 10) << 4) | (n % 10));
193 }
194
195 #endif