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1 /*
2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 /*
25 * Date & Time support for the MK48T59 RTC
26 */
27
28 #undef RTC_DEBUG
29
30 #include <common.h>
31 #include <command.h>
32 #include <config.h>
33 #include <rtc.h>
34 #include <mk48t59.h>
35
36 #if defined(CONFIG_RTC_MK48T59)
37
38 #if defined(CONFIG_BAB7xx)
39
40 static uchar rtc_read (short reg)
41 {
42 out8(RTC_PORT_ADDR0, reg & 0xFF);
43 out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
44 return in8(RTC_PORT_DATA);
45 }
46
47 static void rtc_write (short reg, uchar val)
48 {
49 out8(RTC_PORT_ADDR0, reg & 0xFF);
50 out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
51 out8(RTC_PORT_DATA, val);
52 }
53
54 #elif defined(CONFIG_PCIPPC2)
55
56 #include "../board/pcippc2/pcippc2.h"
57
58 static uchar rtc_read (short reg)
59 {
60 return in8(RTC(reg));
61 }
62
63 static void rtc_write (short reg, uchar val)
64 {
65 out8(RTC(reg),val);
66 }
67
68 #elif defined(CONFIG_AMIGAONEG3SE)
69
70 #include "../board/MAI/AmigaOneG3SE/via686.h"
71 #include "../board/MAI/AmigaOneG3SE/memio.h"
72
73
74 static uchar rtc_read (short reg)
75 {
76 out_byte(CMOS_ADDR, (uint8)reg);
77 return in_byte(CMOS_DATA);
78 }
79
80 static void rtc_write (short reg, uchar val)
81 {
82 out_byte(CMOS_ADDR, (uint8)reg);
83 out_byte(CMOS_DATA, (uint8)val);
84 }
85
86 #elif defined(CONFIG_EVAL5200)
87
88 static uchar rtc_read (short reg)
89 {
90 return in8(RTC(reg));
91 }
92
93 static void rtc_write (short reg, uchar val)
94 {
95 out8(RTC(reg),val);
96 }
97
98 #else
99 # error Board specific rtc access functions should be supplied
100 #endif
101
102 static unsigned bcd2bin (uchar n)
103 {
104 return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
105 }
106
107 static unsigned char bin2bcd (unsigned int n)
108 {
109 return (((n / 10) << 4) | (n % 10));
110 }
111
112 /* ------------------------------------------------------------------------- */
113
114 void *nvram_read(void *dest, const short src, size_t count)
115 {
116 uchar *d = (uchar *) dest;
117 short s = src;
118
119 while (count--)
120 *d++ = rtc_read(s++);
121
122 return dest;
123 }
124
125 void nvram_write(short dest, const void *src, size_t count)
126 {
127 short d = dest;
128 uchar *s = (uchar *) src;
129
130 while (count--)
131 rtc_write(d++, *s++);
132 }
133
134 #if defined(CONFIG_CMD_DATE)
135
136 /* ------------------------------------------------------------------------- */
137
138 void rtc_get (struct rtc_time *tmp)
139 {
140 uchar save_ctrl_a;
141 uchar sec, min, hour, mday, wday, mon, year;
142
143 /* Simple: freeze the clock, read it and allow updates again */
144 save_ctrl_a = rtc_read(RTC_CONTROLA);
145
146 /* Set the register to read the value. */
147 save_ctrl_a |= RTC_CA_READ;
148 rtc_write(RTC_CONTROLA, save_ctrl_a);
149
150 sec = rtc_read (RTC_SECONDS);
151 min = rtc_read (RTC_MINUTES);
152 hour = rtc_read (RTC_HOURS);
153 mday = rtc_read (RTC_DAY_OF_MONTH);
154 wday = rtc_read (RTC_DAY_OF_WEEK);
155 mon = rtc_read (RTC_MONTH);
156 year = rtc_read (RTC_YEAR);
157
158 /* re-enable update */
159 save_ctrl_a &= ~RTC_CA_READ;
160 rtc_write(RTC_CONTROLA, save_ctrl_a);
161
162 #ifdef RTC_DEBUG
163 printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
164 "hr: %02x min: %02x sec: %02x\n",
165 year, mon, mday, wday,
166 hour, min, sec );
167 #endif
168 tmp->tm_sec = bcd2bin (sec & 0x7F);
169 tmp->tm_min = bcd2bin (min & 0x7F);
170 tmp->tm_hour = bcd2bin (hour & 0x3F);
171 tmp->tm_mday = bcd2bin (mday & 0x3F);
172 tmp->tm_mon = bcd2bin (mon & 0x1F);
173 tmp->tm_year = bcd2bin (year);
174 tmp->tm_wday = bcd2bin (wday & 0x07);
175 if(tmp->tm_year<70)
176 tmp->tm_year+=2000;
177 else
178 tmp->tm_year+=1900;
179 tmp->tm_yday = 0;
180 tmp->tm_isdst= 0;
181 #ifdef RTC_DEBUG
182 printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
183 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
184 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
185 #endif
186 }
187
188 void rtc_set (struct rtc_time *tmp)
189 {
190 uchar save_ctrl_a;
191
192 #ifdef RTC_DEBUG
193 printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
194 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
195 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
196 #endif
197 save_ctrl_a = rtc_read(RTC_CONTROLA);
198
199 save_ctrl_a |= RTC_CA_WRITE;
200 rtc_write(RTC_CONTROLA, save_ctrl_a); /* disables the RTC to update the regs */
201
202 rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100));
203 rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon));
204
205 rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
206 rtc_write (RTC_DAY_OF_MONTH, bin2bcd(tmp->tm_mday));
207 rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour));
208 rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min ));
209 rtc_write (RTC_SECONDS, bin2bcd(tmp->tm_sec ));
210
211 save_ctrl_a &= ~RTC_CA_WRITE;
212 rtc_write(RTC_CONTROLA, save_ctrl_a); /* enables the RTC to update the regs */
213 }
214
215 void rtc_reset (void)
216 {
217 uchar control_b;
218
219 /*
220 * Start oscillator here.
221 */
222 control_b = rtc_read(RTC_CONTROLB);
223
224 control_b &= ~RTC_CB_STOP;
225 rtc_write(RTC_CONTROLB, control_b);
226 }
227
228 void rtc_set_watchdog(short multi, short res)
229 {
230 uchar wd_value;
231
232 wd_value = RTC_WDS | ((multi & 0x1F) << 2) | (res & 0x3);
233 rtc_write(RTC_WATCHDOG, wd_value);
234 }
235
236 #endif
237 #endif /* CONFIG_RTC_MK48T59 */