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ARM: uniphier: change UNIPHIER_SERIAL to default y option
[people/ms/u-boot.git] / drivers / serial / serial_uniphier.c
1 /*
2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #include <linux/io.h>
10 #include <linux/serial_reg.h>
11 #include <linux/sizes.h>
12 #include <asm/errno.h>
13 #include <dm/device.h>
14 #include <serial.h>
15 #include <fdtdec.h>
16
17 /*
18 * Note: Register map is slightly different from that of 16550.
19 */
20 struct uniphier_serial {
21 u32 rx; /* In: Receive buffer */
22 #define tx rx /* Out: Transmit buffer */
23 u32 ier; /* Interrupt Enable Register */
24 u32 iir; /* In: Interrupt ID Register */
25 u32 char_fcr; /* Charactor / FIFO Control Register */
26 u32 lcr_mcr; /* Line/Modem Control Register */
27 #define LCR_SHIFT 8
28 #define LCR_MASK (0xff << (LCR_SHIFT))
29 u32 lsr; /* In: Line Status Register */
30 u32 msr; /* In: Modem Status Register */
31 u32 __rsv0;
32 u32 __rsv1;
33 u32 dlr; /* Divisor Latch Register */
34 };
35
36 struct uniphier_serial_private_data {
37 struct uniphier_serial __iomem *membase;
38 unsigned int uartclk;
39 };
40
41 #define uniphier_serial_port(dev) \
42 ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
43
44 static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
45 {
46 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
47 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
48 const unsigned int mode_x_div = 16;
49 unsigned int divisor;
50
51 divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);
52
53 writel(divisor, &port->dlr);
54
55 return 0;
56 }
57
58 static int uniphier_serial_getc(struct udevice *dev)
59 {
60 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
61
62 if (!(readl(&port->lsr) & UART_LSR_DR))
63 return -EAGAIN;
64
65 return readl(&port->rx);
66 }
67
68 static int uniphier_serial_putc(struct udevice *dev, const char c)
69 {
70 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
71
72 if (!(readl(&port->lsr) & UART_LSR_THRE))
73 return -EAGAIN;
74
75 writel(c, &port->tx);
76
77 return 0;
78 }
79
80 static int uniphier_serial_pending(struct udevice *dev, bool input)
81 {
82 struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
83
84 if (input)
85 return readl(&port->lsr) & UART_LSR_DR;
86 else
87 return !(readl(&port->lsr) & UART_LSR_THRE);
88 }
89
90 static int uniphier_serial_probe(struct udevice *dev)
91 {
92 DECLARE_GLOBAL_DATA_PTR;
93 struct uniphier_serial_private_data *priv = dev_get_priv(dev);
94 struct uniphier_serial __iomem *port;
95 fdt_addr_t base;
96 u32 tmp;
97
98 base = dev_get_addr(dev);
99 if (base == FDT_ADDR_T_NONE)
100 return -EINVAL;
101
102 port = devm_ioremap(dev, base, SZ_64);
103 if (!port)
104 return -ENOMEM;
105
106 priv->membase = port;
107
108 priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
109 "clock-frequency", 0);
110
111 tmp = readl(&port->lcr_mcr);
112 tmp &= ~LCR_MASK;
113 tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
114 writel(tmp, &port->lcr_mcr);
115
116 return 0;
117 }
118
119 static const struct udevice_id uniphier_uart_of_match[] = {
120 { .compatible = "socionext,uniphier-uart" },
121 { /* sentinel */ }
122 };
123
124 static const struct dm_serial_ops uniphier_serial_ops = {
125 .setbrg = uniphier_serial_setbrg,
126 .getc = uniphier_serial_getc,
127 .putc = uniphier_serial_putc,
128 .pending = uniphier_serial_pending,
129 };
130
131 U_BOOT_DRIVER(uniphier_serial) = {
132 .name = "uniphier-uart",
133 .id = UCLASS_SERIAL,
134 .of_match = uniphier_uart_of_match,
135 .probe = uniphier_serial_probe,
136 .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
137 .ops = &uniphier_serial_ops,
138 };