2 * drivers/usb/gadget/dwc2_udc_otg.c
3 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
5 * Copyright (C) 2008 for Samsung Electronics
7 * BSP Support for Samsung's UDC driver
9 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
11 * State machine bugfixes:
12 * Marek Szyprowski <m.szyprowski@samsung.com>
15 * Marek Szyprowski <m.szyprowski@samsung.com>
16 * Lukasz Majewski <l.majewski@samsumg.com>
18 * SPDX-License-Identifier: GPL-2.0+
22 #include <asm/errno.h>
23 #include <linux/list.h>
26 #include <linux/usb/ch9.h>
27 #include <linux/usb/gadget.h>
29 #include <asm/byteorder.h>
30 #include <asm/unaligned.h>
33 #include <asm/mach-types.h>
35 #include "dwc2_udc_otg_regs.h"
36 #include "dwc2_udc_otg_priv.h"
37 #include <usb/lin_gadget_compat.h>
39 /***********************************************************/
41 #define OTG_DMA_MODE 1
46 #define DEBUG_OUT_EP 0
49 #include <usb/s3c_udc.h>
54 static char *state_names
[] = {
57 "DATA_STATE_NEED_ZLP",
58 "WAIT_FOR_OUT_STATUS",
61 "WAIT_FOR_OUT_COMPLETE",
62 "WAIT_FOR_IN_COMPLETE",
63 "WAIT_FOR_NULL_COMPLETE",
66 #define DRIVER_DESC "DWC2 HS USB OTG Device Driver, (c) Samsung Electronics"
67 #define DRIVER_VERSION "15 March 2009"
69 struct dwc2_udc
*the_controller
;
71 static const char driver_name
[] = "dwc2-udc";
72 static const char driver_desc
[] = DRIVER_DESC
;
73 static const char ep0name
[] = "ep0-control";
76 static unsigned int ep0_fifo_size
= 64;
77 static unsigned int ep_fifo_size
= 512;
78 static unsigned int ep_fifo_size2
= 1024;
79 static int reset_available
= 1;
81 static struct usb_ctrlrequest
*usb_ctrl
;
82 static dma_addr_t usb_ctrl_dma_addr
;
87 static int dwc2_ep_enable(struct usb_ep
*ep
,
88 const struct usb_endpoint_descriptor
*);
89 static int dwc2_ep_disable(struct usb_ep
*ep
);
90 static struct usb_request
*dwc2_alloc_request(struct usb_ep
*ep
,
92 static void dwc2_free_request(struct usb_ep
*ep
, struct usb_request
*);
94 static int dwc2_queue(struct usb_ep
*ep
, struct usb_request
*, gfp_t gfp_flags
);
95 static int dwc2_dequeue(struct usb_ep
*ep
, struct usb_request
*);
96 static int dwc2_fifo_status(struct usb_ep
*ep
);
97 static void dwc2_fifo_flush(struct usb_ep
*ep
);
98 static void dwc2_ep0_read(struct dwc2_udc
*dev
);
99 static void dwc2_ep0_kick(struct dwc2_udc
*dev
, struct dwc2_ep
*ep
);
100 static void dwc2_handle_ep0(struct dwc2_udc
*dev
);
101 static int dwc2_ep0_write(struct dwc2_udc
*dev
);
102 static int write_fifo_ep0(struct dwc2_ep
*ep
, struct dwc2_request
*req
);
103 static void done(struct dwc2_ep
*ep
, struct dwc2_request
*req
, int status
);
104 static void stop_activity(struct dwc2_udc
*dev
,
105 struct usb_gadget_driver
*driver
);
106 static int udc_enable(struct dwc2_udc
*dev
);
107 static void udc_set_address(struct dwc2_udc
*dev
, unsigned char address
);
108 static void reconfig_usbd(struct dwc2_udc
*dev
);
109 static void set_max_pktsize(struct dwc2_udc
*dev
, enum usb_device_speed speed
);
110 static void nuke(struct dwc2_ep
*ep
, int status
);
111 static int dwc2_udc_set_halt(struct usb_ep
*_ep
, int value
);
112 static void dwc2_udc_set_nak(struct dwc2_ep
*ep
);
114 void set_udc_gadget_private_data(void *p
)
116 debug_cond(DEBUG_SETUP
!= 0,
117 "%s: the_controller: 0x%p, p: 0x%p\n", __func__
,
119 the_controller
->gadget
.dev
.device_data
= p
;
122 void *get_udc_gadget_private_data(struct usb_gadget
*gadget
)
124 return gadget
->dev
.device_data
;
127 static struct usb_ep_ops dwc2_ep_ops
= {
128 .enable
= dwc2_ep_enable
,
129 .disable
= dwc2_ep_disable
,
131 .alloc_request
= dwc2_alloc_request
,
132 .free_request
= dwc2_free_request
,
135 .dequeue
= dwc2_dequeue
,
137 .set_halt
= dwc2_udc_set_halt
,
138 .fifo_status
= dwc2_fifo_status
,
139 .fifo_flush
= dwc2_fifo_flush
,
142 #define create_proc_files() do {} while (0)
143 #define remove_proc_files() do {} while (0)
145 /***********************************************************/
147 void __iomem
*regs_otg
;
148 struct dwc2_usbotg_reg
*reg
;
150 bool dfu_usb_get_reset(void)
152 return !!(readl(®
->gintsts
) & INT_RESET
);
155 __weak
void otg_phy_init(struct dwc2_udc
*dev
) {}
156 __weak
void otg_phy_off(struct dwc2_udc
*dev
) {}
158 /***********************************************************/
160 #include "dwc2_udc_otg_xfer_dma.c"
163 * udc_disable - disable USB device controller
165 static void udc_disable(struct dwc2_udc
*dev
)
167 debug_cond(DEBUG_SETUP
!= 0, "%s: %p\n", __func__
, dev
);
169 udc_set_address(dev
, 0);
171 dev
->ep0state
= WAIT_FOR_SETUP
;
172 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
173 dev
->usb_address
= 0;
179 * udc_reinit - initialize software state
181 static void udc_reinit(struct dwc2_udc
*dev
)
185 debug_cond(DEBUG_SETUP
!= 0, "%s: %p\n", __func__
, dev
);
187 /* device/ep0 records init */
188 INIT_LIST_HEAD(&dev
->gadget
.ep_list
);
189 INIT_LIST_HEAD(&dev
->gadget
.ep0
->ep_list
);
190 dev
->ep0state
= WAIT_FOR_SETUP
;
192 /* basic endpoint records init */
193 for (i
= 0; i
< DWC2_MAX_ENDPOINTS
; i
++) {
194 struct dwc2_ep
*ep
= &dev
->ep
[i
];
197 list_add_tail(&ep
->ep
.ep_list
, &dev
->gadget
.ep_list
);
201 INIT_LIST_HEAD(&ep
->queue
);
205 /* the rest was statically initialized, and is read-only */
208 #define BYTES2MAXP(x) (x / 8)
209 #define MAXP2BYTES(x) (x * 8)
211 /* until it's enabled, this UDC should be completely invisible
214 static int udc_enable(struct dwc2_udc
*dev
)
216 debug_cond(DEBUG_SETUP
!= 0, "%s: %p\n", __func__
, dev
);
221 debug_cond(DEBUG_SETUP
!= 0,
222 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
223 readl(®
->gintmsk
));
225 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
231 Register entry point for the peripheral controller driver.
233 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
235 struct dwc2_udc
*dev
= the_controller
;
237 unsigned long flags
= 0;
239 debug_cond(DEBUG_SETUP
!= 0, "%s: %s\n", __func__
, "no name");
242 || (driver
->speed
!= USB_SPEED_FULL
243 && driver
->speed
!= USB_SPEED_HIGH
)
244 || !driver
->bind
|| !driver
->disconnect
|| !driver
->setup
)
251 spin_lock_irqsave(&dev
->lock
, flags
);
252 /* first hook up the driver ... */
253 dev
->driver
= driver
;
254 spin_unlock_irqrestore(&dev
->lock
, flags
);
256 if (retval
) { /* TODO */
257 printf("target device_add failed, error %d\n", retval
);
261 retval
= driver
->bind(&dev
->gadget
);
263 debug_cond(DEBUG_SETUP
!= 0,
264 "%s: bind to driver --> error %d\n",
265 dev
->gadget
.name
, retval
);
272 debug_cond(DEBUG_SETUP
!= 0,
273 "Registered gadget driver %s\n", dev
->gadget
.name
);
280 * Unregister entry point for the peripheral controller driver.
282 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
284 struct dwc2_udc
*dev
= the_controller
;
285 unsigned long flags
= 0;
289 if (!driver
|| driver
!= dev
->driver
)
292 spin_lock_irqsave(&dev
->lock
, flags
);
294 stop_activity(dev
, driver
);
295 spin_unlock_irqrestore(&dev
->lock
, flags
);
297 driver
->unbind(&dev
->gadget
);
299 disable_irq(IRQ_OTG
);
306 * done - retire a request; caller blocked irqs
308 static void done(struct dwc2_ep
*ep
, struct dwc2_request
*req
, int status
)
310 unsigned int stopped
= ep
->stopped
;
312 debug("%s: %s %p, req = %p, stopped = %d\n",
313 __func__
, ep
->ep
.name
, ep
, &req
->req
, stopped
);
315 list_del_init(&req
->queue
);
317 if (likely(req
->req
.status
== -EINPROGRESS
))
318 req
->req
.status
= status
;
320 status
= req
->req
.status
;
322 if (status
&& status
!= -ESHUTDOWN
) {
323 debug("complete %s req %p stat %d len %u/%u\n",
324 ep
->ep
.name
, &req
->req
, status
,
325 req
->req
.actual
, req
->req
.length
);
328 /* don't modify queue heads during completion callback */
332 printf("calling complete callback\n");
334 int i
, len
= req
->req
.length
;
336 printf("pkt[%d] = ", req
->req
.length
);
339 for (i
= 0; i
< len
; i
++) {
340 printf("%02x", ((u8
*)req
->req
.buf
)[i
]);
347 spin_unlock(&ep
->dev
->lock
);
348 req
->req
.complete(&ep
->ep
, &req
->req
);
349 spin_lock(&ep
->dev
->lock
);
351 debug("callback completed\n");
353 ep
->stopped
= stopped
;
357 * nuke - dequeue ALL requests
359 static void nuke(struct dwc2_ep
*ep
, int status
)
361 struct dwc2_request
*req
;
363 debug("%s: %s %p\n", __func__
, ep
->ep
.name
, ep
);
365 /* called with irqs blocked */
366 while (!list_empty(&ep
->queue
)) {
367 req
= list_entry(ep
->queue
.next
, struct dwc2_request
, queue
);
368 done(ep
, req
, status
);
372 static void stop_activity(struct dwc2_udc
*dev
,
373 struct usb_gadget_driver
*driver
)
377 /* don't disconnect drivers more than once */
378 if (dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)
380 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
382 /* prevent new request submissions, kill any outstanding requests */
383 for (i
= 0; i
< DWC2_MAX_ENDPOINTS
; i
++) {
384 struct dwc2_ep
*ep
= &dev
->ep
[i
];
386 nuke(ep
, -ESHUTDOWN
);
389 /* report disconnect; the driver is already quiesced */
391 spin_unlock(&dev
->lock
);
392 driver
->disconnect(&dev
->gadget
);
393 spin_lock(&dev
->lock
);
396 /* re-init driver-visible data structures */
400 static void reconfig_usbd(struct dwc2_udc
*dev
)
402 /* 2. Soft-reset OTG Core and then unreset again. */
404 unsigned int uTemp
= writel(CORE_SOFT_RESET
, ®
->grstctl
);
405 uint32_t dflt_gusbcfg
;
407 debug("Reseting OTG controller\n");
410 0<<15 /* PHY Low Power Clock sel*/
411 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
412 |0x5<<10 /* Turnaround time*/
413 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
414 /* 1:SRP enable] H1= 1,1*/
415 |0<<7 /* Ulpi DDR sel*/
416 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
417 |0<<4 /* 0: utmi+, 1:ulpi*/
418 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
419 |0x7<<0; /* HS/FS Timeout**/
421 if (dev
->pdata
->usb_gusbcfg
)
422 dflt_gusbcfg
= dev
->pdata
->usb_gusbcfg
;
424 writel(dflt_gusbcfg
, ®
->gusbcfg
);
426 /* 3. Put the OTG device core in the disconnected state.*/
427 uTemp
= readl(®
->dctl
);
428 uTemp
|= SOFT_DISCONNECT
;
429 writel(uTemp
, ®
->dctl
);
433 /* 4. Make the OTG device core exit from the disconnected state.*/
434 uTemp
= readl(®
->dctl
);
435 uTemp
= uTemp
& ~SOFT_DISCONNECT
;
436 writel(uTemp
, ®
->dctl
);
438 /* 5. Configure OTG Core to initial settings of device mode.*/
439 /* [][1: full speed(30Mhz) 0:high speed]*/
440 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20
, ®
->dcfg
);
444 /* 6. Unmask the core interrupts*/
445 writel(GINTMSK_INIT
, ®
->gintmsk
);
447 /* 7. Set NAK bit of EP0, EP1, EP2*/
448 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->out_endp
[EP0_CON
].doepctl
);
449 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->in_endp
[EP0_CON
].diepctl
);
451 for (i
= 1; i
< DWC2_MAX_ENDPOINTS
; i
++) {
452 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->out_endp
[i
].doepctl
);
453 writel(DEPCTL_EPDIS
|DEPCTL_SNAK
, ®
->in_endp
[i
].diepctl
);
456 /* 8. Unmask EPO interrupts*/
457 writel(((1 << EP0_CON
) << DAINT_OUT_BIT
)
458 | (1 << EP0_CON
), ®
->daintmsk
);
460 /* 9. Unmask device OUT EP common interrupts*/
461 writel(DOEPMSK_INIT
, ®
->doepmsk
);
463 /* 10. Unmask device IN EP common interrupts*/
464 writel(DIEPMSK_INIT
, ®
->diepmsk
);
466 /* 11. Set Rx FIFO Size (in 32-bit words) */
467 writel(RX_FIFO_SIZE
>> 2, ®
->grxfsiz
);
469 /* 12. Set Non Periodic Tx FIFO Size */
470 writel((NPTX_FIFO_SIZE
>> 2) << 16 | ((RX_FIFO_SIZE
>> 2)) << 0,
473 for (i
= 1; i
< DWC2_MAX_HW_ENDPOINTS
; i
++)
474 writel((PTX_FIFO_SIZE
>> 2) << 16 |
475 ((RX_FIFO_SIZE
+ NPTX_FIFO_SIZE
+
476 PTX_FIFO_SIZE
*(i
-1)) >> 2) << 0,
479 /* Flush the RX FIFO */
480 writel(RX_FIFO_FLUSH
, ®
->grstctl
);
481 while (readl(®
->grstctl
) & RX_FIFO_FLUSH
)
482 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__
);
484 /* Flush all the Tx FIFO's */
485 writel(TX_FIFO_FLUSH_ALL
, ®
->grstctl
);
486 writel(TX_FIFO_FLUSH_ALL
| TX_FIFO_FLUSH
, ®
->grstctl
);
487 while (readl(®
->grstctl
) & TX_FIFO_FLUSH
)
488 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__
);
490 /* 13. Clear NAK bit of EP0, EP1, EP2*/
492 /* EP0: Control OUT */
493 writel(DEPCTL_EPDIS
| DEPCTL_CNAK
,
494 ®
->out_endp
[EP0_CON
].doepctl
);
496 /* 14. Initialize OTG Link Core.*/
497 writel(GAHBCFG_INIT
, ®
->gahbcfg
);
500 static void set_max_pktsize(struct dwc2_udc
*dev
, enum usb_device_speed speed
)
502 unsigned int ep_ctrl
;
505 if (speed
== USB_SPEED_HIGH
) {
508 ep_fifo_size2
= 1024;
509 dev
->gadget
.speed
= USB_SPEED_HIGH
;
514 dev
->gadget
.speed
= USB_SPEED_FULL
;
517 dev
->ep
[0].ep
.maxpacket
= ep0_fifo_size
;
518 for (i
= 1; i
< DWC2_MAX_ENDPOINTS
; i
++)
519 dev
->ep
[i
].ep
.maxpacket
= ep_fifo_size
;
521 /* EP0 - Control IN (64 bytes)*/
522 ep_ctrl
= readl(®
->in_endp
[EP0_CON
].diepctl
);
523 writel(ep_ctrl
|(0<<0), ®
->in_endp
[EP0_CON
].diepctl
);
525 /* EP0 - Control OUT (64 bytes)*/
526 ep_ctrl
= readl(®
->out_endp
[EP0_CON
].doepctl
);
527 writel(ep_ctrl
|(0<<0), ®
->out_endp
[EP0_CON
].doepctl
);
530 static int dwc2_ep_enable(struct usb_ep
*_ep
,
531 const struct usb_endpoint_descriptor
*desc
)
534 struct dwc2_udc
*dev
;
535 unsigned long flags
= 0;
537 debug("%s: %p\n", __func__
, _ep
);
539 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
540 if (!_ep
|| !desc
|| ep
->desc
|| _ep
->name
== ep0name
541 || desc
->bDescriptorType
!= USB_DT_ENDPOINT
542 || ep
->bEndpointAddress
!= desc
->bEndpointAddress
543 || ep_maxpacket(ep
) <
544 le16_to_cpu(get_unaligned(&desc
->wMaxPacketSize
))) {
546 debug("%s: bad ep or descriptor\n", __func__
);
550 /* xfer types must match, except that interrupt ~= bulk */
551 if (ep
->bmAttributes
!= desc
->bmAttributes
552 && ep
->bmAttributes
!= USB_ENDPOINT_XFER_BULK
553 && desc
->bmAttributes
!= USB_ENDPOINT_XFER_INT
) {
555 debug("%s: %s type mismatch\n", __func__
, _ep
->name
);
559 /* hardware _could_ do smaller, but driver doesn't */
560 if ((desc
->bmAttributes
== USB_ENDPOINT_XFER_BULK
561 && le16_to_cpu(get_unaligned(&desc
->wMaxPacketSize
)) !=
562 ep_maxpacket(ep
)) || !get_unaligned(&desc
->wMaxPacketSize
)) {
564 debug("%s: bad %s maxpacket\n", __func__
, _ep
->name
);
569 if (!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
571 debug("%s: bogus device state\n", __func__
);
578 ep
->ep
.maxpacket
= le16_to_cpu(get_unaligned(&desc
->wMaxPacketSize
));
580 /* Reset halt state */
581 dwc2_udc_set_nak(ep
);
582 dwc2_udc_set_halt(_ep
, 0);
584 spin_lock_irqsave(&ep
->dev
->lock
, flags
);
585 dwc2_udc_ep_activate(ep
);
586 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
588 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
589 __func__
, _ep
->name
, ep
->stopped
, ep
->ep
.maxpacket
);
596 static int dwc2_ep_disable(struct usb_ep
*_ep
)
599 unsigned long flags
= 0;
601 debug("%s: %p\n", __func__
, _ep
);
603 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
604 if (!_ep
|| !ep
->desc
) {
605 debug("%s: %s not enabled\n", __func__
,
606 _ep
? ep
->ep
.name
: NULL
);
610 spin_lock_irqsave(&ep
->dev
->lock
, flags
);
612 /* Nuke all pending requests */
613 nuke(ep
, -ESHUTDOWN
);
618 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
620 debug("%s: disabled %s\n", __func__
, _ep
->name
);
624 static struct usb_request
*dwc2_alloc_request(struct usb_ep
*ep
,
627 struct dwc2_request
*req
;
629 debug("%s: %s %p\n", __func__
, ep
->name
, ep
);
631 req
= memalign(CONFIG_SYS_CACHELINE_SIZE
, sizeof(*req
));
635 memset(req
, 0, sizeof *req
);
636 INIT_LIST_HEAD(&req
->queue
);
641 static void dwc2_free_request(struct usb_ep
*ep
, struct usb_request
*_req
)
643 struct dwc2_request
*req
;
645 debug("%s: %p\n", __func__
, ep
);
647 req
= container_of(_req
, struct dwc2_request
, req
);
648 WARN_ON(!list_empty(&req
->queue
));
652 /* dequeue JUST ONE request */
653 static int dwc2_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
656 struct dwc2_request
*req
;
657 unsigned long flags
= 0;
659 debug("%s: %p\n", __func__
, _ep
);
661 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
662 if (!_ep
|| ep
->ep
.name
== ep0name
)
665 spin_lock_irqsave(&ep
->dev
->lock
, flags
);
667 /* make sure it's actually queued on this endpoint */
668 list_for_each_entry(req
, &ep
->queue
, queue
) {
669 if (&req
->req
== _req
)
672 if (&req
->req
!= _req
) {
673 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
677 done(ep
, req
, -ECONNRESET
);
679 spin_unlock_irqrestore(&ep
->dev
->lock
, flags
);
684 * Return bytes in EP FIFO
686 static int dwc2_fifo_status(struct usb_ep
*_ep
)
691 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
693 debug("%s: bad ep\n", __func__
);
697 debug("%s: %d\n", __func__
, ep_index(ep
));
699 /* LPD can't report unclaimed bytes from IN fifos */
709 static void dwc2_fifo_flush(struct usb_ep
*_ep
)
713 ep
= container_of(_ep
, struct dwc2_ep
, ep
);
714 if (unlikely(!_ep
|| (!ep
->desc
&& ep
->ep
.name
!= ep0name
))) {
715 debug("%s: bad ep\n", __func__
);
719 debug("%s: %d\n", __func__
, ep_index(ep
));
722 static const struct usb_gadget_ops dwc2_udc_ops
= {
723 /* current versions must always be self-powered */
726 static struct dwc2_udc memory
= {
729 .ops
= &dwc2_udc_ops
,
730 .ep0
= &memory
.ep
[0].ep
,
734 /* control endpoint */
739 .maxpacket
= EP0_FIFO_SIZE
,
743 .bEndpointAddress
= 0,
746 .ep_type
= ep_control
,
749 /* first group of endpoints */
752 .name
= "ep1in-bulk",
754 .maxpacket
= EP_FIFO_SIZE
,
758 .bEndpointAddress
= USB_DIR_IN
| 1,
759 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
761 .ep_type
= ep_bulk_out
,
767 .name
= "ep2out-bulk",
769 .maxpacket
= EP_FIFO_SIZE
,
773 .bEndpointAddress
= USB_DIR_OUT
| 2,
774 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
776 .ep_type
= ep_bulk_in
,
784 .maxpacket
= EP_FIFO_SIZE
,
788 .bEndpointAddress
= USB_DIR_IN
| 3,
789 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
791 .ep_type
= ep_interrupt
,
797 * probe - binds to the platform device
800 int dwc2_udc_probe(struct dwc2_plat_otg_data
*pdata
)
802 struct dwc2_udc
*dev
= &memory
;
805 debug("%s: %p\n", __func__
, pdata
);
809 reg
= (struct dwc2_usbotg_reg
*)pdata
->regs_otg
;
811 /* regs_otg = (void *)pdata->regs_otg; */
813 dev
->gadget
.is_dualspeed
= 1; /* Hack only*/
814 dev
->gadget
.is_otg
= 0;
815 dev
->gadget
.is_a_peripheral
= 0;
816 dev
->gadget
.b_hnp_enable
= 0;
817 dev
->gadget
.a_hnp_support
= 0;
818 dev
->gadget
.a_alt_hnp_support
= 0;
820 the_controller
= dev
;
822 usb_ctrl
= memalign(CONFIG_SYS_CACHELINE_SIZE
,
823 ROUND(sizeof(struct usb_ctrlrequest
),
824 CONFIG_SYS_CACHELINE_SIZE
));
826 error("No memory available for UDC!\n");
830 usb_ctrl_dma_addr
= (dma_addr_t
) usb_ctrl
;
837 int usb_gadget_handle_interrupts(int index
)
839 u32 intr_status
= readl(®
->gintsts
);
840 u32 gintmsk
= readl(®
->gintmsk
);
842 if (intr_status
& gintmsk
)
843 return dwc2_udc_irq(1, (void *)the_controller
);