2 * Mentor USB OTG Core host controller driver.
4 * Copyright (c) 2008 Texas Instruments
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
27 /* MSC control transfers */
28 #define USB_MSC_BBB_RESET 0xFF
29 #define USB_MSC_BBB_GET_MAX_LUN 0xFE
31 /* Endpoint configuration information */
32 static struct musb_epinfo epinfo
[3] = {
33 {MUSB_BULK_EP
, 1, 512}, /* EP1 - Bluk Out - 512 Bytes */
34 {MUSB_BULK_EP
, 0, 512}, /* EP1 - Bluk In - 512 Bytes */
35 {MUSB_INTR_EP
, 0, 64} /* EP2 - Interrupt IN - 64 Bytes */
38 /* --- Virtual Root Hub ---------------------------------------------------- */
39 #ifdef MUSB_NO_MULTIPOINT
41 static u32 port_status
;
43 /* Device descriptor */
44 static u8 root_hub_dev_des
[] = {
45 0x12, /* __u8 bLength; */
46 0x01, /* __u8 bDescriptorType; Device */
47 0x00, /* __u16 bcdUSB; v1.1 */
49 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
50 0x00, /* __u8 bDeviceSubClass; */
51 0x00, /* __u8 bDeviceProtocol; */
52 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
53 0x00, /* __u16 idVendor; */
55 0x00, /* __u16 idProduct; */
57 0x00, /* __u16 bcdDevice; */
59 0x00, /* __u8 iManufacturer; */
60 0x01, /* __u8 iProduct; */
61 0x00, /* __u8 iSerialNumber; */
62 0x01 /* __u8 bNumConfigurations; */
65 /* Configuration descriptor */
66 static u8 root_hub_config_des
[] = {
67 0x09, /* __u8 bLength; */
68 0x02, /* __u8 bDescriptorType; Configuration */
69 0x19, /* __u16 wTotalLength; */
71 0x01, /* __u8 bNumInterfaces; */
72 0x01, /* __u8 bConfigurationValue; */
73 0x00, /* __u8 iConfiguration; */
74 0x40, /* __u8 bmAttributes;
75 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
76 0x00, /* __u8 MaxPower; */
79 0x09, /* __u8 if_bLength; */
80 0x04, /* __u8 if_bDescriptorType; Interface */
81 0x00, /* __u8 if_bInterfaceNumber; */
82 0x00, /* __u8 if_bAlternateSetting; */
83 0x01, /* __u8 if_bNumEndpoints; */
84 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
85 0x00, /* __u8 if_bInterfaceSubClass; */
86 0x00, /* __u8 if_bInterfaceProtocol; */
87 0x00, /* __u8 if_iInterface; */
90 0x07, /* __u8 ep_bLength; */
91 0x05, /* __u8 ep_bDescriptorType; Endpoint */
92 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
93 0x03, /* __u8 ep_bmAttributes; Interrupt */
94 0x00, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
96 0xff /* __u8 ep_bInterval; 255 ms */
99 static unsigned char root_hub_str_index0
[] = {
100 0x04, /* __u8 bLength; */
101 0x03, /* __u8 bDescriptorType; String-descriptor */
102 0x09, /* __u8 lang ID */
103 0x04, /* __u8 lang ID */
106 static unsigned char root_hub_str_index1
[] = {
107 0x1c, /* __u8 bLength; */
108 0x03, /* __u8 bDescriptorType; String-descriptor */
109 'M', /* __u8 Unicode */
110 0, /* __u8 Unicode */
111 'U', /* __u8 Unicode */
112 0, /* __u8 Unicode */
113 'S', /* __u8 Unicode */
114 0, /* __u8 Unicode */
115 'B', /* __u8 Unicode */
116 0, /* __u8 Unicode */
117 ' ', /* __u8 Unicode */
118 0, /* __u8 Unicode */
119 'R', /* __u8 Unicode */
120 0, /* __u8 Unicode */
121 'o', /* __u8 Unicode */
122 0, /* __u8 Unicode */
123 'o', /* __u8 Unicode */
124 0, /* __u8 Unicode */
125 't', /* __u8 Unicode */
126 0, /* __u8 Unicode */
127 ' ', /* __u8 Unicode */
128 0, /* __u8 Unicode */
129 'H', /* __u8 Unicode */
130 0, /* __u8 Unicode */
131 'u', /* __u8 Unicode */
132 0, /* __u8 Unicode */
133 'b', /* __u8 Unicode */
134 0, /* __u8 Unicode */
139 * This function writes the data toggle value.
141 static void write_toggle(struct usb_device
*dev
, u8 ep
, u8 dir_out
)
143 u16 toggle
= usb_gettoggle(dev
, ep
, dir_out
);
148 writew(MUSB_TXCSR_CLRDATATOG
, &musbr
->txcsr
);
150 csr
= readw(&musbr
->txcsr
);
151 csr
|= MUSB_TXCSR_H_WR_DATATOGGLE
;
152 writew(csr
, &musbr
->txcsr
);
153 csr
|= (toggle
<< MUSB_TXCSR_H_DATATOGGLE_SHIFT
);
154 writew(csr
, &musbr
->txcsr
);
158 writew(MUSB_RXCSR_CLRDATATOG
, &musbr
->rxcsr
);
160 csr
= readw(&musbr
->rxcsr
);
161 csr
|= MUSB_RXCSR_H_WR_DATATOGGLE
;
162 writew(csr
, &musbr
->rxcsr
);
163 csr
|= (toggle
<< MUSB_S_RXCSR_H_DATATOGGLE
);
164 writew(csr
, &musbr
->rxcsr
);
170 * This function checks if RxStall has occured on the endpoint. If a RxStall
171 * has occured, the RxStall is cleared and 1 is returned. If RxStall has
172 * not occured, 0 is returned.
174 static u8
check_stall(u8 ep
, u8 dir_out
)
180 csr
= readw(&musbr
->txcsr
);
181 if (csr
& MUSB_CSR0_H_RXSTALL
) {
182 csr
&= ~MUSB_CSR0_H_RXSTALL
;
183 writew(csr
, &musbr
->txcsr
);
186 } else { /* For non-ep0 */
187 if (dir_out
) { /* is it tx ep */
188 csr
= readw(&musbr
->txcsr
);
189 if (csr
& MUSB_TXCSR_H_RXSTALL
) {
190 csr
&= ~MUSB_TXCSR_H_RXSTALL
;
191 writew(csr
, &musbr
->txcsr
);
194 } else { /* is it rx ep */
195 csr
= readw(&musbr
->rxcsr
);
196 if (csr
& MUSB_RXCSR_H_RXSTALL
) {
197 csr
&= ~MUSB_RXCSR_H_RXSTALL
;
198 writew(csr
, &musbr
->rxcsr
);
207 * waits until ep0 is ready. Returns 0 if ep is ready, -1 for timeout
208 * error and -2 for stall.
210 static int wait_until_ep0_ready(struct usb_device
*dev
, u32 bit_mask
)
214 int timeout
= CONFIG_MUSB_TIMEOUT
;
217 csr
= readw(&musbr
->txcsr
);
218 if (csr
& MUSB_CSR0_H_ERROR
) {
219 csr
&= ~MUSB_CSR0_H_ERROR
;
220 writew(csr
, &musbr
->txcsr
);
221 dev
->status
= USB_ST_CRC_ERR
;
227 case MUSB_CSR0_TXPKTRDY
:
228 if (!(csr
& MUSB_CSR0_TXPKTRDY
)) {
229 if (check_stall(MUSB_CONTROL_EP
, 0)) {
230 dev
->status
= USB_ST_STALLED
;
237 case MUSB_CSR0_RXPKTRDY
:
238 if (check_stall(MUSB_CONTROL_EP
, 0)) {
239 dev
->status
= USB_ST_STALLED
;
242 if (csr
& MUSB_CSR0_RXPKTRDY
)
246 case MUSB_CSR0_H_REQPKT
:
247 if (!(csr
& MUSB_CSR0_H_REQPKT
)) {
248 if (check_stall(MUSB_CONTROL_EP
, 0)) {
249 dev
->status
= USB_ST_STALLED
;
257 /* Check the timeout */
261 dev
->status
= USB_ST_CRC_ERR
;
271 * waits until tx ep is ready. Returns 1 when ep is ready and 0 on error.
273 static u8
wait_until_txep_ready(struct usb_device
*dev
, u8 ep
)
276 int timeout
= CONFIG_MUSB_TIMEOUT
;
279 if (check_stall(ep
, 1)) {
280 dev
->status
= USB_ST_STALLED
;
284 csr
= readw(&musbr
->txcsr
);
285 if (csr
& MUSB_TXCSR_H_ERROR
) {
286 dev
->status
= USB_ST_CRC_ERR
;
290 /* Check the timeout */
294 dev
->status
= USB_ST_CRC_ERR
;
298 } while (csr
& MUSB_TXCSR_TXPKTRDY
);
303 * waits until rx ep is ready. Returns 1 when ep is ready and 0 on error.
305 static u8
wait_until_rxep_ready(struct usb_device
*dev
, u8 ep
)
308 int timeout
= CONFIG_MUSB_TIMEOUT
;
311 if (check_stall(ep
, 0)) {
312 dev
->status
= USB_ST_STALLED
;
316 csr
= readw(&musbr
->rxcsr
);
317 if (csr
& MUSB_RXCSR_H_ERROR
) {
318 dev
->status
= USB_ST_CRC_ERR
;
322 /* Check the timeout */
326 dev
->status
= USB_ST_CRC_ERR
;
330 } while (!(csr
& MUSB_RXCSR_RXPKTRDY
));
335 * This function performs the setup phase of the control transfer
337 static int ctrlreq_setup_phase(struct usb_device
*dev
, struct devrequest
*setup
)
342 /* write the control request to ep0 fifo */
343 write_fifo(MUSB_CONTROL_EP
, sizeof(struct devrequest
), (void *)setup
);
345 /* enable transfer of setup packet */
346 csr
= readw(&musbr
->txcsr
);
347 csr
|= (MUSB_CSR0_TXPKTRDY
|MUSB_CSR0_H_SETUPPKT
);
348 writew(csr
, &musbr
->txcsr
);
350 /* wait until the setup packet is transmitted */
351 result
= wait_until_ep0_ready(dev
, MUSB_CSR0_TXPKTRDY
);
357 * This function handles the control transfer in data phase
359 static int ctrlreq_in_data_phase(struct usb_device
*dev
, u32 len
, void *buffer
)
364 u8 maxpktsize
= (1 << dev
->maxpacketsize
) * 8;
365 u8
*rxbuff
= (u8
*)buffer
;
369 while (rxlen
< len
) {
370 /* Determine the next read length */
371 nextlen
= ((len
-rxlen
) > maxpktsize
) ? maxpktsize
: (len
-rxlen
);
373 /* Set the ReqPkt bit */
374 csr
= readw(&musbr
->txcsr
);
375 writew(csr
| MUSB_CSR0_H_REQPKT
, &musbr
->txcsr
);
376 result
= wait_until_ep0_ready(dev
, MUSB_CSR0_RXPKTRDY
);
380 /* Actual number of bytes received by usb */
381 rxedlength
= readb(&musbr
->rxcount
);
383 /* Read the data from the RxFIFO */
384 read_fifo(MUSB_CONTROL_EP
, rxedlength
, &rxbuff
[rxlen
]);
386 /* Clear the RxPktRdy Bit */
387 csr
= readw(&musbr
->txcsr
);
388 csr
&= ~MUSB_CSR0_RXPKTRDY
;
389 writew(csr
, &musbr
->txcsr
);
392 if (rxedlength
!= nextlen
) {
393 dev
->act_len
+= rxedlength
;
397 dev
->act_len
= rxlen
;
403 * This function handles the control transfer out data phase
405 static int ctrlreq_out_data_phase(struct usb_device
*dev
, u32 len
, void *buffer
)
410 u8 maxpktsize
= (1 << dev
->maxpacketsize
) * 8;
411 u8
*txbuff
= (u8
*)buffer
;
414 while (txlen
< len
) {
415 /* Determine the next write length */
416 nextlen
= ((len
-txlen
) > maxpktsize
) ? maxpktsize
: (len
-txlen
);
418 /* Load the data to send in FIFO */
419 write_fifo(MUSB_CONTROL_EP
, txlen
, &txbuff
[txlen
]);
421 /* Set TXPKTRDY bit */
422 csr
= readw(&musbr
->txcsr
);
423 writew(csr
| MUSB_CSR0_H_DIS_PING
| MUSB_CSR0_TXPKTRDY
,
425 result
= wait_until_ep0_ready(dev
, MUSB_CSR0_TXPKTRDY
);
430 dev
->act_len
= txlen
;
436 * This function handles the control transfer out status phase
438 static int ctrlreq_out_status_phase(struct usb_device
*dev
)
443 /* Set the StatusPkt bit */
444 csr
= readw(&musbr
->txcsr
);
445 csr
|= (MUSB_CSR0_H_DIS_PING
| MUSB_CSR0_TXPKTRDY
|
446 MUSB_CSR0_H_STATUSPKT
);
447 writew(csr
, &musbr
->txcsr
);
449 /* Wait until TXPKTRDY bit is cleared */
450 result
= wait_until_ep0_ready(dev
, MUSB_CSR0_TXPKTRDY
);
455 * This function handles the control transfer in status phase
457 static int ctrlreq_in_status_phase(struct usb_device
*dev
)
462 /* Set the StatusPkt bit and ReqPkt bit */
463 csr
= MUSB_CSR0_H_DIS_PING
| MUSB_CSR0_H_REQPKT
| MUSB_CSR0_H_STATUSPKT
;
464 writew(csr
, &musbr
->txcsr
);
465 result
= wait_until_ep0_ready(dev
, MUSB_CSR0_H_REQPKT
);
467 /* clear StatusPkt bit and RxPktRdy bit */
468 csr
= readw(&musbr
->txcsr
);
469 csr
&= ~(MUSB_CSR0_RXPKTRDY
| MUSB_CSR0_H_STATUSPKT
);
470 writew(csr
, &musbr
->txcsr
);
475 * determines the speed of the device (High/Full/Slow)
477 static u8
get_dev_speed(struct usb_device
*dev
)
479 return (dev
->speed
& USB_SPEED_HIGH
) ? MUSB_TYPE_SPEED_HIGH
:
480 ((dev
->speed
& USB_SPEED_LOW
) ? MUSB_TYPE_SPEED_LOW
:
481 MUSB_TYPE_SPEED_FULL
);
485 * configure the hub address and the port address.
487 static void config_hub_port(struct usb_device
*dev
, u8 ep
)
492 /* Find out the nearest parent which is high speed */
493 while (dev
->parent
->parent
!= NULL
)
494 if (get_dev_speed(dev
->parent
) != MUSB_TYPE_SPEED_HIGH
)
499 /* determine the port address at that hub */
500 hub
= dev
->parent
->devnum
;
501 for (chid
= 0; chid
< USB_MAXCHILDREN
; chid
++)
502 if (dev
->parent
->children
[chid
] == dev
)
505 #ifndef MUSB_NO_MULTIPOINT
506 /* configure the hub address and the port address */
507 writeb(hub
, &musbr
->tar
[ep
].txhubaddr
);
508 writeb((chid
+ 1), &musbr
->tar
[ep
].txhubport
);
509 writeb(hub
, &musbr
->tar
[ep
].rxhubaddr
);
510 writeb((chid
+ 1), &musbr
->tar
[ep
].rxhubport
);
514 #ifdef MUSB_NO_MULTIPOINT
516 static void musb_port_reset(int do_reset
)
518 u8 power
= readb(&musbr
->power
);
522 writeb(power
| MUSB_POWER_RESET
, &musbr
->power
);
523 port_status
|= USB_PORT_STAT_RESET
;
524 port_status
&= ~USB_PORT_STAT_ENABLE
;
527 writeb(power
& ~MUSB_POWER_RESET
, &musbr
->power
);
529 power
= readb(&musbr
->power
);
530 if (power
& MUSB_POWER_HSMODE
)
531 port_status
|= USB_PORT_STAT_HIGH_SPEED
;
533 port_status
&= ~(USB_PORT_STAT_RESET
| (USB_PORT_STAT_C_CONNECTION
<< 16));
534 port_status
|= USB_PORT_STAT_ENABLE
535 | (USB_PORT_STAT_C_RESET
<< 16)
536 | (USB_PORT_STAT_C_ENABLE
<< 16);
543 static int musb_submit_rh_msg(struct usb_device
*dev
, unsigned long pipe
,
544 void *buffer
, int transfer_len
,
545 struct devrequest
*cmd
)
547 int leni
= transfer_len
;
551 u8
*data_buf
= (u8
*) datab
;
558 if ((pipe
& PIPE_INTERRUPT
) == PIPE_INTERRUPT
) {
559 debug("Root-Hub submit IRQ: NOT implemented\n");
563 bmRType_bReq
= cmd
->requesttype
| (cmd
->request
<< 8);
564 wValue
= swap_16(cmd
->value
);
565 wIndex
= swap_16(cmd
->index
);
566 wLength
= swap_16(cmd
->length
);
568 debug("--- HUB ----------------------------------------\n");
569 debug("submit rh urb, req=%x val=%#x index=%#x len=%d\n",
570 bmRType_bReq
, wValue
, wIndex
, wLength
);
571 debug("------------------------------------------------\n");
573 switch (bmRType_bReq
) {
575 debug("RH_GET_STATUS\n");
577 *(__u16
*) data_buf
= swap_16(1);
581 case RH_GET_STATUS
| RH_INTERFACE
:
582 debug("RH_GET_STATUS | RH_INTERFACE\n");
584 *(__u16
*) data_buf
= swap_16(0);
588 case RH_GET_STATUS
| RH_ENDPOINT
:
589 debug("RH_GET_STATUS | RH_ENDPOINT\n");
591 *(__u16
*) data_buf
= swap_16(0);
595 case RH_GET_STATUS
| RH_CLASS
:
596 debug("RH_GET_STATUS | RH_CLASS\n");
598 *(__u32
*) data_buf
= swap_32(0);
602 case RH_GET_STATUS
| RH_OTHER
| RH_CLASS
:
603 debug("RH_GET_STATUS | RH_OTHER | RH_CLASS\n");
605 int_usb
= readw(&musbr
->intrusb
);
606 if (int_usb
& MUSB_INTR_CONNECT
) {
607 port_status
|= USB_PORT_STAT_CONNECTION
608 | (USB_PORT_STAT_C_CONNECTION
<< 16);
609 port_status
|= USB_PORT_STAT_HIGH_SPEED
610 | USB_PORT_STAT_ENABLE
;
613 if (port_status
& USB_PORT_STAT_RESET
)
616 *(__u32
*) data_buf
= swap_32(port_status
);
620 case RH_CLEAR_FEATURE
| RH_ENDPOINT
:
621 debug("RH_CLEAR_FEATURE | RH_ENDPOINT\n");
624 case RH_ENDPOINT_STALL
:
625 debug("C_HUB_ENDPOINT_STALL\n");
629 port_status
&= ~(1 << wValue
);
632 case RH_CLEAR_FEATURE
| RH_CLASS
:
633 debug("RH_CLEAR_FEATURE | RH_CLASS\n");
636 case RH_C_HUB_LOCAL_POWER
:
637 debug("C_HUB_LOCAL_POWER\n");
641 case RH_C_HUB_OVER_CURRENT
:
642 debug("C_HUB_OVER_CURRENT\n");
646 port_status
&= ~(1 << wValue
);
649 case RH_CLEAR_FEATURE
| RH_OTHER
| RH_CLASS
:
650 debug("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n");
657 case RH_PORT_SUSPEND
:
665 case RH_C_PORT_CONNECTION
:
669 case RH_C_PORT_ENABLE
:
673 case RH_C_PORT_SUSPEND
:
677 case RH_C_PORT_OVER_CURRENT
:
681 case RH_C_PORT_RESET
:
686 debug("invalid wValue\n");
687 stat
= USB_ST_STALLED
;
690 port_status
&= ~(1 << wValue
);
693 case RH_SET_FEATURE
| RH_OTHER
| RH_CLASS
:
694 debug("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n");
697 case RH_PORT_SUSPEND
:
715 debug("invalid wValue\n");
716 stat
= USB_ST_STALLED
;
719 port_status
|= 1 << wValue
;
723 debug("RH_SET_ADDRESS\n");
729 case RH_GET_DESCRIPTOR
:
730 debug("RH_GET_DESCRIPTOR: %x, %d\n", wValue
, wLength
);
733 case (USB_DT_DEVICE
<< 8): /* device descriptor */
734 len
= min_t(unsigned int,
735 leni
, min_t(unsigned int,
736 sizeof(root_hub_dev_des
),
738 data_buf
= root_hub_dev_des
;
741 case (USB_DT_CONFIG
<< 8): /* configuration descriptor */
742 len
= min_t(unsigned int,
743 leni
, min_t(unsigned int,
744 sizeof(root_hub_config_des
),
746 data_buf
= root_hub_config_des
;
749 case ((USB_DT_STRING
<< 8) | 0x00): /* string 0 descriptors */
750 len
= min_t(unsigned int,
751 leni
, min_t(unsigned int,
752 sizeof(root_hub_str_index0
),
754 data_buf
= root_hub_str_index0
;
757 case ((USB_DT_STRING
<< 8) | 0x01): /* string 1 descriptors */
758 len
= min_t(unsigned int,
759 leni
, min_t(unsigned int,
760 sizeof(root_hub_str_index1
),
762 data_buf
= root_hub_str_index1
;
766 debug("invalid wValue\n");
767 stat
= USB_ST_STALLED
;
772 case RH_GET_DESCRIPTOR
| RH_CLASS
:
773 debug("RH_GET_DESCRIPTOR | RH_CLASS\n");
775 data_buf
[0] = 0x09; /* min length; */
777 data_buf
[2] = 0x1; /* 1 port */
778 data_buf
[3] = 0x01; /* per-port power switching */
779 data_buf
[3] |= 0x10; /* no overcurrent reporting */
781 /* Corresponds to data_buf[4-7] */
788 len
= min_t(unsigned int, leni
,
789 min_t(unsigned int, data_buf
[0], wLength
));
792 case RH_GET_CONFIGURATION
:
793 debug("RH_GET_CONFIGURATION\n");
795 *(__u8
*) data_buf
= 0x01;
799 case RH_SET_CONFIGURATION
:
800 debug("RH_SET_CONFIGURATION\n");
806 debug("*** *** *** unsupported root hub command *** *** ***\n");
807 stat
= USB_ST_STALLED
;
810 len
= min_t(int, len
, leni
);
811 if (buffer
!= data_buf
)
812 memcpy(buffer
, data_buf
, len
);
816 debug("dev act_len %d, status %d\n", dev
->act_len
, dev
->status
);
821 static void musb_rh_init(void)
829 static void musb_rh_init(void) {}
834 * do a control transfer
836 int submit_control_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
837 int len
, struct devrequest
*setup
)
839 int devnum
= usb_pipedevice(pipe
);
843 #ifdef MUSB_NO_MULTIPOINT
844 /* Control message is for the HUB? */
845 if (devnum
== rh_devnum
)
846 return musb_submit_rh_msg(dev
, pipe
, buffer
, len
, setup
);
849 /* select control endpoint */
850 writeb(MUSB_CONTROL_EP
, &musbr
->index
);
851 csr
= readw(&musbr
->txcsr
);
853 #ifndef MUSB_NO_MULTIPOINT
854 /* target addr and (for multipoint) hub addr/port */
855 writeb(devnum
, &musbr
->tar
[MUSB_CONTROL_EP
].txfuncaddr
);
856 writeb(devnum
, &musbr
->tar
[MUSB_CONTROL_EP
].rxfuncaddr
);
859 /* configure the hub address and the port number as required */
860 devspeed
= get_dev_speed(dev
);
861 if ((musb_ishighspeed()) && (dev
->parent
!= NULL
) &&
862 (devspeed
!= MUSB_TYPE_SPEED_HIGH
)) {
863 config_hub_port(dev
, MUSB_CONTROL_EP
);
864 writeb(devspeed
<< 6, &musbr
->txtype
);
866 writeb(musb_cfg
.musb_speed
<< 6, &musbr
->txtype
);
867 #ifndef MUSB_NO_MULTIPOINT
868 writeb(0, &musbr
->tar
[MUSB_CONTROL_EP
].txhubaddr
);
869 writeb(0, &musbr
->tar
[MUSB_CONTROL_EP
].txhubport
);
870 writeb(0, &musbr
->tar
[MUSB_CONTROL_EP
].rxhubaddr
);
871 writeb(0, &musbr
->tar
[MUSB_CONTROL_EP
].rxhubport
);
875 /* Control transfer setup phase */
876 if (ctrlreq_setup_phase(dev
, setup
) < 0)
879 switch (setup
->request
) {
880 case USB_REQ_GET_DESCRIPTOR
:
881 case USB_REQ_GET_CONFIGURATION
:
882 case USB_REQ_GET_INTERFACE
:
883 case USB_REQ_GET_STATUS
:
884 case USB_MSC_BBB_GET_MAX_LUN
:
885 /* control transfer in-data-phase */
886 if (ctrlreq_in_data_phase(dev
, len
, buffer
) < 0)
888 /* control transfer out-status-phase */
889 if (ctrlreq_out_status_phase(dev
) < 0)
893 case USB_REQ_SET_ADDRESS
:
894 case USB_REQ_SET_CONFIGURATION
:
895 case USB_REQ_SET_FEATURE
:
896 case USB_REQ_SET_INTERFACE
:
897 case USB_REQ_CLEAR_FEATURE
:
898 case USB_MSC_BBB_RESET
:
899 /* control transfer in status phase */
900 if (ctrlreq_in_status_phase(dev
) < 0)
904 case USB_REQ_SET_DESCRIPTOR
:
905 /* control transfer out data phase */
906 if (ctrlreq_out_data_phase(dev
, len
, buffer
) < 0)
908 /* control transfer in status phase */
909 if (ctrlreq_in_status_phase(dev
) < 0)
914 /* unhandled control transfer */
921 #ifdef MUSB_NO_MULTIPOINT
922 /* Set device address to USB_FADDR register */
923 if (setup
->request
== USB_REQ_SET_ADDRESS
)
924 writeb(dev
->devnum
, &musbr
->faddr
);
933 int submit_bulk_msg(struct usb_device
*dev
, unsigned long pipe
,
934 void *buffer
, int len
)
936 int dir_out
= usb_pipeout(pipe
);
937 int ep
= usb_pipeendpoint(pipe
);
938 #ifndef MUSB_NO_MULTIPOINT
939 int devnum
= usb_pipedevice(pipe
);
947 /* select bulk endpoint */
948 writeb(MUSB_BULK_EP
, &musbr
->index
);
950 #ifndef MUSB_NO_MULTIPOINT
951 /* write the address of the device */
953 writeb(devnum
, &musbr
->tar
[MUSB_BULK_EP
].txfuncaddr
);
955 writeb(devnum
, &musbr
->tar
[MUSB_BULK_EP
].rxfuncaddr
);
958 /* configure the hub address and the port number as required */
959 devspeed
= get_dev_speed(dev
);
960 if ((musb_ishighspeed()) && (dev
->parent
!= NULL
) &&
961 (devspeed
!= MUSB_TYPE_SPEED_HIGH
)) {
963 * MUSB is in high speed and the destination device is full
964 * speed device. So configure the hub address and port
967 config_hub_port(dev
, MUSB_BULK_EP
);
969 #ifndef MUSB_NO_MULTIPOINT
971 writeb(0, &musbr
->tar
[MUSB_BULK_EP
].txhubaddr
);
972 writeb(0, &musbr
->tar
[MUSB_BULK_EP
].txhubport
);
974 writeb(0, &musbr
->tar
[MUSB_BULK_EP
].rxhubaddr
);
975 writeb(0, &musbr
->tar
[MUSB_BULK_EP
].rxhubport
);
978 devspeed
= musb_cfg
.musb_speed
;
981 /* Write the saved toggle bit value */
982 write_toggle(dev
, ep
, dir_out
);
984 if (dir_out
) { /* bulk-out transfer */
985 /* Program the TxType register */
986 type
= (devspeed
<< MUSB_TYPE_SPEED_SHIFT
) |
987 (MUSB_TYPE_PROTO_BULK
<< MUSB_TYPE_PROTO_SHIFT
) |
988 (ep
& MUSB_TYPE_REMOTE_END
);
989 writeb(type
, &musbr
->txtype
);
991 /* Write maximum packet size to the TxMaxp register */
992 writew(dev
->epmaxpacketout
[ep
], &musbr
->txmaxp
);
993 while (txlen
< len
) {
994 nextlen
= ((len
-txlen
) < dev
->epmaxpacketout
[ep
]) ?
995 (len
-txlen
) : dev
->epmaxpacketout
[ep
];
997 #ifdef CONFIG_USB_BLACKFIN
998 /* Set the transfer data size */
999 writew(nextlen
, &musbr
->txcount
);
1002 /* Write the data to the FIFO */
1003 write_fifo(MUSB_BULK_EP
, nextlen
,
1004 (void *)(((u8
*)buffer
) + txlen
));
1006 /* Set the TxPktRdy bit */
1007 csr
= readw(&musbr
->txcsr
);
1008 writew(csr
| MUSB_TXCSR_TXPKTRDY
, &musbr
->txcsr
);
1010 /* Wait until the TxPktRdy bit is cleared */
1011 if (!wait_until_txep_ready(dev
, MUSB_BULK_EP
)) {
1012 readw(&musbr
->txcsr
);
1013 usb_settoggle(dev
, ep
, dir_out
,
1014 (csr
>> MUSB_TXCSR_H_DATATOGGLE_SHIFT
) & 1);
1015 dev
->act_len
= txlen
;
1021 /* Keep a copy of the data toggle bit */
1022 csr
= readw(&musbr
->txcsr
);
1023 usb_settoggle(dev
, ep
, dir_out
,
1024 (csr
>> MUSB_TXCSR_H_DATATOGGLE_SHIFT
) & 1);
1025 } else { /* bulk-in transfer */
1026 /* Write the saved toggle bit value */
1027 write_toggle(dev
, ep
, dir_out
);
1029 /* Program the RxType register */
1030 type
= (devspeed
<< MUSB_TYPE_SPEED_SHIFT
) |
1031 (MUSB_TYPE_PROTO_BULK
<< MUSB_TYPE_PROTO_SHIFT
) |
1032 (ep
& MUSB_TYPE_REMOTE_END
);
1033 writeb(type
, &musbr
->rxtype
);
1035 /* Write the maximum packet size to the RxMaxp register */
1036 writew(dev
->epmaxpacketin
[ep
], &musbr
->rxmaxp
);
1037 while (txlen
< len
) {
1038 nextlen
= ((len
-txlen
) < dev
->epmaxpacketin
[ep
]) ?
1039 (len
-txlen
) : dev
->epmaxpacketin
[ep
];
1041 /* Set the ReqPkt bit */
1042 csr
= readw(&musbr
->rxcsr
);
1043 writew(csr
| MUSB_RXCSR_H_REQPKT
, &musbr
->rxcsr
);
1045 /* Wait until the RxPktRdy bit is set */
1046 if (!wait_until_rxep_ready(dev
, MUSB_BULK_EP
)) {
1047 csr
= readw(&musbr
->rxcsr
);
1048 usb_settoggle(dev
, ep
, dir_out
,
1049 (csr
>> MUSB_S_RXCSR_H_DATATOGGLE
) & 1);
1050 csr
&= ~MUSB_RXCSR_RXPKTRDY
;
1051 writew(csr
, &musbr
->rxcsr
);
1052 dev
->act_len
= txlen
;
1056 /* Read the data from the FIFO */
1057 read_fifo(MUSB_BULK_EP
, nextlen
,
1058 (void *)(((u8
*)buffer
) + txlen
));
1060 /* Clear the RxPktRdy bit */
1061 csr
= readw(&musbr
->rxcsr
);
1062 csr
&= ~MUSB_RXCSR_RXPKTRDY
;
1063 writew(csr
, &musbr
->rxcsr
);
1067 /* Keep a copy of the data toggle bit */
1068 csr
= readw(&musbr
->rxcsr
);
1069 usb_settoggle(dev
, ep
, dir_out
,
1070 (csr
>> MUSB_S_RXCSR_H_DATATOGGLE
) & 1);
1073 /* bulk transfer is complete */
1080 * This function initializes the usb controller module.
1082 int usb_lowlevel_init(void)
1089 if (musb_platform_init() == -1)
1092 /* Configure all the endpoint FIFO's and start usb controller */
1093 musbr
= musb_cfg
.regs
;
1094 musb_configure_ep(&epinfo
[0],
1095 sizeof(epinfo
) / sizeof(struct musb_epinfo
));
1099 * Wait until musb is enabled in host mode with a timeout. There
1100 * should be a usb device connected.
1102 timeout
= musb_cfg
.timeout
;
1104 if (readb(&musbr
->devctl
) & MUSB_DEVCTL_HM
)
1107 /* if musb core is not in host mode, then return */
1111 /* start usb bus reset */
1112 power
= readb(&musbr
->power
);
1113 writeb(power
| MUSB_POWER_RESET
, &musbr
->power
);
1115 /* After initiating a usb reset, wait for about 20ms to 30ms */
1118 /* stop usb bus reset */
1119 power
= readb(&musbr
->power
);
1120 power
&= ~MUSB_POWER_RESET
;
1121 writeb(power
, &musbr
->power
);
1123 /* Determine if the connected device is a high/full/low speed device */
1124 musb_cfg
.musb_speed
= (readb(&musbr
->power
) & MUSB_POWER_HSMODE
) ?
1125 MUSB_TYPE_SPEED_HIGH
:
1126 ((readb(&musbr
->devctl
) & MUSB_DEVCTL_FSDEV
) ?
1127 MUSB_TYPE_SPEED_FULL
: MUSB_TYPE_SPEED_LOW
);
1132 * This function stops the operation of the davinci usb module.
1134 int usb_lowlevel_stop(void)
1136 /* Reset the USB module */
1137 musb_platform_deinit();
1138 writeb(0, &musbr
->devctl
);
1143 * This function supports usb interrupt transfers. Currently, usb interrupt
1144 * transfers are not supported.
1146 int submit_int_msg(struct usb_device
*dev
, unsigned long pipe
,
1147 void *buffer
, int len
, int interval
)
1149 int dir_out
= usb_pipeout(pipe
);
1150 int ep
= usb_pipeendpoint(pipe
);
1151 #ifndef MUSB_NO_MULTIPOINT
1152 int devnum
= usb_pipedevice(pipe
);
1160 /* select interrupt endpoint */
1161 writeb(MUSB_INTR_EP
, &musbr
->index
);
1163 #ifndef MUSB_NO_MULTIPOINT
1164 /* write the address of the device */
1166 writeb(devnum
, &musbr
->tar
[MUSB_INTR_EP
].txfuncaddr
);
1168 writeb(devnum
, &musbr
->tar
[MUSB_INTR_EP
].rxfuncaddr
);
1171 /* configure the hub address and the port number as required */
1172 devspeed
= get_dev_speed(dev
);
1173 if ((musb_ishighspeed()) && (dev
->parent
!= NULL
) &&
1174 (devspeed
!= MUSB_TYPE_SPEED_HIGH
)) {
1176 * MUSB is in high speed and the destination device is full
1177 * speed device. So configure the hub address and port
1178 * address registers.
1180 config_hub_port(dev
, MUSB_INTR_EP
);
1182 #ifndef MUSB_NO_MULTIPOINT
1184 writeb(0, &musbr
->tar
[MUSB_INTR_EP
].txhubaddr
);
1185 writeb(0, &musbr
->tar
[MUSB_INTR_EP
].txhubport
);
1187 writeb(0, &musbr
->tar
[MUSB_INTR_EP
].rxhubaddr
);
1188 writeb(0, &musbr
->tar
[MUSB_INTR_EP
].rxhubport
);
1191 devspeed
= musb_cfg
.musb_speed
;
1194 /* Write the saved toggle bit value */
1195 write_toggle(dev
, ep
, dir_out
);
1197 if (!dir_out
) { /* intrrupt-in transfer */
1198 /* Write the saved toggle bit value */
1199 write_toggle(dev
, ep
, dir_out
);
1200 writeb(interval
, &musbr
->rxinterval
);
1202 /* Program the RxType register */
1203 type
= (devspeed
<< MUSB_TYPE_SPEED_SHIFT
) |
1204 (MUSB_TYPE_PROTO_INTR
<< MUSB_TYPE_PROTO_SHIFT
) |
1205 (ep
& MUSB_TYPE_REMOTE_END
);
1206 writeb(type
, &musbr
->rxtype
);
1208 /* Write the maximum packet size to the RxMaxp register */
1209 writew(dev
->epmaxpacketin
[ep
], &musbr
->rxmaxp
);
1211 while (txlen
< len
) {
1212 nextlen
= ((len
-txlen
) < dev
->epmaxpacketin
[ep
]) ?
1213 (len
-txlen
) : dev
->epmaxpacketin
[ep
];
1215 /* Set the ReqPkt bit */
1216 csr
= readw(&musbr
->rxcsr
);
1217 writew(csr
| MUSB_RXCSR_H_REQPKT
, &musbr
->rxcsr
);
1219 /* Wait until the RxPktRdy bit is set */
1220 if (!wait_until_rxep_ready(dev
, MUSB_INTR_EP
)) {
1221 csr
= readw(&musbr
->rxcsr
);
1222 usb_settoggle(dev
, ep
, dir_out
,
1223 (csr
>> MUSB_S_RXCSR_H_DATATOGGLE
) & 1);
1224 csr
&= ~MUSB_RXCSR_RXPKTRDY
;
1225 writew(csr
, &musbr
->rxcsr
);
1226 dev
->act_len
= txlen
;
1230 /* Read the data from the FIFO */
1231 read_fifo(MUSB_INTR_EP
, nextlen
,
1232 (void *)(((u8
*)buffer
) + txlen
));
1234 /* Clear the RxPktRdy bit */
1235 csr
= readw(&musbr
->rxcsr
);
1236 csr
&= ~MUSB_RXCSR_RXPKTRDY
;
1237 writew(csr
, &musbr
->rxcsr
);
1241 /* Keep a copy of the data toggle bit */
1242 csr
= readw(&musbr
->rxcsr
);
1243 usb_settoggle(dev
, ep
, dir_out
,
1244 (csr
>> MUSB_S_RXCSR_H_DATATOGGLE
) & 1);
1247 /* interrupt transfer is complete */
1248 dev
->irq_status
= 0;
1249 dev
->irq_act_len
= len
;
1250 dev
->irq_handle(dev
);
1257 #ifdef CONFIG_SYS_USB_EVENT_POLL
1259 * This function polls for USB keyboard data.
1261 void usb_event_poll()
1263 struct stdio_dev
*dev
;
1264 struct usb_device
*usb_kbd_dev
;
1265 struct usb_interface
*iface
;
1266 struct usb_endpoint_descriptor
*ep
;
1270 /* Get the pointer to USB Keyboard device pointer */
1271 dev
= stdio_get_by_name("usbkbd");
1272 usb_kbd_dev
= (struct usb_device
*)dev
->priv
;
1273 iface
= &usb_kbd_dev
->config
.if_desc
[0];
1274 ep
= &iface
->ep_desc
[0];
1275 pipe
= usb_rcvintpipe(usb_kbd_dev
, ep
->bEndpointAddress
);
1277 /* Submit a interrupt transfer request */
1278 maxp
= usb_maxpacket(usb_kbd_dev
, pipe
);
1279 usb_submit_int_msg(usb_kbd_dev
, pipe
, &new[0],
1280 maxp
> 8 ? 8 : maxp
, ep
->bInterval
);
1282 #endif /* CONFIG_SYS_USB_EVENT_POLL */