examples/timer.c

   1 /*
   2  * (C) Copyright 2000
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <commproc.h>
  26 #include <mpc8xx_irq.h>
  27 #include <syscall.h>
  28
  29 #undef  DEBUG
  30
  31 #define TIMER_PERIOD    1000000         /* 1 second clock */
  32
  33 static void timer_handler (void *arg);
  34
  35
  36 /* Access functions for the Machine State Register */
  37 static __inline__ unsigned long get_msr(void)
  38 {
  39     unsigned long msr;
  40
  41     asm volatile("mfmsr %0" : "=r" (msr) :);
  42     return msr;
  43 }
  44
  45 static __inline__ void set_msr(unsigned long msr)
  46 {
  47     asm volatile("mtmsr %0" : : "r" (msr));
  48 }
  49
  50 /*
  51  * Definitions to access the CPM Timer registers
  52  * See 8xx_immap.h for Internal Memory Map layout,
  53  * and commproc.h for CPM Interrupt vectors (aka "IRQ"s)
  54  */
  55
  56 typedef struct tid_8xx_cpmtimer_s {
  57   int            cpm_vec;       /* CPM Interrupt Vector for this timer  */
  58   ushort        *tgcrp;         /* Pointer to Timer Global Config Reg.  */
  59   ushort        *tmrp;          /* Pointer to Timer Mode Register       */
  60   ushort        *trrp;          /* Pointer to Timer Reference Register  */
  61   ushort        *tcrp;          /* Pointer to Timer Capture Register    */
  62   ushort        *tcnp;          /* Pointer to Timer Counter Register    */
  63   ushort        *terp;          /* Pointer to Timer Event Register      */
  64 } tid_8xx_cpmtimer_t;
  65
  66 #ifndef CLOCKRATE
  67 #  define CLOCKRATE 64
  68 #endif
  69
  70 #define CPMT_CLOCK_DIV          16
  71 #define CPMT_MAX_PRESCALER      256
  72 #define CPMT_MAX_REFERENCE      65535   /* max. unsigned short */
  73
  74 #define CPMT_MAX_TICKS          (CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER)
  75 #define CPMT_MAX_TICKS_WITH_DIV (CPMT_MAX_REFERENCE * CPMT_MAX_PRESCALER * CPMT_CLOCK_DIV)
  76 #define CPMT_MAX_INTERVAL       (CPMT_MAX_TICKS_WITH_DIV / CLOCKRATE)
  77
  78 /* For now: always use max. prescaler value */
  79 #define CPMT_PRESCALER          (CPMT_MAX_PRESCALER)
  80
  81 /* CPM Timer Event Register Bits */
  82 #define CPMT_EVENT_CAP          0x0001  /* Capture Event                */
  83 #define CPMT_EVENT_REF          0x0002  /* Reference Counter Event      */
  84
  85 /* CPM Timer Global Config Register */
  86 #define CPMT_GCR_RST            0x0001  /* Reset  Timer                 */
  87 #define CPMT_GCR_STP            0x0002  /* Stop   Timer                 */
  88 #define CPMT_GCR_FRZ            0x0004  /* Freeze Timer                 */
  89 #define CPMT_GCR_GM_CAS         0x0008  /* Gate Mode / Cascade Timers   */
  90 #define CPMT_GCR_MASK           (CPMT_GCR_RST|CPMT_GCR_STP|CPMT_GCR_FRZ|CPMT_GCR_GM_CAS)
  91
  92 /* CPM Timer Mode register */
  93 #define CPMT_MR_GE              0x0001  /* Gate Enable                  */
  94 #define CPMT_MR_ICLK_CASC       0x0000  /* Clock internally cascaded    */
  95 #define CPMT_MR_ICLK_CLK        0x0002  /* Clock = system clock         */
  96 #define CPMT_MR_ICLK_CLKDIV     0x0004  /* Clock = system clock / 16    */
  97 #define CPMT_MR_ICLK_TIN        0x0006  /* Clock = TINx signal          */
  98 #define CPMT_MR_FRR             0x0008  /* Free Run / Restart           */
  99 #define CPMT_MR_ORI             0x0010  /* Out. Reference Interrupt En. */
 100 #define CPMT_MR_OM              0x0020  /* Output Mode                  */
 101 #define CPMT_MR_CE_DIS          0x0000  /* Capture/Interrupt disabled   */
 102 #define CPMT_MR_CE_RISE         0x0040  /* Capt./Interr. on rising  TIN */
 103 #define CPMT_MR_CE_FALL         0x0080  /* Capt./Interr. on falling TIN */
 104 #define CPMT_MR_CE_ANY          0x00C0  /* Capt./Interr. on any TIN edge*/
 105
 106
 107 /*
 108  * which CPM timer to use - index starts at 0 (= timer 1)
 109  */
 110 #define TID_TIMER_ID    0       /* use CPM timer 1              */
 111
 112 void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval);
 113
 114 static char *usage = "\n[q, b, e, ?] ";
 115
 116 int timer (int argc, char *argv[])
 117 {
 118         DECLARE_GLOBAL_DATA_PTR;
 119
 120         cpmtimer8xx_t *cpmtimerp;       /* Pointer to the CPM Timer structure   */
 121         tid_8xx_cpmtimer_t hw;
 122         tid_8xx_cpmtimer_t *hwp = &hw;
 123         int c;
 124         int running;
 125
 126         /* Pointer to CPM Timer structure */
 127         cpmtimerp = &((immap_t *) gd->bd->bi_immr_base)->im_cpmtimer;
 128
 129         mon_printf ("TIMERS=0x%x\n", (unsigned) cpmtimerp);
 130
 131         /* Initialize pointers depending on which timer we use */
 132         switch (TID_TIMER_ID) {
 133         case 0:
 134                 hwp->tmrp = &(cpmtimerp->cpmt_tmr1);
 135                 hwp->trrp = &(cpmtimerp->cpmt_trr1);
 136                 hwp->tcrp = &(cpmtimerp->cpmt_tcr1);
 137                 hwp->tcnp = &(cpmtimerp->cpmt_tcn1);
 138                 hwp->terp = &(cpmtimerp->cpmt_ter1);
 139                 hwp->cpm_vec = CPMVEC_TIMER1;
 140                 break;
 141         case 1:
 142                 hwp->tmrp = &(cpmtimerp->cpmt_tmr2);
 143                 hwp->trrp = &(cpmtimerp->cpmt_trr2);
 144                 hwp->tcrp = &(cpmtimerp->cpmt_tcr2);
 145                 hwp->tcnp = &(cpmtimerp->cpmt_tcn2);
 146                 hwp->terp = &(cpmtimerp->cpmt_ter2);
 147                 hwp->cpm_vec = CPMVEC_TIMER2;
 148                 break;
 149         case 2:
 150                 hwp->tmrp = &(cpmtimerp->cpmt_tmr3);
 151                 hwp->trrp = &(cpmtimerp->cpmt_trr3);
 152                 hwp->tcrp = &(cpmtimerp->cpmt_tcr3);
 153                 hwp->tcnp = &(cpmtimerp->cpmt_tcn3);
 154                 hwp->terp = &(cpmtimerp->cpmt_ter3);
 155                 hwp->cpm_vec = CPMVEC_TIMER3;
 156                 break;
 157         case 3:
 158                 hwp->tmrp = &(cpmtimerp->cpmt_tmr4);
 159                 hwp->trrp = &(cpmtimerp->cpmt_trr4);
 160                 hwp->tcrp = &(cpmtimerp->cpmt_tcr4);
 161                 hwp->tcnp = &(cpmtimerp->cpmt_tcn4);
 162                 hwp->terp = &(cpmtimerp->cpmt_ter4);
 163                 hwp->cpm_vec = CPMVEC_TIMER4;
 164                 break;
 165         }
 166
 167         hwp->tgcrp = &cpmtimerp->cpmt_tgcr;
 168
 169         mon_printf ("Using timer %d\n"
 170                         "tgcr @ 0x%x, tmr @ 0x%x, trr @ 0x%x,"
 171                         " tcr @ 0x%x, tcn @ 0x%x, ter @ 0x%x\n",
 172                         TID_TIMER_ID + 1,
 173                         (unsigned) hwp->tgcrp,
 174                         (unsigned) hwp->tmrp,
 175                         (unsigned) hwp->trrp,
 176                         (unsigned) hwp->tcrp,
 177                         (unsigned) hwp->tcnp,
 178                         (unsigned) hwp->terp
 179                         );
 180
 181         /* reset timer    */
 182         *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
 183
 184         /* clear all events */
 185         *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
 186
 187         mon_printf (usage);
 188         running = 0;
 189         while ((c = mon_getc()) != 'q') {
 190             if (c == 'b') {
 191
 192                 setPeriod (hwp, TIMER_PERIOD);  /* Set period and start ticking */
 193
 194                 /* Install interrupt handler (enable timer in CIMR) */
 195                 mon_install_hdlr (hwp->cpm_vec, timer_handler, hwp);
 196
 197                 mon_printf ("Enabling timer\n");
 198
 199                 /* enable timer */
 200                 *hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID);
 201                 running = 1;
 202
 203 #ifdef  DEBUG
 204                 mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 205                         " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 206                                 *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 207                                 *hwp->tcrp,  *hwp->tcnp, *hwp->terp
 208                                 );
 209 #endif
 210             } else if (c == 'e') {
 211
 212                 mon_printf ("Stopping timer\n");
 213
 214                 *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
 215                 running = 0;
 216
 217 #ifdef  DEBUG
 218                 mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 219                         " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 220                                 *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 221                                 *hwp->tcrp,  *hwp->tcnp, *hwp->terp
 222                         );
 223 #endif
 224                 /* Uninstall interrupt handler */
 225                 mon_free_hdlr (hwp->cpm_vec);
 226
 227             } else if (c == '?') {
 228 #ifdef  DEBUG
 229                 cpic8xx_t *cpm_icp = &((immap_t *) gd->bd->bi_immr_base)->im_cpic;
 230                 sysconf8xx_t *siup = &((immap_t *) gd->bd->bi_immr_base)->im_siu_conf;
 231 #endif
 232
 233                 mon_printf ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x,"
 234                         " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 235                                 *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 236                                 *hwp->tcrp,  *hwp->tcnp, *hwp->terp
 237                         );
 238 #ifdef  DEBUG
 239                 mon_printf ("SIUMCR=0x%08lx, SYPCR=0x%08lx,"
 240                         " SIMASK=0x%08lx, SIPEND=0x%08lx\n",
 241                                 siup->sc_siumcr,
 242                                 siup->sc_sypcr,
 243                                 siup->sc_simask,
 244                                 siup->sc_sipend
 245                         );
 246
 247                 mon_printf ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n",
 248                         cpm_icp->cpic_cimr,
 249                         cpm_icp->cpic_cicr,
 250                         cpm_icp->cpic_cipr
 251                         );
 252 #endif
 253             } else {
 254                 mon_printf ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n");
 255             }
 256             mon_printf (usage);
 257         }
 258         if (running) {
 259                 mon_printf ("Stopping timer\n");
 260                 *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
 261                 mon_free_hdlr (hwp->cpm_vec);
 262         }
 263
 264         return (0);
 265 }
 266
 267
 268 /* Set period in microseconds and start.
 269  * Truncate to maximum period if more than this is requested - but warn about it.
 270  */
 271
 272 void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval)
 273 {
 274         unsigned short prescaler;
 275         unsigned long ticks;
 276
 277         mon_printf ("Set interval %ld us\n", interval);
 278
 279         /* Warn if requesting longer period than possible */
 280         if (interval > CPMT_MAX_INTERVAL) {
 281                 mon_printf ("Truncate interval %ld to maximum (%d)\n",
 282                                 interval, CPMT_MAX_INTERVAL);
 283                 interval = CPMT_MAX_INTERVAL;
 284         }
 285         /*
 286          * Check if we want to use clock divider:
 287          * Since the reference counter can be incremented only in integer steps,
 288          * we try to keep it as big as possible to allow the resulting period to be
 289          * as precise as possible.
 290          */
 291         /* prescaler, enable interrupt, restart after ref count is reached */
 292         prescaler = (ushort) ((CPMT_PRESCALER - 1) << 8) |
 293                         CPMT_MR_ORI |
 294                         CPMT_MR_FRR;
 295
 296         ticks = ((ulong) CLOCKRATE * interval);
 297
 298         if (ticks > CPMT_MAX_TICKS) {
 299                 ticks /= CPMT_CLOCK_DIV;
 300                 prescaler |= CPMT_MR_ICLK_CLKDIV;       /* use system clock divided by 16 */
 301         } else {
 302                 prescaler |= CPMT_MR_ICLK_CLK;  /* use system clock without divider */
 303         }
 304
 305 #ifdef  DEBUG
 306         mon_printf ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n",
 307                         (ticks > CPMT_MAX_TICKS) ? CPMT_CLOCK_DIV : 1,
 308                         CPMT_PRESCALER,
 309                         (ticks / CPMT_PRESCALER),
 310                         ticks
 311                         );
 312 #endif
 313
 314         /* set prescaler register */
 315         *hwp->tmrp = prescaler;
 316
 317         /* clear timer counter */
 318         *hwp->tcnp = 0;
 319
 320         /* set reference register */
 321         *hwp->trrp = (unsigned short) (ticks / CPMT_PRESCALER);
 322
 323 #ifdef  DEBUG
 324         mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 325                 " tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 326                         *hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 327                         *hwp->tcrp,  *hwp->tcnp, *hwp->terp
 328                 );
 329 #endif
 330 }
 331
 332 /*
 333  * Handler for CPMVEC_TIMER1 interrupt
 334  */
 335 static
 336 void timer_handler (void *arg)
 337 {
 338         tid_8xx_cpmtimer_t *hwp = (tid_8xx_cpmtimer_t *)arg;
 339
 340         /* printf ("** TER1=%04x ** ", *hwp->terp); */
 341
 342         /* just for demonstration */
 343         mon_printf (".");
 344
 345         /* clear all possible events: Ref. and Cap. */
 346         *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
 347 }