include/asm-arm/arch-lpc2292/lpc2292_registers.h

   1 #ifndef __LPC2292_REGISTERS_H
   2 #define __LPC2292_REGISTERS_H
   3
   4 #include <config.h>
   5
   6 /* Macros for reading/writing registers */
   7 #define PUT8(reg, value) (*(volatile unsigned char*)(reg) = (value))
   8 #define PUT16(reg, value) (*(volatile unsigned short*)(reg) = (value))
   9 #define PUT32(reg, value) (*(volatile unsigned int*)(reg) = (value))
  10 #define GET8(reg) (*(volatile unsigned char*)(reg))
  11 #define GET16(reg) (*(volatile unsigned short*)(reg))
  12 #define GET32(reg) (*(volatile unsigned int*)(reg))
  13
  14 /* External Memory Controller */
  15
  16 #define BCFG0 0xFFE00000        /* 32-bits */
  17 #define BCFG1 0xFFE00004        /* 32-bits */
  18 #define BCFG2 0xFFE00008        /* 32-bits */
  19 #define BCFG3 0xFFE0000c        /* 32-bits */
  20
  21 /* System Control Block */
  22
  23 #define EXTINT   0xE01FC140
  24 #define EXTWAKE  0xE01FC144
  25 #define EXTMODE  0xE01FC148
  26 #define EXTPOLAR 0xE01FC14C
  27 #define MEMMAP   0xE01FC040
  28 #define PLLCON   0xE01FC080
  29 #define PLLCFG   0xE01FC084
  30 #define PLLSTAT  0xE01FC088
  31 #define PLLFEED  0xE01FC08C
  32 #define PCON     0xE01FC0C0
  33 #define PCONP    0xE01FC0C4
  34 #define VPBDIV   0xE01FC100
  35
  36 /* Memory Acceleration Module */
  37
  38 #define MAMCR  0xE01FC000
  39 #define MAMTIM 0xE01FC004
  40
  41 /* Vectored Interrupt Controller */
  42
  43 #define VICIRQStatus    0xFFFFF000
  44 #define VICFIQStatus    0xFFFFF004
  45 #define VICRawIntr      0xFFFFF008
  46 #define VICIntSelect    0xFFFFF00C
  47 #define VICIntEnable    0xFFFFF010
  48 #define VICIntEnClr     0xFFFFF014
  49 #define VICSoftInt      0xFFFFF018
  50 #define VICSoftIntClear 0xFFFFF01C
  51 #define VICProtection   0xFFFFF020
  52 #define VICVectAddr     0xFFFFF030
  53 #define VICDefVectAddr  0xFFFFF034
  54 #define VICVectAddr0    0xFFFFF100
  55 #define VICVectAddr1    0xFFFFF104
  56 #define VICVectAddr2    0xFFFFF108
  57 #define VICVectAddr3    0xFFFFF10C
  58 #define VICVectAddr4    0xFFFFF110
  59 #define VICVectAddr5    0xFFFFF114
  60 #define VICVectAddr6    0xFFFFF118
  61 #define VICVectAddr7    0xFFFFF11C
  62 #define VICVectAddr8    0xFFFFF120
  63 #define VICVectAddr9    0xFFFFF124
  64 #define VICVectAddr10   0xFFFFF128
  65 #define VICVectAddr11   0xFFFFF12C
  66 #define VICVectAddr12   0xFFFFF130
  67 #define VICVectAddr13   0xFFFFF134
  68 #define VICVectAddr14   0xFFFFF138
  69 #define VICVectAddr15   0xFFFFF13C
  70 #define VICVectCntl0    0xFFFFF200
  71 #define VICVectCntl1    0xFFFFF204
  72 #define VICVectCntl2    0xFFFFF208
  73 #define VICVectCntl3    0xFFFFF20C
  74 #define VICVectCntl4    0xFFFFF210
  75 #define VICVectCntl5    0xFFFFF214
  76 #define VICVectCntl6    0xFFFFF218
  77 #define VICVectCntl7    0xFFFFF21C
  78 #define VICVectCntl8    0xFFFFF220
  79 #define VICVectCntl9    0xFFFFF224
  80 #define VICVectCntl10   0xFFFFF228
  81 #define VICVectCntl11   0xFFFFF22C
  82 #define VICVectCntl12   0xFFFFF230
  83 #define VICVectCntl13   0xFFFFF234
  84 #define VICVectCntl14   0xFFFFF238
  85 #define VICVectCntl15   0xFFFFF23C
  86
  87 /* Pin connect block */
  88
  89 #define PINSEL0 0xE002C000      /* 32 bits */
  90 #define PINSEL1 0xE002C004      /* 32 bits */
  91 #define PINSEL2 0xE002C014      /* 32 bits */
  92
  93 /* GPIO */
  94
  95 #define IO0PIN 0xE0028000
  96 #define IO0SET 0xE0028004
  97 #define IO0DIR 0xE0028008
  98 #define IO0CLR 0xE002800C
  99 #define IO1PIN 0xE0028010
 100 #define IO1SET 0xE0028014
 101 #define IO1DIR 0xE0028018
 102 #define IO1CLR 0xE002801C
 103 #define IO2PIN 0xE0028020
 104 #define IO2SET 0xE0028024
 105 #define IO2DIR 0xE0028028
 106 #define IO2CLR 0xE002802C
 107 #define IO3PIN 0xE0028030
 108 #define IO3SET 0xE0028034
 109 #define IO3DIR 0xE0028038
 110 #define IO3CLR 0xE002803C
 111
 112 /* Uarts */
 113
 114 #define U0RBR 0xE000C000
 115 #define U0THR 0xE000C000
 116 #define U0IER 0xE000C004
 117 #define U0IIR 0xE000C008
 118 #define U0FCR 0xE000C008
 119 #define U0LCR 0xE000C00C
 120 #define U0LSR 0xE000C014
 121 #define U0SCR 0xE000C01C
 122 #define U0DLL 0xE000C000
 123 #define U0DLM 0xE000C004
 124
 125 #define U1RBR 0xE0010000
 126 #define U1THR 0xE0010000
 127 #define U1IER 0xE0010004
 128 #define U1IIR 0xE0010008
 129 #define U1FCR 0xE0010008
 130 #define U1LCR 0xE001000C
 131 #define U1MCR 0xE0010010
 132 #define U1LSR 0xE0010014
 133 #define U1MSR 0xE0010018
 134 #define U1SCR 0xE001001C
 135 #define U1DLL 0xE0010000
 136 #define U1DLM 0xE0010004
 137
 138 /* I2C */
 139
 140 #define I2CONSET 0xE001C000
 141 #define I2STAT   0xE001C004
 142 #define I2DAT    0xE001C008
 143 #define I2ADR    0xE001C00C
 144 #define I2SCLH   0xE001C010
 145 #define I2SCLL   0xE001C014
 146 #define I2CONCLR 0xE001C018
 147
 148 /* SPI */
 149
 150 #define S0SPCR  0xE0020000
 151 #define S0SPSR  0xE0020004
 152 #define S0SPDR  0xE0020008
 153 #define S0SPCCR 0xE002000C
 154 #define S0SPINT 0xE002001C
 155
 156 #define S1SPCR  0xE0030000
 157 #define S1SPSR  0xE0030004
 158 #define S1SPDR  0xE0030008
 159 #define S1SPCCR 0xE003000C
 160 #define S1SPINT 0xE003001C
 161
 162 /* CAN controller */
 163
 164 /* skip for now */
 165
 166 /* Timers */
 167
 168 #define T0IR  0xE0004000
 169 #define T0TCR 0xE0004004
 170 #define T0TC  0xE0004008
 171 #define T0PR  0xE000400C
 172 #define T0PC  0xE0004010
 173 #define T0MCR 0xE0004014
 174 #define T0MR0 0xE0004018
 175 #define T0MR1 0xE000401C
 176 #define T0MR2 0xE0004020
 177 #define T0MR3 0xE0004024
 178 #define T0CCR 0xE0004028
 179 #define T0CR0 0xE000402C
 180 #define T0CR1 0xE0004030
 181 #define T0CR2 0xE0004034
 182 #define T0CR3 0xE0004038
 183 #define T0EMR 0xE000403C
 184
 185 #define T1IR  0xE0008000
 186 #define T1TCR 0xE0008004
 187 #define T1TC  0xE0008008
 188 #define T1PR  0xE000800C
 189 #define T1PC  0xE0008010
 190 #define T1MCR 0xE0008014
 191 #define T1MR0 0xE0008018
 192 #define T1MR1 0xE000801C
 193 #define T1MR2 0xE0008020
 194 #define T1MR3 0xE0008024
 195 #define T1CCR 0xE0008028
 196 #define T1CR0 0xE000802C
 197 #define T1CR1 0xE0008030
 198 #define T1CR2 0xE0008034
 199 #define T1CR3 0xE0008038
 200 #define T1EMR 0xE000803C
 201
 202 /* PWM */
 203
 204 /* skip for now */
 205
 206 /* A/D converter */
 207
 208 /* skip for now */
 209
 210 /* Real Time Clock */
 211
 212 /* skip for now */
 213
 214 /* Watchdog */
 215
 216 #define WDMOD  0xE0000000
 217 #define WDTC   0xE0000004
 218 #define WDFEED 0xE0000008
 219 #define WDTV   0xE000000C
 220
 221 /* EmbeddedICE LOGIC */
 222
 223 /* skip for now */
 224
 225 #endif