include/asm-arm/macro.h

   1 /*
   2  * include/asm-arm/macro.h
   3  *
   4  * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #ifndef __ASM_ARM_MACRO_H__
  26 #define __ASM_ARM_MACRO_H__
  27 #ifdef __ASSEMBLY__
  28
  29 /*
  30  * These macros provide a convenient way to write 8, 16 and 32 bit data
  31  * to any address.
  32  * Registers r4 and r5 are used, any data in these registers are
  33  * overwritten by the macros.
  34  * The macros are valid for any ARM architecture, they do not implement
  35  * any memory barriers so caution is recommended when using these when the
  36  * caches are enabled or on a multi-core system.
  37  */
  38
  39 .macro  write32, addr, data
  40         ldr     r4, =\addr
  41         ldr     r5, =\data
  42         str     r5, [r4]
  43 .endm
  44
  45 .macro  write16, addr, data
  46         ldr     r4, =\addr
  47         ldrh    r5, =\data
  48         strh    r5, [r4]
  49 .endm
  50
  51 .macro  write8, addr, data
  52         ldr     r4, =\addr
  53         ldrb    r5, =\data
  54         strb    r5, [r4]
  55 .endm
  56
  57 /*
  58  * This macro generates a loop that can be used for delays in the code.
  59  * Register r4 is used, any data in this register is overwritten by the
  60  * macro.
  61  * The macro is valid for any ARM architeture. The actual time spent in the
  62  * loop will vary from CPU to CPU though.
  63  */
  64
  65 .macro  wait_timer, time
  66         ldr     r4, =\time
  67 1:
  68         nop
  69         subs    r4, r4, #1
  70         bcs     1b
  71 .endm
  72
  73 #endif /* __ASSEMBLY__ */
  74 #endif /* __ASM_ARM_MACRO_H__ */