include/asm-arm/proc-armv/ptrace.h

   1 /*
   2  *  linux/include/asm-arm/proc-armv/ptrace.h
   3  *
   4  *  Copyright (C) 1996-1999 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #ifndef __ASM_PROC_PTRACE_H
  11 #define __ASM_PROC_PTRACE_H
  12
  13 #include <linux/config.h>
  14
  15 #define USR26_MODE      0x00
  16 #define FIQ26_MODE      0x01
  17 #define IRQ26_MODE      0x02
  18 #define SVC26_MODE      0x03
  19 #define USR_MODE        0x10
  20 #define FIQ_MODE        0x11
  21 #define IRQ_MODE        0x12
  22 #define SVC_MODE        0x13
  23 #define ABT_MODE        0x17
  24 #define UND_MODE        0x1b
  25 #define SYSTEM_MODE     0x1f
  26 #define MODE_MASK       0x1f
  27 #define T_BIT           0x20
  28 #define F_BIT           0x40
  29 #define I_BIT           0x80
  30 #define CC_V_BIT        (1 << 28)
  31 #define CC_C_BIT        (1 << 29)
  32 #define CC_Z_BIT        (1 << 30)
  33 #define CC_N_BIT        (1 << 31)
  34 #define PCMASK          0
  35
  36 #ifndef __ASSEMBLY__
  37
  38 /* this struct defines the way the registers are stored on the
  39    stack during a system call. */
  40
  41 struct pt_regs {
  42         long uregs[18];
  43 };
  44
  45 #define ARM_cpsr        uregs[16]
  46 #define ARM_pc          uregs[15]
  47 #define ARM_lr          uregs[14]
  48 #define ARM_sp          uregs[13]
  49 #define ARM_ip          uregs[12]
  50 #define ARM_fp          uregs[11]
  51 #define ARM_r10         uregs[10]
  52 #define ARM_r9          uregs[9]
  53 #define ARM_r8          uregs[8]
  54 #define ARM_r7          uregs[7]
  55 #define ARM_r6          uregs[6]
  56 #define ARM_r5          uregs[5]
  57 #define ARM_r4          uregs[4]
  58 #define ARM_r3          uregs[3]
  59 #define ARM_r2          uregs[2]
  60 #define ARM_r1          uregs[1]
  61 #define ARM_r0          uregs[0]
  62 #define ARM_ORIG_r0     uregs[17]
  63
  64 #ifdef __KERNEL__
  65
  66 #define user_mode(regs) \
  67         (((regs)->ARM_cpsr & 0xf) == 0)
  68
  69 #ifdef CONFIG_ARM_THUMB
  70 #define thumb_mode(regs) \
  71         (((regs)->ARM_cpsr & T_BIT))
  72 #else
  73 #define thumb_mode(regs) (0)
  74 #endif
  75
  76 #define processor_mode(regs) \
  77         ((regs)->ARM_cpsr & MODE_MASK)
  78
  79 #define interrupts_enabled(regs) \
  80         (!((regs)->ARM_cpsr & I_BIT))
  81
  82 #define fast_interrupts_enabled(regs) \
  83         (!((regs)->ARM_cpsr & F_BIT))
  84
  85 #define condition_codes(regs) \
  86         ((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
  87
  88 /* Are the current registers suitable for user mode?
  89  * (used to maintain security in signal handlers)
  90  */
  91 static inline int valid_user_regs(struct pt_regs *regs)
  92 {
  93         if ((regs->ARM_cpsr & 0xf) == 0 &&
  94             (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
  95                 return 1;
  96
  97         /*
  98          * Force CPSR to something logical...
  99          */
 100         regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
 101
 102         return 0;
 103 }
 104
 105 #endif  /* __KERNEL__ */
 106
 107 #endif  /* __ASSEMBLY__ */
 108
 109 #endif