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1 /*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
4 * (C) Copyright 2000 - 2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 ********************************************************************
9 * NOTE: This header file defines an interface to U-Boot. Including
10 * this (unmodified) header file in another file is considered normal
11 * use of U-Boot, and does *not* fall under the heading of "derived
12 * work".
13 ********************************************************************
14 */
15
16 #ifndef __ASM_GENERIC_U_BOOT_H__
17 #define __ASM_GENERIC_U_BOOT_H__
18
19 /*
20 * Board information passed to Linux kernel from U-Boot
21 *
22 * include/asm-ppc/u-boot.h
23 */
24
25 #ifndef __ASSEMBLY__
26
27 typedef struct bd_info {
28 unsigned long bi_memstart; /* start of DRAM memory */
29 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
30 unsigned long bi_flashstart; /* start of FLASH memory */
31 unsigned long bi_flashsize; /* size of FLASH memory */
32 unsigned long bi_flashoffset; /* reserved area for startup monitor */
33 unsigned long bi_sramstart; /* start of SRAM memory */
34 unsigned long bi_sramsize; /* size of SRAM memory */
35 #ifdef CONFIG_AVR32
36 unsigned char bi_phy_id[4]; /* PHY address for ATAG_ETHERNET */
37 unsigned long bi_board_number;/* ATAG_BOARDINFO */
38 #endif
39 #ifdef CONFIG_ARM
40 unsigned long bi_arm_freq; /* arm frequency */
41 unsigned long bi_dsp_freq; /* dsp core frequency */
42 unsigned long bi_ddr_freq; /* ddr frequency */
43 #endif
44 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
45 unsigned long bi_immr_base; /* base of IMMR register */
46 #endif
47 #if defined(CONFIG_M68K)
48 unsigned long bi_mbar_base; /* base of internal registers */
49 #endif
50 #if defined(CONFIG_MPC83xx)
51 unsigned long bi_immrbar;
52 #endif
53 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
54 unsigned long bi_ip_addr; /* IP Address */
55 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
56 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
57 unsigned long bi_intfreq; /* Internal Freq, in MHz */
58 unsigned long bi_busfreq; /* Bus Freq, in MHz */
59 #if defined(CONFIG_CPM2)
60 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
61 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
62 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
63 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
64 #endif
65 #if defined(CONFIG_M68K)
66 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
67 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
68 #endif
69 #if defined(CONFIG_EXTRA_CLOCK)
70 unsigned long bi_inpfreq; /* input Freq in MHz */
71 unsigned long bi_vcofreq; /* vco Freq in MHz */
72 unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
73 #endif
74 #if defined(CONFIG_405) || \
75 defined(CONFIG_405GP) || \
76 defined(CONFIG_405EP) || \
77 defined(CONFIG_405EZ) || \
78 defined(CONFIG_405EX) || \
79 defined(CONFIG_440)
80 unsigned char bi_s_version[4]; /* Version of this structure */
81 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
82 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
83 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
84 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
85 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
86 #endif
87
88 #ifdef CONFIG_HAS_ETH1
89 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
90 #endif
91 #ifdef CONFIG_HAS_ETH2
92 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
93 #endif
94 #ifdef CONFIG_HAS_ETH3
95 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
96 #endif
97 #ifdef CONFIG_HAS_ETH4
98 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
99 #endif
100 #ifdef CONFIG_HAS_ETH5
101 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
102 #endif
103
104 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
105 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
106 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
107 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
108 defined(CONFIG_460EX) || defined(CONFIG_460GT)
109 unsigned int bi_opbfreq; /* OPB clock in Hz */
110 int bi_iic_fast[2]; /* Use fast i2c mode */
111 #endif
112 #if defined(CONFIG_4xx)
113 #if defined(CONFIG_440GX) || \
114 defined(CONFIG_460EX) || defined(CONFIG_460GT)
115 int bi_phynum[4]; /* Determines phy mapping */
116 int bi_phymode[4]; /* Determines phy mode */
117 #elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
118 int bi_phynum[2]; /* Determines phy mapping */
119 int bi_phymode[2]; /* Determines phy mode */
120 #else
121 int bi_phynum[1]; /* Determines phy mapping */
122 int bi_phymode[1]; /* Determines phy mode */
123 #endif
124 #endif /* defined(CONFIG_4xx) */
125 ulong bi_arch_number; /* unique id for this board */
126 ulong bi_boot_params; /* where this board expects params */
127 #ifdef CONFIG_NR_DRAM_BANKS
128 struct { /* RAM configuration */
129 phys_addr_t start;
130 phys_size_t size;
131 } bi_dram[CONFIG_NR_DRAM_BANKS];
132 #endif /* CONFIG_NR_DRAM_BANKS */
133 } bd_t;
134
135 #endif /* __ASSEMBLY__ */
136
137 #endif /* __ASM_GENERIC_U_BOOT_H__ */