include/asm-m68k/coldfire/lcd.h

   1 /*
   2  * LCD controller Memory Map
   3  *
   4  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
   5  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #ifndef __LCDC_H__
  27 #define __LCDC_H__
  28
  29 /* LCD module registers */
  30 typedef struct lcd_ctrl {
  31         u32 ssar;               /* 0x00 Screen Start Address Register */
  32         u32 sr;                 /* 0x04 LCD Size Register */
  33         u32 vpw;                /* 0x08 Virtual Page Width Register */
  34         u32 cpr;                /* 0x0C Cursor Position Register */
  35         u32 cwhb;               /* 0x10 Cursor Width Height and Blink Register */
  36         u32 ccmr;               /* 0x14 Color Cursor Mapping Register */
  37         u32 pcr;                /* 0x18 Panel Configuration Register */
  38         u32 hcr;                /* 0x1C Horizontal Configuration Register */
  39         u32 vcr;                /* 0x20 Vertical Configuration Register */
  40         u32 por;                /* 0x24 Panning Offset Register */
  41         u32 scr;                /* 0x28 Sharp Configuration Register */
  42         u32 pccr;               /* 0x2C PWM Contrast Control Register */
  43         u32 dcr;                /* 0x30 DMA Control Register */
  44         u32 rmcr;               /* 0x34 Refresh Mode Control Register */
  45         u32 icr;                /* 0x38 Refresh Mode Control Register */
  46         u32 ier;                /* 0x3C Interrupt Enable Register */
  47         u32 isr;                /* 0x40 Interrupt Status Register */
  48         u32 res[4];
  49         u32 gwsar;              /* 0x50 Graphic Window Start Address Register */
  50         u32 gwsr;               /* 0x54 Graphic Window Size Register */
  51         u32 gwvpw;              /* 0x58 Graphic Window Virtual Page Width Register */
  52         u32 gwpor;              /* 0x5C Graphic Window Panning Offset Register */
  53         u32 gwpr;               /* 0x60 Graphic Window Position Register */
  54         u32 gwcr;               /* 0x64 Graphic Window Control Register */
  55         u32 gwdcr;              /* 0x68 Graphic Window DMA Control Register */
  56 } lcd_t;
  57
  58 typedef struct lcdbg_ctrl {
  59         u32 bglut[255];
  60 } lcdbg_t;
  61
  62 typedef struct lcdgw_ctrl {
  63         u32 gwlut[255];
  64 } lcdgw_t;
  65
  66 /* Bit definitions and macros for LCDC_LSSAR */
  67 #define LCDC_SSAR_SSA(x)                (((x)&0x3FFFFFFF)<<2)
  68
  69 /* Bit definitions and macros for LCDC_LSR */
  70 #define LCDC_SR_XMAX(x)                 (((x)&0x0000003F)<<20)
  71 #define LCDC_SR_YMAX(x)                 ((x)&0x000003FF)
  72
  73 /* Bit definitions and macros for LCDC_LVPWR */
  74 #define LCDC_VPWR_VPW(x)                (((x)&0x000003FF)
  75
  76 /* Bit definitions and macros for LCDC_LCPR */
  77 #define LCDC_CPR_CC(x)                  (((x)&0x00000003)<<30)
  78 #define LCDC_CPR_CC_AND                 (0xC0000000)
  79 #define LCDC_CPR_CC_XOR                 (0x80000000)
  80 #define LCDC_CPR_CC_OR                  (0x40000000)
  81 #define LCDC_CPR_CC_TRANSPARENT         (0x00000000)
  82 #define LCDC_CPR_OP                     (0x10000000)
  83 #define LCDC_CPR_CXP(x)                 (((x)&0x000003FF)<<16)
  84 #define LCDC_CPR_CYP(x)                 ((x)&0x000003FF)
  85
  86 /* Bit definitions and macros for LCDC_LCWHBR */
  87 #define LCDC_CWHBR_BK_EN                (0x80000000)
  88 #define LCDC_CWHBR_CW(x)                (((x)&0x0000001F)<<24)
  89 #define LCDC_CWHBR_CH(x)                (((x)&0x0000001F)<<16)
  90 #define LCDC_CWHBR_BD(x)                ((x)&0x000000FF)
  91
  92 /* Bit definitions and macros for LCDC_LCCMR */
  93 #define LCDC_CCMR_CUR_COL_R(x)          (((x)&0x0000003F)<<12)
  94 #define LCDC_CCMR_CUR_COL_G(x)          (((x)&0x0000003F)<<6)
  95 #define LCDC_CCMR_CUR_COL_B(x)          ((x)&0x0000003F)
  96
  97 /* Bit definitions and macros for LCDC_LPCR */
  98 #define LCDC_PCR_PANEL_TYPE(x)          (((x)&0x00000003)<<30)
  99 #define LCDC_PCR_MODE_TFT               (0xC0000000)
 100 #define LCDC_PCR_MODE_CSTN              (0x40000000)
 101 #define LCDC_PCR_MODE_MONOCHROME        (0x00000000)
 102 #define LCDC_PCR_TFT                    (0x80000000)
 103 #define LCDC_PCR_COLOR                  (0x40000000)
 104 #define LCDC_PCR_PBSIZ(x)               (((x)&0x00000003)<<28)
 105 #define LCDC_PCR_PBSIZ_8                (0x30000000)
 106 #define LCDC_PCR_PBSIZ_4                (0x20000000)
 107 #define LCDC_PCR_PBSIZ_2                (0x10000000)
 108 #define LCDC_PCR_PBSIZ_1                (0x00000000)
 109 #define LCDC_PCR_BPIX(x)                (((x)&0x00000007)<<25)
 110 #define LCDC_PCR_BPIX_18bpp             (0x0C000000)
 111 #define LCDC_PCR_BPIX_16bpp             (0x0A000000)
 112 #define LCDC_PCR_BPIX_12bpp             (0x08000000)
 113 #define LCDC_PCR_BPIX_8bpp              (0x06000000)
 114 #define LCDC_PCR_BPIX_4bpp              (0x04000000)
 115 #define LCDC_PCR_BPIX_2bpp              (0x02000000)
 116 #define LCDC_PCR_BPIX_1bpp              (0x00000000)
 117 #define LCDC_PCR_PIXPOL                 (0x01000000)
 118 #define LCDC_PCR_FLM                    (0x00800000)
 119 #define LCDC_PCR_LPPOL                  (0x00400000)
 120 #define LCDC_PCR_CLKPOL                 (0x00200000)
 121 #define LCDC_PCR_OEPOL                  (0x00100000)
 122 #define LCDC_PCR_SCLKIDLE               (0x00080000)
 123 #define LCDC_PCR_ENDSEL                 (0x00040000)
 124 #define LCDC_PCR_SWAP_SEL               (0x00020000)
 125 #define LCDC_PCR_REV_VS                 (0x00010000)
 126 #define LCDC_PCR_ACDSEL                 (0x00008000)
 127 #define LCDC_PCR_ACD(x)                 (((x)&0x0000007F)<<8)
 128 #define LCDC_PCR_SCLKSEL                (0x00000080)
 129 #define LCDC_PCR_SHARP                  (0x00000040)
 130 #define LCDC_PCR_PCD(x)                 ((x)&0x0000003F)
 131
 132 /* Bit definitions and macros for LCDC_LHCR */
 133 #define LCDC_HCR_H_WIDTH(x)             (((x)&0x0000003F)<<26)
 134 #define LCDC_HCR_H_WAIT_1(x)            (((x)&0x000000FF)<<8)
 135 #define LCDC_HCR_H_WAIT_2(x)            ((x)&0x000000FF)
 136
 137 /* Bit definitions and macros for LCDC_LVCR */
 138 #define LCDC_VCR_V_WIDTH(x)             (((x)&0x0000003F)<<26)
 139 #define LCDC_VCR_V_WAIT_1(x)            (((x)&0x000000FF)<<8)
 140 #define LCDC_VCR_V_WAIT_2(x)            ((x)&0x000000FF)
 141
 142 /* Bit definitions and macros for LCDC_SCR */
 143 #define LCDC_SCR_PS_R_DELAY(x)          (((x)&0x0000003F) << 26)
 144 #define LCDC_SCR_CLS_R_DELAY(x)         (((x)&0x000000FF) << 16)
 145 #define LCDC_SCR_RTG_DELAY(x)           (((x)&0x0000000F) << 8)
 146 #define LCDC_SCR_GRAY2(x)               (((x)&0x0000000F) << 4)
 147 #define LCDC_SCR_GRAY1(x)               ((x)&&0x0000000F)
 148
 149 /* Bit definitions and macros for LCDC_LPCCR */
 150 #define LCDC_PCCR_CLS_HI_WID(x)         (((x)&0x000001FF)<<16)
 151 #define LCDC_PCCR_LDMSK                 (0x00008000)
 152 #define LCDC_PCCR_SCR(x)                (((x)&0x00000003)<<9)
 153 #define LCDC_PCCR_SCR_LCDCLK            (0x00000400)
 154 #define LCDC_PCCR_SCR_PIXCLK            (0x00000200)
 155 #define LCDC_PCCR_SCR_LNPULSE           (0x00000000)
 156 #define LCDC_PCCR_CC_EN                 (0x00000100)
 157 #define LCDC_PCCR_PW(x)                 ((x)&0x000000FF)
 158
 159 /* Bit definitions and macros for LCDC_LDCR */
 160 #define LCDC_DCR_BURST                  (0x80000000)
 161 #define LCDC_DCR_HM(x)                  (((x)&0x0000001F)<<16)
 162 #define LCDC_DCR_TM(x)                  ((x)&0x0000001F)
 163
 164 /* Bit definitions and macros for LCDC_LRMCR */
 165 #define LCDC_RMCR_SEL_REF               (0x00000001)
 166
 167 /* Bit definitions and macros for LCDC_LICR */
 168 #define LCDC_ICR_GW_INT_CON             (0x00000010)
 169 #define LCDC_ICR_INTSYN                 (0x00000004)
 170 #define LCDC_ICR_INTCON                 (0x00000001)
 171
 172 /* Bit definitions and macros for LCDC_LIER */
 173 #define LCDC_IER_GW_UDR                 (0x00000080)
 174 #define LCDC_IER_GW_ERR                 (0x00000040)
 175 #define LCDC_IER_GW_EOF                 (0x00000020)
 176 #define LCDC_IER_GW_BOF                 (0x00000010)
 177 #define LCDC_IER_UDR                    (0x00000008)
 178 #define LCDC_IER_ERR                    (0x00000004)
 179 #define LCDC_IER_EOF                    (0x00000002)
 180 #define LCDC_IER_BOF                    (0x00000001)
 181
 182 /* Bit definitions and macros for LCDC_LGWSAR */
 183 #define LCDC_GWSAR_GWSA(x)              (((x)&0x3FFFFFFF)<<2)
 184
 185 /* Bit definitions and macros for LCDC_LGWSR */
 186 #define LCDC_GWSR_GWW(x)                (((x)&0x0000003F)<<20)
 187 #define LCDC_GWSR_GWH(x)                ((x)&0x000003FF)
 188
 189 /* Bit definitions and macros for LCDC_LGWVPWR */
 190 #define LCDC_GWVPWR_GWVPW(x)            ((x)&0x000003FF)
 191
 192 /* Bit definitions and macros for LCDC_LGWPOR */
 193 #define LCDC_GWPOR_GWPO(x)              ((x)&0x0000001F)
 194
 195 /* Bit definitions and macros for LCDC_LGWPR */
 196 #define LCDC_GWPR_GWXP(x)               (((x)&0x000003FF)<<16)
 197 #define LCDC_GWPR_GWYP(x)               ((x)&0x000003FF)
 198
 199 /* Bit definitions and macros for LCDC_LGWCR */
 200 #define LCDC_GWCR_GWAV(x)               (((x)&0x000000FF)<<24)
 201 #define LCDC_GWCR_GWCKE                 (0x00800000)
 202 #define LCDC_LGWCR_GWE                  (0x00400000)
 203 #define LCDC_LGWCR_GW_RVS               (0x00200000)
 204 #define LCDC_LGWCR_GWCKR(x)             (((x)&0x0000003F)<<12)
 205 #define LCDC_LGWCR_GWCKG(x)             (((x)&0x0000003F)<<6)
 206 #define LCDC_LGWCR_GWCKB(x)             ((x)&0x0000003F)
 207
 208 /* Bit definitions and macros for LCDC_LGWDCR */
 209 #define LCDC_LGWDCR_GWBT                (0x80000000)
 210 #define LCDC_LGWDCR_GWHM(x)             (((x)&0x0000001F)<<16)
 211 #define LCDC_LGWDCR_GWTM(x)             ((x)&0x0000001F)
 212
 213 #endif                          /* __LCDC_H__ */