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1 /*
2 * Symmetric Key Hardware Accelerator Memory Map
3 *
4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #ifndef __SKHA_H__
27 #define __SKHA_H__
28
29 typedef struct skha_ctrl {
30 u32 mr; /* 0x00 Mode */
31 u32 cr; /* 0x04 Control */
32 u32 cmr; /* 0x08 Command */
33 u32 sr; /* 0x0C Status */
34 u32 esr; /* 0x10 Error Status */
35 u32 emr; /* 0x14 Error Status Mask Register) */
36 u32 ksr; /* 0x18 Key Size */
37 u32 dsr; /* 0x1C Data Size */
38 u32 in; /* 0x20 Input FIFO */
39 u32 out; /* 0x24 Output FIFO */
40 u32 res1[2]; /* 0x28 - 0x2F */
41 u32 kdr1; /* 0x30 Key Data 1 */
42 u32 kdr2; /* 0x34 Key Data 2 */
43 u32 kdr3; /* 0x38 Key Data 3 */
44 u32 kdr4; /* 0x3C Key Data 4 */
45 u32 kdr5; /* 0x40 Key Data 5 */
46 u32 kdr6; /* 0x44 Key Data 6 */
47 u32 res2[10]; /* 0x48 - 0x6F */
48 u32 c1; /* 0x70 Context 1 */
49 u32 c2; /* 0x74 Context 2 */
50 u32 c3; /* 0x78 Context 3 */
51 u32 c4; /* 0x7C Context 4 */
52 u32 c5; /* 0x80 Context 5 */
53 u32 c6; /* 0x84 Context 6 */
54 u32 c7; /* 0x88 Context 7 */
55 u32 c8; /* 0x8C Context 8 */
56 u32 c9; /* 0x90 Context 9 */
57 u32 c10; /* 0x94 Context 10 */
58 u32 c11; /* 0x98 Context 11 */
59 u32 c12; /* 0x9C Context 12 - 5235, 5271, 5272 */
60 } skha_t;
61
62 #ifdef CONFIG_MCF532x
63 #define SKHA_MODE_CTRM(x) (((x) & 0x0F) << 9)
64 #define SKHA_MODE_CTRM_MASK (0xFFFFE1FF)
65 #define SKHA_MODE_DKP (0x00000100)
66 #else
67 #define SKHA_MODE_CTRM(x) (((x) & 0x0F) << 8)
68 #define SKHA_MODE_CTRM_MASK (0xFFFFF0FF)
69 #define SKHA_MODE_DKP (0x00000080)
70 #endif
71 #define SKHA_MODE_CM(x) (((x) & 0x03) << 3)
72 #define SKHA_MODE_CM_MASK (0xFFFFFFE7)
73 #define SKHA_MODE_DIR (0x00000004)
74 #define SKHA_MODE_ALG(x) ((x) & 0x03)
75 #define SKHA_MODE_ALG_MASK (0xFFFFFFFC)
76
77 #define SHKA_CR_ODMAL(x) (((x) & 0x3F) << 24)
78 #define SHKA_CR_ODMAL_MASK (0xC0FFFFFF)
79 #define SHKA_CR_IDMAL(x) (((x) & 0x3F) << 16)
80 #define SHKA_CR_IDMAL_MASK (0xFFC0FFFF)
81 #define SHKA_CR_END (0x00000008)
82 #define SHKA_CR_ODMA (0x00000004)
83 #define SHKA_CR_IDMA (0x00000002)
84 #define SKHA_CR_IE (0x00000001)
85
86 #define SKHA_CMR_GO (0x00000008)
87 #define SKHA_CMR_CI (0x00000004)
88 #define SKHA_CMR_RI (0x00000002)
89 #define SKHA_CMR_SWR (0x00000001)
90
91 #define SKHA_SR_OFL(x) (((x) & 0xFF) << 24)
92 #define SKHA_SR_OFL_MASK (0x00FFFFFF)
93 #define SKHA_SR_IFL(x) (((x) & 0xFF) << 16)
94 #define SKHA_SR_IFL_MASK (0xFF00FFFF)
95 #define SKHA_SR_AESES(x) (((x) & 0x1F) << 11)
96 #define SKHA_SR_AESES_MASK (0xFFFF07FF)
97 #define SKHA_SR_DESES(x) (((x) & 0x7) << 8)
98 #define SKHA_SR_DESES_MASK (0xFFFFF8FF)
99 #define SKHA_SR_BUSY (0x00000010)
100 #define SKHA_SR_RD (0x00000008)
101 #define SKHA_SR_ERR (0x00000004)
102 #define SKHA_SR_DONE (0x00000002)
103 #define SKHA_SR_INT (0x00000001)
104
105 #define SHKA_ESE_DRL (0x00000800)
106 #define SKHA_ESR_KRE (0x00000400)
107 #define SKHA_ESR_KPE (0x00000200)
108 #define SKHA_ESR_ERE (0x00000100)
109 #define SKHA_ESR_RMDP (0x00000080)
110 #define SKHA_ESR_KSE (0x00000040)
111 #define SKHA_ESR_DSE (0x00000020)
112 #define SKHA_ESR_IME (0x00000010)
113 #define SKHA_ESR_NEOF (0x00000008)
114 #define SKHA_ESR_NEIF (0x00000004)
115 #define SKHA_ESR_OFU (0x00000002)
116 #define SKHA_ESR_IFO (0x00000001)
117
118 #define SKHA_KSR_SZ(x) ((x) & 0x3F)
119 #define SKHA_KSR_SZ_MASK (0xFFFFFFC0)
120
121 #endif /* __SKHA_H__ */