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1 /*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #ifndef __ASM_GBL_DATA_H
25 #define __ASM_GBL_DATA_H
26
27 #include "asm/types.h"
28
29 /*
30 * The following data structure is placed in some memory wich is
31 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
32 * some locked parts of the data cache) to allow for a minimum set of
33 * global variables during system initialization (until we have set
34 * up the memory controller so that we can use RAM).
35 *
36 * Keep it *SMALL* and remember to set CFG_GBL_DATA_SIZE > sizeof(gd_t)
37 */
38
39 typedef struct global_data {
40 bd_t *bd;
41 unsigned long flags;
42 unsigned long baudrate;
43 unsigned long cpu_clk; /* CPU clock in Hz! */
44 unsigned long bus_clk;
45 #if defined(CONFIG_8xx)
46 unsigned long brg_clk;
47 #endif
48 #if defined(CONFIG_CPM2)
49 /* There are many clocks on the MPC8260 - see page 9-5 */
50 unsigned long vco_out;
51 unsigned long cpm_clk;
52 unsigned long scc_clk;
53 unsigned long brg_clk;
54 #endif
55 unsigned long mem_clk;
56 #if defined(CONFIG_MPC83XX)
57 /* There are other clocks in the MPC83XX */
58 u32 csb_clk;
59 #if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
60 u32 tsec1_clk;
61 u32 tsec2_clk;
62 u32 usbdr_clk;
63 #endif
64 #if defined (CONFIG_MPC834X)
65 u32 usbmph_clk;
66 #endif /* CONFIG_MPC834X */
67 #if defined(CONFIG_MPC8315)
68 u32 tdm_clk;
69 #endif
70 #if defined(CONFIG_MPC837X)
71 u32 sdhc_clk;
72 #endif
73 u32 core_clk;
74 u32 enc_clk;
75 u32 lbiu_clk;
76 u32 lclk_clk;
77 u32 pci_clk;
78 #if defined(CONFIG_MPC837X)
79 u32 pciexp1_clk;
80 u32 pciexp2_clk;
81 #endif
82 #if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
83 u32 sata_clk;
84 #endif
85 #if defined(CONFIG_MPC8360)
86 u32 mem_sec_clk;
87 #endif /* CONFIG_MPC8360 */
88 #endif
89 #if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
90 u32 i2c1_clk;
91 u32 i2c2_clk;
92 #endif
93 #if defined(CONFIG_QE)
94 u32 qe_clk;
95 u32 brg_clk;
96 uint mp_alloc_base;
97 uint mp_alloc_top;
98 #endif /* CONFIG_QE */
99 #if defined(CONFIG_MPC5xxx)
100 unsigned long ipb_clk;
101 unsigned long pci_clk;
102 #endif
103 #if defined(CONFIG_MPC512X)
104 u32 ips_clk;
105 u32 csb_clk;
106 u32 pci_clk;
107 #endif /* CONFIG_MPC512X */
108 #if defined(CONFIG_MPC8220)
109 unsigned long bExtUart;
110 unsigned long inp_clk;
111 unsigned long pci_clk;
112 unsigned long vco_clk;
113 unsigned long pev_clk;
114 unsigned long flb_clk;
115 #endif
116 unsigned long ram_size; /* RAM size */
117 unsigned long reloc_off; /* Relocation Offset */
118 unsigned long reset_status; /* reset status register at boot */
119 unsigned long env_addr; /* Address of Environment struct */
120 unsigned long env_valid; /* Checksum of Environment valid? */
121 unsigned long have_console; /* serial_init() was called */
122 #if defined(CFG_ALLOC_DPRAM) || defined(CONFIG_CPM2)
123 unsigned int dp_alloc_base;
124 unsigned int dp_alloc_top;
125 #endif
126 #if defined(CONFIG_4xx)
127 u32 uart_clk;
128 #endif /* CONFIG_4xx */
129 #if defined(CFG_GT_6426x)
130 unsigned int mirror_hack[16];
131 #endif
132 #if defined(CONFIG_A3000) || \
133 defined(CONFIG_HIDDEN_DRAGON) || \
134 defined(CONFIG_MUSENKI) || \
135 defined(CONFIG_SANDPOINT)
136 void * console_addr;
137 #endif
138 #ifdef CONFIG_AMIGAONEG3SE
139 unsigned long relocaddr; /* Start address of U-Boot in RAM */
140 #endif
141 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
142 unsigned long fb_base; /* Base address of framebuffer memory */
143 #endif
144 #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
145 unsigned long post_log_word; /* Record POST activities */
146 unsigned long post_init_f_time; /* When post_init_f started */
147 #endif
148 #ifdef CONFIG_BOARD_TYPES
149 unsigned long board_type;
150 #endif
151 #ifdef CONFIG_MODEM_SUPPORT
152 unsigned long do_mdm_init;
153 unsigned long be_quiet;
154 #endif
155 #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
156 unsigned long kbd_status;
157 #endif
158 #if defined(CONFIG_WD_MAX_RATE)
159 unsigned long long wdt_last; /* trace watch-dog triggering rate */
160 #endif
161 void **jt; /* jump table */
162 } gd_t;
163
164 /*
165 * Global Data Flags
166 */
167 #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
168 #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
169 #define GD_FLG_SILENT 0x00004 /* Silent mode */
170 #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
171
172 #if 1
173 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
174 #else /* We could use plain global data, but the resulting code is bigger */
175 #define XTRN_DECLARE_GLOBAL_DATA_PTR extern
176 #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
177 gd_t *gd
178 #endif
179
180 #endif /* __ASM_GBL_DATA_H */