include/asm-ppc/i2c.h

   1 /*
   2  * Freescale I2C Controller
   3  *
   4  * This software may be used and distributed according to the
   5  * terms of the GNU Public License, Version 2, incorporated
   6  * herein by reference.
   7  *
   8  * Copyright 2004 Freescale Semiconductor.
   9  * (C) Copyright 2003, Motorola, Inc.
  10  * author: Eran Liberty (liberty@freescale.com)
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef _ASM_I2C_H_
  29 #define _ASM_I2C_H_
  30
  31 #include <asm/types.h>
  32
  33 typedef struct i2c
  34 {
  35     u8 adr;          /**< I2C slave address              */
  36 #define I2C_ADR       0xFE
  37 #define I2C_ADR_SHIFT 1
  38 #define I2C_ADR_RES   ~(I2C_ADR)
  39     u8 res0[3];
  40     u8 fdr;          /**< I2C frequency divider register */
  41 #define IC2_FDR       0x3F
  42 #define IC2_FDR_SHIFT 0
  43 #define IC2_FDR_RES   ~(IC2_FDR)
  44     u8 res1[3];
  45     u8 cr;           /**< I2C control redister           */
  46 #define I2C_CR_MEN        0x80
  47 #define I2C_CR_MIEN       0x40
  48 #define I2C_CR_MSTA   0x20
  49 #define I2C_CR_MTX    0x10
  50 #define I2C_CR_TXAK   0x08
  51 #define I2C_CR_RSTA   0x04
  52 #define I2C_CR_BCST   0x01
  53     u8 res2[3];
  54     u8 sr;           /**< I2C status register            */
  55 #define I2C_SR_MCF    0x80
  56 #define I2C_SR_MAAS   0x40
  57 #define I2C_SR_MBB    0x20
  58 #define I2C_SR_MAL    0x10
  59 #define I2C_SR_BCSTM  0x08
  60 #define I2C_SR_SRW    0x04
  61 #define I2C_SR_MIF    0x02
  62 #define I2C_SR_RXAK   0x01
  63     u8 res3[3];
  64     u8 dr;           /**< I2C data register              */
  65 #define I2C_DR 0xFF
  66 #define I2C_DR_SHIFT 0
  67 #define I2C_DR_RES ~(I2C_DR)
  68     u8 res4[3];
  69     u8 dfsrr;        /**< I2C digital filter sampling rate register */
  70 #define I2C_DFSRR 0x3F
  71 #define I2C_DFSRR_SHIFT 0
  72 #define I2C_DFSRR_RES ~(I2C_DR)
  73     u8 res5[3];
  74     u8 res6[0xE8];
  75 } i2c_t;
  76
  77 #ifndef CFG_HZ
  78 #error CFG_HZ is not defined in /include/configs/${BOARD}.h
  79 #endif
  80 #define I2C_TIMEOUT (CFG_HZ/4)
  81
  82 #ifndef CFG_IMMR
  83 #error CFG_IMMR is not defined in /include/configs/${BOARD}.h
  84 #endif
  85
  86 #ifndef CFG_I2C_OFFSET
  87 #error CFG_I2C_OFFSET is not defined in /include/configs/${BOARD}.h
  88 #endif
  89
  90 #define I2C_1 ((i2c_t*)(CFG_IMMR + CFG_I2C_OFFSET))
  91
  92 /* Optional support for second I2C bus */
  93 #ifdef  CFG_I2C2_OFFSET
  94 #define I2C_2 ((i2c_t*)(CFG_IMMR + CFG_I2C2_OFFSET))
  95 #endif  /* CFG_I2C2_OFFSET */
  96
  97 #define I2C_READ  1
  98 #define I2C_WRITE 0
  99
 100 #endif  /* _ASM_I2C_H_ */