include/atmel_mci.h

   1 /*
   2  * Copyright (C) 2005-2006 Atmel Corporation
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #ifndef __ATMEL_MCI_H__
  23 #define __ATMEL_MCI_H__
  24
  25 int atmel_mci_init(void *regs);
  26
  27 #ifndef __ASSEMBLY__
  28
  29 /*
  30  * Structure for struct SoC access.
  31  * Names starting with '_' are fillers.
  32  */
  33 typedef struct atmel_mci {
  34         /*      reg     Offset */
  35         u32     cr;     /* 0x00 */
  36         u32     mr;     /* 0x04 */
  37         u32     dtor;   /* 0x08 */
  38         u32     sdcr;   /* 0x0c */
  39         u32     argr;   /* 0x10 */
  40         u32     cmdr;   /* 0x14 */
  41         u32     _18;    /* 0x18 */
  42         u32     _1c;    /* 0x1c */
  43         u32     rspr;   /* 0x20 */
  44         u32     rspr1;  /* 0x24 */
  45         u32     rspr2;  /* 0x28 */
  46         u32     rspr3;  /* 0x2c */
  47         u32     rdr;    /* 0x30 */
  48         u32     tdr;    /* 0x34 */
  49         u32     _38;    /* 0x38 */
  50         u32     _3c;    /* 0x3c */
  51         u32     sr;     /* 0x40 */
  52         u32     ier;    /* 0x44 */
  53         u32     idr;    /* 0x48 */
  54         u32     imr;    /* 0x4c */
  55 } atmel_mci_t;
  56
  57 #endif /* __ASSEMBLY__ */
  58
  59 /* Bitfields in CR */
  60 #define MMCI_MCIEN_OFFSET                       0
  61 #define MMCI_MCIEN_SIZE                         1
  62 #define MMCI_MCIDIS_OFFSET                      1
  63 #define MMCI_MCIDIS_SIZE                        1
  64 #define MMCI_PWSEN_OFFSET                       2
  65 #define MMCI_PWSEN_SIZE                         1
  66 #define MMCI_PWSDIS_OFFSET                      3
  67 #define MMCI_PWSDIS_SIZE                        1
  68 #define MMCI_SWRST_OFFSET                       7
  69 #define MMCI_SWRST_SIZE                         1
  70
  71 /* Bitfields in MR */
  72 #define MMCI_CLKDIV_OFFSET                      0
  73 #define MMCI_CLKDIV_SIZE                        8
  74 #define MMCI_PWSDIV_OFFSET                      8
  75 #define MMCI_PWSDIV_SIZE                        3
  76 #define MMCI_RDPROOF_OFFSET                     11
  77 #define MMCI_RDPROOF_SIZE                       1
  78 #define MMCI_WRPROOF_OFFSET                     12
  79 #define MMCI_WRPROOF_SIZE                       1
  80 #define MMCI_PDCPADV_OFFSET                     14
  81 #define MMCI_PDCPADV_SIZE                       1
  82 #define MMCI_PDCMODE_OFFSET                     15
  83 #define MMCI_PDCMODE_SIZE                       1
  84 #define MMCI_BLKLEN_OFFSET                      16
  85 #define MMCI_BLKLEN_SIZE                        16
  86
  87 /* Bitfields in DTOR */
  88 #define MMCI_DTOCYC_OFFSET                      0
  89 #define MMCI_DTOCYC_SIZE                        4
  90 #define MMCI_DTOMUL_OFFSET                      4
  91 #define MMCI_DTOMUL_SIZE                        3
  92
  93 /* Bitfields in SDCR */
  94 #define MMCI_SCDSEL_OFFSET                      0
  95 #define MMCI_SCDSEL_SIZE                        4
  96 #define MMCI_SCDBUS_OFFSET                      7
  97 #define MMCI_SCDBUS_SIZE                        1
  98
  99 /* Bitfields in ARGR */
 100 #define MMCI_ARG_OFFSET                         0
 101 #define MMCI_ARG_SIZE                           32
 102
 103 /* Bitfields in CMDR */
 104 #define MMCI_CMDNB_OFFSET                       0
 105 #define MMCI_CMDNB_SIZE                         6
 106 #define MMCI_RSPTYP_OFFSET                      6
 107 #define MMCI_RSPTYP_SIZE                        2
 108 #define MMCI_SPCMD_OFFSET                       8
 109 #define MMCI_SPCMD_SIZE                         3
 110 #define MMCI_OPDCMD_OFFSET                      11
 111 #define MMCI_OPDCMD_SIZE                        1
 112 #define MMCI_MAXLAT_OFFSET                      12
 113 #define MMCI_MAXLAT_SIZE                        1
 114 #define MMCI_TRCMD_OFFSET                       16
 115 #define MMCI_TRCMD_SIZE                         2
 116 #define MMCI_TRDIR_OFFSET                       18
 117 #define MMCI_TRDIR_SIZE                         1
 118 #define MMCI_TRTYP_OFFSET                       19
 119 #define MMCI_TRTYP_SIZE                         2
 120
 121 /* Bitfields in RSPRx */
 122 #define MMCI_RSP_OFFSET                         0
 123 #define MMCI_RSP_SIZE                           32
 124
 125 /* Bitfields in SR/IER/IDR/IMR */
 126 #define MMCI_CMDRDY_OFFSET                      0
 127 #define MMCI_CMDRDY_SIZE                        1
 128 #define MMCI_RXRDY_OFFSET                       1
 129 #define MMCI_RXRDY_SIZE                         1
 130 #define MMCI_TXRDY_OFFSET                       2
 131 #define MMCI_TXRDY_SIZE                         1
 132 #define MMCI_BLKE_OFFSET                        3
 133 #define MMCI_BLKE_SIZE                          1
 134 #define MMCI_DTIP_OFFSET                        4
 135 #define MMCI_DTIP_SIZE                          1
 136 #define MMCI_NOTBUSY_OFFSET                     5
 137 #define MMCI_NOTBUSY_SIZE                       1
 138 #define MMCI_ENDRX_OFFSET                       6
 139 #define MMCI_ENDRX_SIZE                         1
 140 #define MMCI_ENDTX_OFFSET                       7
 141 #define MMCI_ENDTX_SIZE                         1
 142 #define MMCI_RXBUFF_OFFSET                      14
 143 #define MMCI_RXBUFF_SIZE                        1
 144 #define MMCI_TXBUFE_OFFSET                      15
 145 #define MMCI_TXBUFE_SIZE                        1
 146 #define MMCI_RINDE_OFFSET                       16
 147 #define MMCI_RINDE_SIZE                         1
 148 #define MMCI_RDIRE_OFFSET                       17
 149 #define MMCI_RDIRE_SIZE                         1
 150 #define MMCI_RCRCE_OFFSET                       18
 151 #define MMCI_RCRCE_SIZE                         1
 152 #define MMCI_RENDE_OFFSET                       19
 153 #define MMCI_RENDE_SIZE                         1
 154 #define MMCI_RTOE_OFFSET                        20
 155 #define MMCI_RTOE_SIZE                          1
 156 #define MMCI_DCRCE_OFFSET                       21
 157 #define MMCI_DCRCE_SIZE                         1
 158 #define MMCI_DTOE_OFFSET                        22
 159 #define MMCI_DTOE_SIZE                          1
 160 #define MMCI_OVRE_OFFSET                        30
 161 #define MMCI_OVRE_SIZE                          1
 162 #define MMCI_UNRE_OFFSET                        31
 163 #define MMCI_UNRE_SIZE                          1
 164
 165 /* Constants for DTOMUL */
 166 #define MMCI_DTOMUL_1_CYCLE                     0
 167 #define MMCI_DTOMUL_16_CYCLES                   1
 168 #define MMCI_DTOMUL_128_CYCLES                  2
 169 #define MMCI_DTOMUL_256_CYCLES                  3
 170 #define MMCI_DTOMUL_1024_CYCLES                 4
 171 #define MMCI_DTOMUL_4096_CYCLES                 5
 172 #define MMCI_DTOMUL_65536_CYCLES                6
 173 #define MMCI_DTOMUL_1048576_CYCLES              7
 174
 175 /* Constants for RSPTYP */
 176 #define MMCI_RSPTYP_NO_RESP                     0
 177 #define MMCI_RSPTYP_48_BIT_RESP                 1
 178 #define MMCI_RSPTYP_136_BIT_RESP                2
 179
 180 /* Constants for SPCMD */
 181 #define MMCI_SPCMD_NO_SPEC_CMD                  0
 182 #define MMCI_SPCMD_INIT_CMD                     1
 183 #define MMCI_SPCMD_SYNC_CMD                     2
 184 #define MMCI_SPCMD_INT_CMD                      4
 185 #define MMCI_SPCMD_INT_RESP                     5
 186
 187 /* Constants for TRCMD */
 188 #define MMCI_TRCMD_NO_TRANS                     0
 189 #define MMCI_TRCMD_START_TRANS                  1
 190 #define MMCI_TRCMD_STOP_TRANS                   2
 191
 192 /* Constants for TRTYP */
 193 #define MMCI_TRTYP_BLOCK                        0
 194 #define MMCI_TRTYP_MULTI_BLOCK                  1
 195 #define MMCI_TRTYP_STREAM                       2
 196
 197 /* Bit manipulation macros */
 198 #define MMCI_BIT(name)                                  \
 199         (1 << MMCI_##name##_OFFSET)
 200 #define MMCI_BF(name,value)                             \
 201         (((value) & ((1 << MMCI_##name##_SIZE) - 1))    \
 202          << MMCI_##name##_OFFSET)
 203 #define MMCI_BFEXT(name,value)                          \
 204         (((value) >> MMCI_##name##_OFFSET)\
 205          & ((1 << MMCI_##name##_SIZE) - 1))
 206 #define MMCI_BFINS(name,value,old)                      \
 207         (((old) & ~(((1 << MMCI_##name##_SIZE) - 1)     \
 208                     << MMCI_##name##_OFFSET))           \
 209          | MMCI_BF(name,value))
 210
 211 #endif /* __ATMEL_MCI_H__ */