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1 /*
2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 /*
9 * board/config.h - configuration options, board specific
10 */
11
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14
15 /*
16 * High Level Configuration Options
17 * (easy to change)
18 */
19
20 #define CONFIG_405GP 1 /* This is a PPC405GP CPU */
21 #define CONFIG_4xx 1 /* ...member of PPC4xx family */
22 #define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */
23
24 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
25
26 #define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
27
28 /* I2C configuration */
29 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
30 #define CONFIG_SYS_I2C_SPEED 40000 /* I2C speed */
31 #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
32
33 /* environment is in EEPROM */
34 #define CONFIG_ENV_IS_IN_EEPROM 1
35 #undef CONFIG_ENV_IS_IN_FLASH
36 #undef CONFIG_ENV_IS_IN_NVRAM
37
38 #ifdef CONFIG_ENV_IS_IN_EEPROM
39 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* 1010110 */
40 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */
41 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */
42 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */
43 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */
44 #define CONFIG_ENV_OFFSET 4 /* Offset of Environment Sector */
45 #define CONFIG_ENV_SIZE 350 /* that is 350 bytes only! */
46 #endif
47
48 #define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
49 /* Explanation:
50 autbooting is altogether disabled and cannot be
51 enabled if CONFIG_BOOTDELAY is negative.
52 If you want shorter bootdelay, then
53 - "setenv bootdelay <delay>" to the proper value
54 */
55
56 #define CONFIG_BOOTCOMMAND "bootm 20400000 20800000"
57
58 #define CONFIG_BOOTARGS "root=/dev/ram " \
59 "ramdisk_size=32768 " \
60 "console=ttyS0,115200 " \
61 "ram=128M debug"
62
63 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
64 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
65
66 #define CONFIG_MII 1 /* MII PHY management */
67 #define CONFIG_PHY_ADDR 0 /* PHY address */
68
69
70 /*
71 * BOOTP options
72 */
73 #define CONFIG_BOOTP_BOOTFILESIZE
74 #define CONFIG_BOOTP_BOOTPATH
75 #define CONFIG_PPC4xx_EMAC
76 #define CONFIG_BOOTP_GATEWAY
77 #define CONFIG_BOOTP_HOSTNAME
78
79
80 /*
81 * Command line configuration.
82 */
83 #include <config_cmd_default.h>
84
85
86 #undef CONFIG_WATCHDOG /* watchdog disabled */
87
88 /*
89 * Miscellaneous configurable options
90 */
91 #define CONFIG_SYS_LONGHELP /* undef to save memory */
92 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
93 #if defined(CONFIG_CMD_KGDB)
94 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
95 #else
96 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
97 #endif
98 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
99 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
100 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
101
102 #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
103 #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
104
105 /* UART configuration */
106 #define CONFIG_SYS_BASE_BAUD 691200
107
108 /* Default baud rate */
109 #define CONFIG_BAUDRATE 115200
110
111 /* The following table includes the supported baudrates */
112 #define CONFIG_SYS_BAUDRATE_TABLE \
113 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
114 57600, 115200, 230400, 460800, 921600 }
115
116 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
117 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
118
119 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
120
121 /*-----------------------------------------------------------------------
122 * PCI stuff
123 *-----------------------------------------------------------------------
124 */
125 #undef CONFIG_PCI /* no pci support */
126
127 /*-----------------------------------------------------------------------
128 * External peripheral base address
129 *-----------------------------------------------------------------------
130 */
131 #undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */
132 #undef CONFIG_IDE_LED /* no led for ide supported */
133 #undef CONFIG_IDE_RESET /* no reset for ide supported */
134
135 #define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000
136 #define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000
137 #define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000
138
139 /*-----------------------------------------------------------------------
140 * Start addresses for the final memory configuration
141 * (Set up by the startup code)
142 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
143 */
144 #define CONFIG_SYS_SDRAM_BASE 0x00000000
145 #define CONFIG_SYS_FLASH0_BASE 0xFFF80000
146 #define CONFIG_SYS_FLASH0_SIZE 0x00080000
147 #define CONFIG_SYS_FLASH1_BASE 0x20000000
148 #define CONFIG_SYS_FLASH1_SIZE 0x02000000
149 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
150 #define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH0_SIZE
151 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
152 #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
153 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
154
155 #if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH0_BASE
156 #define CONFIG_SYS_RAMSTART
157 #endif
158
159 /*
160 * For booting Linux, the board info and command line data
161 * have to be in the first 8 MB of memory, since this is
162 * the maximum mapped by the Linux kernel during initialization.
163 */
164 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
165 /*-----------------------------------------------------------------------
166 * FLASH organization
167 */
168 #define CONFIG_SYS_MAX_FLASH_BANKS 5 /* max number of memory banks */
169 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
170
171 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
172 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
173
174 #ifdef CONFIG_ENV_IS_IN_FLASH
175 #define CONFIG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */
176 #define CONFIG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
177 #define CONFIG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */
178 #endif
179
180 /* On Chip Memory location/size */
181 #define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000
182 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000
183
184 /* Global info and initial stack */
185 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */
186 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
187 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
188 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
189
190 #if defined(CONFIG_CMD_KGDB)
191 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
192 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
193 #endif
194 #endif /* __CONFIG_H */