include/configs/IceCube.h

   1 /*
   2  * (C) Copyright 2003-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  * (easy to change)
  30  */
  31
  32 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  33 #define CONFIG_ICECUBE          1       /* ... on IceCube board */
  34
  35 #define CFG_MPC5XXX_CLKIN       33000000 /* ... running at 33.000000MHz */
  36
  37 #define BOOTFLAG_COLD           0x01    /* Normal Power-On: Boot from FLASH  */
  38 #define BOOTFLAG_WARM           0x02    /* Software reboot           */
  39
  40 #define CFG_CACHELINE_SIZE      32      /* For MPC5xxx CPUs */
  41 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  42 #  define CFG_CACHELINE_SHIFT   5       /* log base 2 of the above value */
  43 #endif
  44
  45 /*
  46  * Serial console configuration
  47  */
  48 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  49 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  50 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
  51
  52
  53 #ifdef CONFIG_MPC5200   /* MPC5100 PCI is not supported yet. */
  54 /*
  55  * PCI Mapping:
  56  * 0x40000000 - 0x4fffffff - PCI Memory
  57  * 0x50000000 - 0x50ffffff - PCI IO Space
  58  */
  59 #define CONFIG_PCI              1
  60 #define CONFIG_PCI_PNP          1
  61 #define CONFIG_PCI_SCAN_SHOW    1
  62
  63 #define CONFIG_PCI_MEM_BUS      0x40000000
  64 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  65 #define CONFIG_PCI_MEM_SIZE     0x10000000
  66
  67 #define CONFIG_PCI_IO_BUS       0x50000000
  68 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  69 #define CONFIG_PCI_IO_SIZE      0x01000000
  70
  71 #define CONFIG_NET_MULTI        1
  72 #define CONFIG_EEPRO100         1
  73 #define CFG_RX_ETH_BUFFER       8  /* use 8 rx buffer on eepro100  */
  74 #define CONFIG_NS8382X          1
  75
  76 #define ADD_PCI_CMD             CFG_CMD_PCI
  77
  78 #else   /* MPC5100 */
  79
  80 #define ADD_PCI_CMD             0  /* no CFG_CMD_PCI */
  81
  82 #endif
  83
  84 /* USB */
  85 #if 1
  86 #define CONFIG_USB_OHCI
  87 #define ADD_USB_CMD             CFG_CMD_USB | CFG_CMD_FAT
  88 #define CONFIG_DOS_PARTITION
  89 #define CONFIG_USB_STORAGE
  90 #else
  91 #define ADD_USB_CMD             0
  92 #endif
  93
  94 /*
  95  * Supported commands
  96  */
  97 #define CONFIG_COMMANDS         (CONFIG_CMD_DFL | ADD_PCI_CMD | \
  98                                  CFG_CMD_I2C | CFG_CMD_EEPROM | \
  99                                  ADD_USB_CMD)
 100
 101 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 102 #include <cmd_confdefs.h>
 103
 104 #if (TEXT_BASE == 0xFF000000)           /* Boot low with 16 MB Flash */
 105 #   define CFG_LOWBOOT          1
 106 #   define CFG_LOWBOOT16        1
 107 #endif
 108 #if (TEXT_BASE == 0xFF800000)           /* Boot low with  8 MB Flash */
 109 #   define CFG_LOWBOOT          1
 110 #   define CFG_LOWBOOT08        1
 111 #endif
 112
 113 /*
 114  * Autobooting
 115  */
 116 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
 117
 118 #define CONFIG_PREBOOT  "echo;" \
 119         "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
 120         "echo"
 121
 122 #undef  CONFIG_BOOTARGS
 123
 124 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 125         "netdev=eth0\0"                                                 \
 126         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 127                 "nfsroot=$(serverip):$(rootpath)\0"                     \
 128         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 129         "addip=setenv bootargs $(bootargs) "                            \
 130                 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"      \
 131                 ":$(hostname):$(netdev):off panic=1\0"                  \
 132         "flash_nfs=run nfsargs addip;"                                  \
 133                 "bootm $(kernel_addr)\0"                                \
 134         "flash_self=run ramargs addip;"                                 \
 135                 "bootm $(kernel_addr) $(ramdisk_addr)\0"                \
 136         "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0"     \
 137         "rootpath=/opt/eldk/ppc_82xx\0"                                 \
 138         "bootfile=/tftpboot/MPC5200/uImage\0"                           \
 139         ""
 140
 141 #define CONFIG_BOOTCOMMAND      "run flash_self"
 142
 143 #if defined(CONFIG_MPC5200)
 144 /*
 145  * IPB Bus clocking configuration.
 146  */
 147 #undef CFG_IPBSPEED_133                 /* define for 133MHz speed */
 148 #endif
 149 /*
 150  * I2C configuration
 151  */
 152 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 153 #define CFG_I2C_MODULE          2       /* Select I2C module #1 or #2 */
 154
 155 #define CFG_I2C_SPEED           100000 /* 100 kHz */
 156 #define CFG_I2C_SLAVE           0x7F
 157
 158 /*
 159  * EEPROM configuration
 160  */
 161 #define CFG_I2C_EEPROM_ADDR             0x50    /* 1010000x */
 162 #define CFG_I2C_EEPROM_ADDR_LEN         1
 163 #define CFG_EEPROM_PAGE_WRITE_BITS      3
 164 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS  70
 165
 166 /*
 167  * Flash configuration
 168  */
 169 #define CFG_FLASH_BASE          0xff000000
 170 #define CFG_FLASH_SIZE          0x01000000
 171 #if !defined(CFG_LOWBOOT)
 172 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x740000 + 0x800000)
 173 #else   /* CFG_LOWBOOT */
 174 #if defined(CFG_LOWBOOT08)
 175 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x30000 + 0x800000)
 176 #endif
 177 #if defined(CFG_LOWBOOT16)
 178 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + 0x30000)
 179 #endif
 180 #endif  /* CFG_LOWBOOT */
 181 #define CFG_MAX_FLASH_BANKS     2       /* max num of memory banks      */
 182
 183 #define CFG_MAX_FLASH_SECT      128     /* max num of sects on one chip */
 184
 185 #define CFG_FLASH_ERASE_TOUT    240000  /* Flash Erase Timeout (in ms)  */
 186 #define CFG_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (in ms)  */
 187
 188 #undef CONFIG_FLASH_16BIT       /* Flash is 8-bit */
 189
 190
 191 /*
 192  * Environment settings
 193  */
 194 #define CFG_ENV_IS_IN_FLASH     1
 195 #define CFG_ENV_SIZE            0x10000
 196 #define CFG_ENV_SECT_SIZE       0x10000
 197 #define CONFIG_ENV_OVERWRITE    1
 198
 199 /*
 200  * Memory map
 201  */
 202 #define CFG_MBAR                0xf0000000
 203 #define CFG_SDRAM_BASE          0x00000000
 204 #define CFG_DEFAULT_MBAR        0x80000000
 205
 206 /* Use SRAM until RAM will be available */
 207 #define CFG_INIT_RAM_ADDR       MPC5XXX_SRAM
 208 #define CFG_INIT_RAM_END        MPC5XXX_SRAM_SIZE       /* End of used area in DPRAM */
 209
 210
 211 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 212 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 213 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 214
 215 #define CFG_MONITOR_BASE    TEXT_BASE
 216 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
 217 #   define CFG_RAMBOOT          1
 218 #endif
 219
 220 #define CFG_MONITOR_LEN         (192 << 10)     /* Reserve 192 kB for Monitor   */
 221 #define CFG_MALLOC_LEN          (128 << 10)     /* Reserve 128 kB for malloc()  */
 222 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 223
 224 /*
 225  * Ethernet configuration
 226  */
 227 #define CONFIG_MPC5xxx_FEC      1
 228 #define CONFIG_FEC_10MBIT 1 /* Workaround for FEC 100Mbit problem */
 229 #define CONFIG_PHY_ADDR         0x00
 230
 231 /*
 232  * GPIO configuration
 233  */
 234 #ifdef CONFIG_MPC5200_DDR
 235 #define CFG_GPS_PORT_CONFIG     0x90000004
 236 #else
 237 #define CFG_GPS_PORT_CONFIG     0x10000004
 238 #endif
 239
 240 /*
 241  * Miscellaneous configurable options
 242  */
 243 #define CFG_LONGHELP                    /* undef to save memory     */
 244 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt   */
 245 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 246 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size  */
 247 #else
 248 #define CFG_CBSIZE              256     /* Console I/O Buffer Size  */
 249 #endif
 250 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)   /* Print Buffer Size */
 251 #define CFG_MAXARGS             16              /* max number of command args   */
 252 #define CFG_BARGSIZE            CFG_CBSIZE      /* Boot Argument Buffer Size    */
 253
 254 #define CFG_MEMTEST_START       0x00100000      /* memtest works on */
 255 #define CFG_MEMTEST_END         0x00f00000      /* 1 ... 15 MB in DRAM  */
 256
 257 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 258
 259 #define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
 260
 261 /*
 262  * Various low-level settings
 263  */
 264 #if defined(CONFIG_MPC5200)
 265 #define CFG_HID0_INIT           HID0_ICE | HID0_ICFI
 266 #define CFG_HID0_FINAL          HID0_ICE
 267 #else
 268 #define CFG_HID0_INIT           0
 269 #define CFG_HID0_FINAL          0
 270 #endif
 271
 272 #ifdef CONFIG_MPC5200_DDR
 273
 274 #define CFG_BOOTCS_START        0xff800000
 275 #define CFG_BOOTCS_SIZE         0x00800000
 276 #define CFG_BOOTCS_CFG          0x00047801
 277 #define CFG_CS1_START           0xff000000
 278 #define CFG_CS1_SIZE            0x00800000
 279 #define CFG_CS1_CFG             0x00047800
 280
 281 #else /* !CONFIG_MPC5200_DDR */
 282
 283 #define CFG_BOOTCS_START        CFG_FLASH_BASE
 284 #define CFG_BOOTCS_SIZE         CFG_FLASH_SIZE
 285 #define CFG_BOOTCS_CFG          0x00047801
 286 #define CFG_CS0_START           CFG_FLASH_BASE
 287 #define CFG_CS0_SIZE            CFG_FLASH_SIZE
 288
 289 #endif /* CONFIG_MPC5200_DDR */
 290
 291 #define CFG_CS_BURST            0x00000000
 292 #define CFG_CS_DEADCYCLE        0x33333333
 293
 294 #define CFG_RESET_ADDRESS       0xff000000
 295
 296 #endif /* __CONFIG_H */