include/configs/M5275EVB.h

   1 /*
   2  * Configuation settings for the Motorola MC5275EVB board.
   3  *
   4  * By Arthur Shipkowski <art@videon-central.com>
   5  * Copyright (C) 2005 Videon Central, Inc.
   6  *
   7  * Based off of M5272C3 board code by Josef Baumgartner
   8  * <josef.baumgartner@telex.de>
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 /*
  30  * board/config.h - configuration options, board specific
  31  */
  32
  33 #ifndef _M5275EVB_H
  34 #define _M5275EVB_H
  35
  36 /*
  37  * High Level Configuration Options
  38  * (easy to change)
  39  */
  40 #define CONFIG_MCF52x2                  /* define processor family */
  41 #define CONFIG_M5275                    /* define processor type */
  42 #define CONFIG_M5275EVB                 /* define board type */
  43
  44 #define CONFIG_MCFTMR
  45
  46 #define CONFIG_MCFUART
  47 #define CONFIG_SYS_UART_PORT            (0)
  48 #define CONFIG_BAUDRATE         115200
  49 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600 , 19200 , 38400 , 57600, 115200 }
  50
  51 /* Configuration for environment
  52  * Environment is embedded in u-boot in the second sector of the flash
  53  */
  54 #ifndef CONFIG_MONITOR_IS_IN_RAM
  55 #define CONFIG_ENV_OFFSET               0x4000
  56 #define CONFIG_ENV_SECT_SIZE    0x2000
  57 #define CONFIG_ENV_IS_IN_FLASH  1
  58 #else
  59 #define CONFIG_ENV_ADDR         0xffe04000
  60 #define CONFIG_ENV_SECT_SIZE    0x2000
  61 #define CONFIG_ENV_IS_IN_FLASH  1
  62 #endif
  63
  64 /*
  65  * BOOTP options
  66  */
  67 #define CONFIG_BOOTP_BOOTFILESIZE
  68 #define CONFIG_BOOTP_BOOTPATH
  69 #define CONFIG_BOOTP_GATEWAY
  70 #define CONFIG_BOOTP_HOSTNAME
  71
  72 /* Available command configuration */
  73 #include <config_cmd_default.h>
  74
  75 #define CONFIG_CMD_CACHE
  76 #define CONFIG_CMD_PING
  77 #define CONFIG_CMD_MII
  78 #define CONFIG_CMD_NET
  79 #define CONFIG_CMD_ELF
  80 #define CONFIG_CMD_FLASH
  81 #define CONFIG_CMD_I2C
  82 #define CONFIG_CMD_MEMORY
  83 #define CONFIG_CMD_DHCP
  84
  85 #undef CONFIG_CMD_LOADS
  86 #undef CONFIG_CMD_LOADB
  87
  88 #define CONFIG_MCFFEC
  89 #ifdef CONFIG_MCFFEC
  90 #define CONFIG_NET_MULTI        1
  91 #define CONFIG_MII              1
  92 #define CONFIG_MII_INIT         1
  93 #define CONFIG_SYS_DISCOVER_PHY
  94 #define CONFIG_SYS_RX_ETH_BUFFER        8
  95 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  96 #define CONFIG_SYS_FEC0_PINMUX          0
  97 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
  98 #define CONFIG_SYS_FEC1_PINMUX          0
  99 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
 100 #define MCFFEC_TOUT_LOOP        50000
 101 #define CONFIG_HAS_ETH1
 102 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 103 #ifndef CONFIG_SYS_DISCOVER_PHY
 104 #define FECDUPLEX               FULL
 105 #define FECSPEED                _100BASET
 106 #else
 107 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 108 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 109 #endif
 110 #endif
 111 #endif
 112
 113 /* I2C */
 114 #define CONFIG_FSL_I2C
 115 #define CONFIG_HARD_I2C         /* I2C with hw support */
 116 #undef CONFIG_SOFT_I2C
 117 #define CONFIG_SYS_I2C_SPEED            80000
 118 #define CONFIG_SYS_I2C_SLAVE            0x7F
 119 #define CONFIG_SYS_I2C_OFFSET           0x00000300
 120 #define CONFIG_SYS_IMMR         CONFIG_SYS_MBAR
 121 #define CONFIG_SYS_I2C_PINMUX_REG       (gpio_reg->par_feci2c)
 122 #define CONFIG_SYS_I2C_PINMUX_CLR       (0xFFF0)
 123 #define CONFIG_SYS_I2C_PINMUX_SET       (0x000F)
 124
 125 #define CONFIG_SYS_PROMPT               "-> "
 126 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 127
 128 #if (CONFIG_CMD_KGDB)
 129 #       define CONFIG_SYS_CBSIZE        1024
 130 #else
 131 #       define CONFIG_SYS_CBSIZE        256
 132 #endif
 133 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 134 #define CONFIG_SYS_MAXARGS              16
 135 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 136
 137 #define CONFIG_SYS_LOAD_ADDR            0x800000
 138
 139 #define CONFIG_BOOTDELAY        5
 140 #define CONFIG_BOOTCOMMAND      "bootm ffe40000"
 141 #define CONFIG_SYS_MEMTEST_START        0x400
 142 #define CONFIG_SYS_MEMTEST_END          0x380000
 143
 144 #ifdef CONFIG_MCFFEC
 145 #       define CONFIG_NET_RETRY_COUNT   5
 146 #       define CONFIG_OVERWRITE_ETHADDR_ONCE
 147 #endif                          /* FEC_ENET */
 148
 149 #define CONFIG_EXTRA_ENV_SETTINGS               \
 150         "netdev=eth0\0"                         \
 151         "loadaddr=10000\0"                      \
 152         "uboot=u-boot.bin\0"                    \
 153         "load=tftp ${loadaddr} ${uboot}\0"      \
 154         "upd=run load; run prog\0"              \
 155         "prog=prot off ffe00000 ffe3ffff;"      \
 156         "era ffe00000 ffe3ffff;"                \
 157         "cp.b ${loadaddr} ffe00000 ${filesize};"\
 158         "save\0"                                \
 159         ""
 160
 161 #define CONFIG_SYS_HZ                   1000
 162 #define CONFIG_SYS_CLK                  150000000
 163
 164 /*
 165  * Low Level Configuration Settings
 166  * (address mappings, register initial values, etc.)
 167  * You should know what you are doing if you make changes here.
 168  */
 169
 170 #define CONFIG_SYS_MBAR         0x40000000
 171
 172 /*-----------------------------------------------------------------------
 173  * Definitions for initial stack pointer and data area (in DPRAM)
 174  */
 175 #define CONFIG_SYS_INIT_RAM_ADDR        0x20000000
 176 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000 /* Size of used area in internal SRAM */
 177 #define CONFIG_SYS_GBL_DATA_SIZE        1000    /* bytes reserved for initial data */
 178 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
 179 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 180
 181 /*-----------------------------------------------------------------------
 182  * Start addresses for the final memory configuration
 183  * (Set up by the startup code)
 184  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 185  */
 186 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 187 #define CONFIG_SYS_SDRAM_SIZE           16      /* SDRAM size in MB */
 188 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_CS0_BASE
 189
 190 #ifdef CONFIG_MONITOR_IS_IN_RAM
 191 #define CONFIG_SYS_MONITOR_BASE 0x20000
 192 #else
 193 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
 194 #endif
 195
 196 #define CONFIG_SYS_MONITOR_LEN          0x20000
 197 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
 198 #define CONFIG_SYS_BOOTPARAMS_LEN       64*1024
 199
 200 /*
 201  * For booting Linux, the board info and command line data
 202  * have to be in the first 8 MB of memory, since this is
 203  * the maximum mapped by the Linux kernel during initialization ??
 204  */
 205 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
 206 #define CONFIG_SYS_BOOTM_LEN            (CONFIG_SYS_SDRAM_SIZE << 20)
 207
 208 /*-----------------------------------------------------------------------
 209  * FLASH organization
 210  */
 211 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 212 #define CONFIG_SYS_MAX_FLASH_SECT       11      /* max number of sectors on one chip */
 213 #define CONFIG_SYS_FLASH_ERASE_TOUT     1000
 214
 215 #define CONFIG_SYS_FLASH_CFI            1
 216 #define CONFIG_FLASH_CFI_DRIVER 1
 217 #define CONFIG_SYS_FLASH_SIZE           0x200000
 218
 219 /*-----------------------------------------------------------------------
 220  * Cache Configuration
 221  */
 222 #define CONFIG_SYS_CACHELINE_SIZE       16
 223
 224 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 225                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 226 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 227                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 228 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINV | CF_CACR_INVI)
 229 #define CONFIG_SYS_CACHE_ACR0           (CONFIG_SYS_SDRAM_BASE | \
 230                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 231                                          CF_ACR_EN | CF_ACR_SM_ALL)
 232 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_CENB | CF_CACR_CINV | \
 233                                          CF_CACR_DISD | CF_CACR_INVI | \
 234                                          CF_CACR_CEIB | CF_CACR_DCM | \
 235                                          CF_CACR_EUSP)
 236
 237 /*-----------------------------------------------------------------------
 238  * Memory bank definitions
 239  */
 240 #define CONFIG_SYS_CS0_BASE             0xffe00000
 241 #define CONFIG_SYS_CS0_CTRL             0x00001980
 242 #define CONFIG_SYS_CS0_MASK             0x001F0001
 243
 244 #define CONFIG_SYS_CS1_BASE             0x30000000
 245 #define CONFIG_SYS_CS1_CTRL             0x00001900
 246 #define CONFIG_SYS_CS1_MASK             0x00070001
 247
 248 /*-----------------------------------------------------------------------
 249  * Port configuration
 250  */
 251 #define CONFIG_SYS_FECI2C               0x0FA0
 252
 253 #endif  /* _M5275EVB_H */