include/configs/MVBLUE.h

   1 /*
   2  * (C) Copyright 2001
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 #define MV_VERSION      "v0.2.0"
  29
  30 /* LED0 = Power , LED1 = Error , LED2-5 = error code, LED6-7=00 -->PPCBoot error */
  31 #define ERR_NONE                0
  32 #define ERR_ENV                 1
  33 #define ERR_BOOTM_BADMAGIC      2
  34 #define ERR_BOOTM_BADCRC        3
  35 #define ERR_BOOTM_GUNZIP        4
  36 #define ERR_BOOTP_TIMEOUT       5
  37 #define ERR_DHCP                6
  38 #define ERR_TFTP                7
  39 #define ERR_NOLAN               8
  40 #define ERR_LANDRV              9
  41
  42 #define CONFIG_BOARD_TYPES      1
  43 #define MVBLUE_BOARD_BOX        1
  44 #define MVBLUE_BOARD_LYNX       2
  45
  46 #define CONFIG_SYS_TEXT_BASE    0xFFF00000
  47 #define CONFIG_SYS_LDSCRIPT     "board/mvblue/u-boot.lds"
  48
  49 #if 0
  50 #define ERR_LED(code)   do { if (code) \
  51                 *(volatile char *)(0xff000003) = ( 3 | (code<<4) ) & 0xf3; \
  52         else \
  53                 *(volatile char *)(0xff000003) = ( 1 ); \
  54 } while(0)
  55 #else
  56 #define ERR_LED(code)
  57 #endif
  58
  59 #define CONFIG_MPC824X          1
  60 #define CONFIG_MPC8245          1
  61 #define CONFIG_MVBLUE           1
  62
  63 #define CONFIG_CLOCKS_IN_MHZ    1
  64
  65 #define CONFIG_BOARD_TYPES      1
  66
  67 #define CONFIG_CONS_INDEX       1
  68 #define CONFIG_BAUDRATE         115200
  69
  70 #define CONFIG_BOOTDELAY        3
  71 #define CONFIG_BOOT_RETRY_TIME  -1
  72
  73 #define CONFIG_AUTOBOOT_KEYED
  74 #define CONFIG_AUTOBOOT_PROMPT          \
  75         "autoboot in %d seconds (stop with 's')...\n", bootdelay
  76 #define CONFIG_AUTOBOOT_STOP_STR        "s"
  77 #define CONFIG_ZERO_BOOTDELAY_CHECK
  78 #define CONFIG_RESET_TO_RETRY           60
  79
  80
  81 /*
  82  * Command line configuration.
  83  */
  84
  85 #define CONFIG_CMD_ASKENV
  86 #define CONFIG_CMD_BOOTD
  87 #define CONFIG_CMD_CACHE
  88 #define CONFIG_CMD_DHCP
  89 #define CONFIG_CMD_ECHO
  90 #define CONFIG_CMD_SAVEENV
  91 #define CONFIG_CMD_FLASH
  92 #define CONFIG_CMD_IMI
  93 #define CONFIG_CMD_NET
  94 #define CONFIG_CMD_PCI
  95 #define CONFIG_CMD_RUN
  96
  97
  98 /*
  99  * BOOTP options
 100  */
 101 #define CONFIG_BOOTP_SUBNETMASK
 102 #define CONFIG_BOOTP_GATEWAY
 103 #define CONFIG_BOOTP_HOSTNAME
 104 #define CONFIG_BOOTP_BOOTPATH
 105 #define CONFIG_BOOTP_BOOTFILESIZE
 106 #define CONFIG_BOOTP_SUBNETMASK
 107 #define CONFIG_BOOTP_GATEWAY
 108 #define CONFIG_BOOTP_HOSTNAME
 109 #define CONFIG_BOOTP_NISDOMAIN
 110 #define CONFIG_BOOTP_BOOTPATH
 111 #define CONFIG_BOOTP_DNS
 112 #define CONFIG_BOOTP_DNS2
 113 #define CONFIG_BOOTP_SEND_HOSTNAME
 114 #define CONFIG_BOOTP_NTPSERVER
 115 #define CONFIG_BOOTP_TIMEOFFSET
 116
 117
 118 /*
 119  * Miscellaneous configurable options
 120  */
 121 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 122 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt       */
 123 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size      */
 124
 125 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 126 #define CONFIG_SYS_MAXARGS      16              /* Max number of command args   */
 127 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 128 #define CONFIG_SYS_LOAD_ADDR    0x00100000      /* Default load address                 */
 129
 130 #define CONFIG_BOOTCOMMAND      "run nfsboot"
 131 #define CONFIG_BOOTARGS                 "root=/dev/mtdblock5 ro rootfstype=jffs2"
 132
 133 #define CONFIG_NFSBOOTCOMMAND   "bootp; run nfsargs addcons;bootm"
 134
 135 #define CONFIG_EXTRA_ENV_SETTINGS                       \
 136         "console_nr=0\0"                                \
 137     "dhcp_client_id=mvBOX-XP\0"                         \
 138     "dhcp_vendor-class-identifier=mvBOX\0"              \
 139     "adminboot=setenv bootargs root=/dev/mtdblock5 rw rootfstype=jffs2;run addcons;bootm ffc00000\0"    \
 140     "flashboot=setenv bootargs root=/dev/mtdblock5 ro rootfstype=jffs2;run addcons;bootm ffc00000\0"    \
 141     "safeboot=setenv bootargs root=/dev/mtdblock2 rw rootfstype=cramfs;run addcons;bootm ffc00000\0"    \
 142     "hdboot=setenv bootargs root=/dev/hda1;run addcons;bootm ffc00000\0"        \
 143         "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "     \
 144                         "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0"   \
 145         "addcons=setenv bootargs ${bootargs} console=ttyS${console_nr},${baudrate}N8\0" \
 146     "mv_version=" MV_VERSION "\0"       \
 147         "bootretry=30\0"
 148
 149 #define CONFIG_OVERWRITE_ETHADDR_ONCE
 150
 151 /*-----------------------------------------------------------------------
 152  * PCI stuff
 153  *-----------------------------------------------------------------------
 154  */
 155
 156 #define CONFIG_PCI
 157 #define CONFIG_PCI_INDIRECT_BRIDGE
 158 #define CONFIG_PCI_PNP
 159 #define CONFIG_PCI_SCAN_SHOW
 160
 161 #define CONFIG_NET_RETRY_COUNT          5
 162
 163 #define CONFIG_TULIP
 164 #define CONFIG_TULIP_FIX_DAVICOM        1
 165 #define CONFIG_ETHADDR                  b6:b4:45:eb:fb:c0
 166
 167 #define CONFIG_HW_WATCHDOG
 168
 169 /*-----------------------------------------------------------------------
 170  * Start addresses for the final memory configuration
 171  * (Set up by the startup code)
 172  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 173  */
 174 #define CONFIG_SYS_SDRAM_BASE       0x00000000
 175
 176 #define CONFIG_SYS_FLASH_BASE      0xFFF00000
 177 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 178
 179 #define CONFIG_SYS_RESET_ADDRESS   0xFFF00100
 180 #define CONFIG_SYS_EUMB_ADDR        0xFC000000
 181
 182 #define CONFIG_SYS_MONITOR_LEN     0x00100000
 183 #define CONFIG_SYS_MALLOC_LEN      (512 << 10) /* Reserve some kB for malloc()  */
 184
 185 #define CONFIG_SYS_MEMTEST_START   0x00100000   /* memtest works on             */
 186 #define CONFIG_SYS_MEMTEST_END      0x00800000  /* 1M ... 8M in DRAM            */
 187
 188 /* Maximum amount of RAM.  */
 189 #define CONFIG_SYS_MAX_RAM_SIZE    0x10000000   /* 0 .. 256MB of (S)DRAM */
 190
 191
 192 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
 193 #undef CONFIG_SYS_RAMBOOT
 194 #else
 195 #define CONFIG_SYS_RAMBOOT
 196 #endif
 197
 198 #define CONFIG_SYS_ISA_IO      0xFE000000
 199
 200 /*
 201  * serial configuration
 202  */
 203 #define CONFIG_SYS_NS16550
 204 #define CONFIG_SYS_NS16550_SERIAL
 205
 206 #define CONFIG_SYS_NS16550_REG_SIZE    1
 207
 208 #define CONFIG_SYS_NS16550_CLK     get_bus_freq(0)
 209
 210 #define CONFIG_SYS_NS16550_COM1    (CONFIG_SYS_EUMB_ADDR + 0x4500)
 211 #define CONFIG_SYS_NS16550_COM2    (CONFIG_SYS_EUMB_ADDR + 0x4600)
 212
 213 /*-----------------------------------------------------------------------
 214  * Definitions for initial stack pointer and data area
 215  */
 216 #define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
 217 #define CONFIG_SYS_INIT_RAM_SIZE      0x1000
 218 #define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 219
 220 /*
 221  * Low Level Configuration Settings
 222  * (address mappings, register initial values, etc.)
 223  * You should know what you are doing if you make changes here.
 224  * For the detail description refer to the MPC8240 user's manual.
 225  */
 226
 227 #define CONFIG_SYS_CLK_FREQ  33000000
 228 #define CONFIG_SYS_HZ                    10000
 229
 230 /* Bit-field values for MCCR1.  */
 231 #define CONFIG_SYS_ROMNAL      7
 232 #define CONFIG_SYS_ROMFAL      11
 233
 234 /* Bit-field values for MCCR2.  */
 235 #define CONFIG_SYS_TSWAIT      0x5
 236 #define CONFIG_SYS_REFINT      430
 237
 238 /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.  */
 239 #define CONFIG_SYS_BSTOPRE     121
 240
 241 /* Bit-field values for MCCR3.  */
 242 #define CONFIG_SYS_REFREC      8
 243
 244 /* Bit-field values for MCCR4.  */
 245 #define CONFIG_SYS_PRETOACT    3
 246 #define CONFIG_SYS_ACTTOPRE    5
 247 #define CONFIG_SYS_ACTORW      3
 248 #define CONFIG_SYS_SDMODE_CAS_LAT  3
 249 #define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
 250 #define CONFIG_SYS_EXTROM      1
 251 #define CONFIG_SYS_REGDIMM     0
 252 #define CONFIG_SYS_DBUS_SIZE2  1
 253 #define CONFIG_SYS_SDMODE_WRAP 0
 254
 255 #define CONFIG_SYS_PGMAX       0x32
 256 #define CONFIG_SYS_SDRAM_DSCD  0x20
 257
 258 /* Memory bank settings.
 259  * Only bits 20-29 are actually used from these vales to set the
 260  * start/end addresses. The upper two bits will always be 0, and the lower
 261  * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
 262  * address. Refer to the MPC8240 book.
 263  */
 264
 265 #define CONFIG_SYS_BANK0_START      0x00000000
 266 #define CONFIG_SYS_BANK0_END        (CONFIG_SYS_MAX_RAM_SIZE - 1)
 267 #define CONFIG_SYS_BANK0_ENABLE    1
 268 #define CONFIG_SYS_BANK1_START     0x3ff00000
 269 #define CONFIG_SYS_BANK1_END       0x3fffffff
 270 #define CONFIG_SYS_BANK1_ENABLE    0
 271 #define CONFIG_SYS_BANK2_START     0x3ff00000
 272 #define CONFIG_SYS_BANK2_END       0x3fffffff
 273 #define CONFIG_SYS_BANK2_ENABLE    0
 274 #define CONFIG_SYS_BANK3_START     0x3ff00000
 275 #define CONFIG_SYS_BANK3_END       0x3fffffff
 276 #define CONFIG_SYS_BANK3_ENABLE    0
 277 #define CONFIG_SYS_BANK4_START     0x3ff00000
 278 #define CONFIG_SYS_BANK4_END       0x3fffffff
 279 #define CONFIG_SYS_BANK4_ENABLE    0
 280 #define CONFIG_SYS_BANK5_START     0x3ff00000
 281 #define CONFIG_SYS_BANK5_END       0x3fffffff
 282 #define CONFIG_SYS_BANK5_ENABLE    0
 283 #define CONFIG_SYS_BANK6_START     0x3ff00000
 284 #define CONFIG_SYS_BANK6_END       0x3fffffff
 285 #define CONFIG_SYS_BANK6_ENABLE    0
 286 #define CONFIG_SYS_BANK7_START     0x3ff00000
 287 #define CONFIG_SYS_BANK7_END       0x3fffffff
 288 #define CONFIG_SYS_BANK7_ENABLE    0
 289
 290 #define CONFIG_SYS_ODCR     0xff
 291
 292 #define CONFIG_SYS_IBAT0L  (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
 293 #define CONFIG_SYS_IBAT0U  (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
 294
 295 #define CONFIG_SYS_IBAT1L  (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
 296 #define CONFIG_SYS_IBAT1U  (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
 297
 298 #define CONFIG_SYS_IBAT2L  (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
 299 #define CONFIG_SYS_IBAT2U  (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 300
 301 #define CONFIG_SYS_IBAT3L  (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
 302 #define CONFIG_SYS_IBAT3U  (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 303
 304 #define CONFIG_SYS_DBAT0L  CONFIG_SYS_IBAT0L
 305 #define CONFIG_SYS_DBAT0U  CONFIG_SYS_IBAT0U
 306 #define CONFIG_SYS_DBAT1L  CONFIG_SYS_IBAT1L
 307 #define CONFIG_SYS_DBAT1U  CONFIG_SYS_IBAT1U
 308 #define CONFIG_SYS_DBAT2L  CONFIG_SYS_IBAT2L
 309 #define CONFIG_SYS_DBAT2U  CONFIG_SYS_IBAT2U
 310 #define CONFIG_SYS_DBAT3L  CONFIG_SYS_IBAT3L
 311 #define CONFIG_SYS_DBAT3U  CONFIG_SYS_IBAT3U
 312
 313 /*
 314  * For booting Linux, the board info and command line data
 315  * have to be in the first 8 MB of memory, since this is
 316  * the maximum mapped by the Linux kernel during initialization.
 317  */
 318 #define CONFIG_SYS_BOOTMAPSZ        (8 << 20)   /* Initial Memory map for Linux */
 319
 320 /*-----------------------------------------------------------------------
 321  * FLASH organization
 322  */
 323 #undef  CONFIG_SYS_FLASH_PROTECTION
 324 #define CONFIG_SYS_MAX_FLASH_BANKS              1       /* Max number of flash banks            */
 325 #define CONFIG_SYS_MAX_FLASH_SECT               63      /* Max number of sectors per flash      */
 326
 327 #define CONFIG_SYS_FLASH_ERASE_TOUT     12000
 328 #define CONFIG_SYS_FLASH_WRITE_TOUT     1000
 329
 330
 331 #define CONFIG_ENV_IS_IN_FLASH
 332
 333 #define CONFIG_ENV_OFFSET               0x00010000
 334 #define CONFIG_ENV_SIZE         0x00010000
 335 #define CONFIG_ENV_SECT_SIZE    0x00010000
 336
 337 /*-----------------------------------------------------------------------
 338  * Cache Configuration
 339  */
 340 #define CONFIG_SYS_CACHELINE_SIZE       32
 341 #if defined(CONFIG_CMD_KGDB)
 342 #define CONFIG_SYS_CACHELINE_SHIFT      5       /* log base 2 of the above value        */
 343 #endif
 344 #endif  /* __CONFIG_H */