include/configs/MigoR.h

   1 /*
   2  * Configuation settings for the Renesas Solutions Migo-R board
   3  *
   4  * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __MIGO_R_H
  10 #define __MIGO_R_H
  11
  12 #define CONFIG_CPU_SH7722       1
  13
  14 #define CONFIG_DISPLAY_BOARDINFO
  15 #undef  CONFIG_SHOW_BOOT_PROGRESS
  16
  17 /* SMC9111 */
  18 #define CONFIG_SMC91111
  19 #define CONFIG_SMC91111_BASE    (0xB0000000)
  20
  21 /* MEMORY */
  22 #define MIGO_R_SDRAM_BASE       (0x8C000000)
  23 #define MIGO_R_FLASH_BASE_1     (0xA0000000)
  24 #define MIGO_R_FLASH_BANK_SIZE  (64 * 1024 * 1024)
  25
  26 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
  27 #define CONFIG_SYS_PBSIZE               256             /* Buffer size for Console output */
  28 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }      /* List of legal baudrate settings for this board */
  29
  30 /* SCIF */
  31 #define CONFIG_CONS_SCIF0       1
  32
  33 #define CONFIG_SYS_MEMTEST_START        (MIGO_R_SDRAM_BASE)
  34 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
  35
  36 /* Enable alternate, more extensive, memory test */
  37 #undef  CONFIG_SYS_ALT_MEMTEST
  38 /* Scratch address used by the alternate memory test */
  39 #undef  CONFIG_SYS_MEMTEST_SCRATCH
  40
  41 /* Enable temporary baudrate change while serial download */
  42 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  43
  44 #define CONFIG_SYS_SDRAM_BASE   (MIGO_R_SDRAM_BASE)
  45 /* maybe more, but if so u-boot doesn't know about it... */
  46 #define CONFIG_SYS_SDRAM_SIZE   (64 * 1024 * 1024)
  47 /* default load address for scripts ?!? */
  48 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
  49
  50 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
  51 #define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
  52 /* Monitor size */
  53 #define CONFIG_SYS_MONITOR_LEN  (128 * 1024)
  54 /* Size of DRAM reserved for malloc() use */
  55 #define CONFIG_SYS_MALLOC_LEN   (256 * 1024)
  56 #define CONFIG_SYS_BOOTMAPSZ    (8 * 1024 * 1024)
  57
  58 /* FLASH */
  59 #define CONFIG_SYS_FLASH_CFI
  60 #define CONFIG_FLASH_CFI_DRIVER
  61 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  62 /* print 'E' for empty sector on flinfo */
  63 #define CONFIG_SYS_FLASH_EMPTY_INFO
  64 /* Physical start address of Flash memory */
  65 #define CONFIG_SYS_FLASH_BASE   (MIGO_R_FLASH_BASE_1)
  66 /* Max number of sectors on each Flash chip */
  67 #define CONFIG_SYS_MAX_FLASH_SECT       512
  68
  69 /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
  70 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  71 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
  72
  73 /* Timeout for Flash erase operations (in ms) */
  74 #define CONFIG_SYS_FLASH_ERASE_TOUT     (3 * 1000)
  75 /* Timeout for Flash write operations (in ms) */
  76 #define CONFIG_SYS_FLASH_WRITE_TOUT     (3 * 1000)
  77 /* Timeout for Flash set sector lock bit operations (in ms) */
  78 #define CONFIG_SYS_FLASH_LOCK_TOUT      (3 * 1000)
  79 /* Timeout for Flash clear lock bit operations (in ms) */
  80 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (3 * 1000)
  81
  82 /* Use hardware flash sectors protection instead of U-Boot software protection */
  83 #undef  CONFIG_SYS_FLASH_PROTECTION
  84 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
  85
  86 /* ENV setting */
  87 #define CONFIG_ENV_OVERWRITE    1
  88 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
  89 #define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
  90 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
  91 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
  92 #define CONFIG_ENV_OFFSET               (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
  93 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SECT_SIZE)
  94
  95 /* Board Clock */
  96 #define CONFIG_SYS_CLK_FREQ     33333333
  97 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  98 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  99 #define CONFIG_SYS_TMU_CLK_DIV          (4)     /* 4 (default), 16, 64, 256 or 1024 */
 100
 101 #endif  /* __MIGO_R_H */