include/configs/PIP405.h

   1 /*
   2  * (C) Copyright 2001
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * board/config.h - configuration options, board specific
  10  */
  11
  12 #ifndef __CONFIG_H
  13 #define __CONFIG_H
  14
  15 /***********************************************************
  16  * High Level Configuration Options
  17  * (easy to change)
  18  ***********************************************************/
  19 #define CONFIG_405GP            1       /* This is a PPC405 CPU         */
  20 #define CONFIG_PIP405           1       /* ...on a PIP405 board         */
  21
  22 #define CONFIG_SYS_TEXT_BASE    0xFFF80000
  23
  24
  25 /***********************************************************
  26  * Clock
  27  ***********************************************************/
  28 #define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
  29
  30
  31 /*
  32  * BOOTP options
  33  */
  34 #define CONFIG_BOOTP_BOOTFILESIZE
  35 #define CONFIG_BOOTP_BOOTPATH
  36 #define CONFIG_BOOTP_GATEWAY
  37 #define CONFIG_BOOTP_HOSTNAME
  38
  39
  40 /*
  41  * Command line configuration.
  42  */
  43 #define CONFIG_CMD_IDE
  44 #define CONFIG_CMD_DHCP
  45 #define CONFIG_CMD_PCI
  46 #define CONFIG_CMD_CACHE
  47 #define CONFIG_CMD_IRQ
  48 #define CONFIG_CMD_EEPROM
  49 #define CONFIG_CMD_I2C
  50 #define CONFIG_CMD_REGINFO
  51 #define CONFIG_CMD_FDC
  52 #define CONFIG_CMD_SCSI
  53 #define CONFIG_CMD_FAT
  54 #define CONFIG_CMD_DATE
  55 #define CONFIG_CMD_USB
  56 #define CONFIG_CMD_MII
  57 #define CONFIG_CMD_SDRAM
  58 #define CONFIG_CMD_PING
  59 #define CONFIG_CMD_SAVES
  60 #define CONFIG_CMD_BSP
  61
  62 #define  CONFIG_SYS_HUSH_PARSER
  63 /**************************************************************
  64  * I2C Stuff:
  65  * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address
  66  * 0x53.
  67  * Caution: on the same bus is the SPD (Serial Presens Detect
  68  * EEPROM of the SDRAM
  69  * The Atmel EEPROM uses 16Bit addressing.
  70  ***************************************************************/
  71 #define CONFIG_SYS_I2C
  72 #define CONFIG_SYS_I2C_PPC4XX
  73 #define CONFIG_SYS_I2C_PPC4XX_CH0
  74 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           50000
  75 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0           0x7F
  76
  77 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x53
  78 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  79 #define CONFIG_ENV_IS_IN_EEPROM    1       /* use EEPROM for environment vars */
  80 #define CONFIG_ENV_OFFSET          0x000   /* environment starts at the beginning of the EEPROM */
  81 #define CONFIG_ENV_SIZE            0x800   /* 2 kBytes may be used for env vars */
  82
  83 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  84 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6     /* The Atmel 24C128/256 has     */
  85                                         /* 64 byte page write mode using*/
  86                                         /* last 6 bits of the address   */
  87 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* and takes up to 10 msec */
  88
  89
  90 /***************************************************************
  91  * Definitions for Serial Presence Detect EEPROM address
  92  * (to get SDRAM settings)
  93  ***************************************************************/
  94 #define SPD_EEPROM_ADDRESS      0x50
  95
  96 #define CONFIG_BOARD_EARLY_INIT_F
  97 #define CONFIG_BOARD_EARLY_INIT_R
  98
  99 /**************************************************************
 100  * Environment definitions
 101  **************************************************************/
 102 #define CONFIG_BAUDRATE         9600    /* STD Baudrate */
 103
 104
 105 #define CONFIG_BOOTDELAY        5
 106 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 107 /* #define CONFIG_BOOT_RETRY_TIME       -10     /XXX* feature is available but not enabled */
 108 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check console even if bootdelay = 0 */
 109
 110
 111 #define CONFIG_BOOTCOMMAND      "diskboot 400000 0:1; bootm" /* autoboot command                */
 112 #define CONFIG_BOOTARGS         "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
 113
 114 #define CONFIG_IPADDR           10.0.0.100
 115 #define CONFIG_SERVERIP         10.0.0.1
 116 #define CONFIG_PREBOOT
 117 /***************************************************************
 118  * defines if the console is stored in the environment
 119  ***************************************************************/
 120 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    /* stdin, stdout and stderr are in evironment */
 121 /***************************************************************
 122  * defines if an overwrite_console function exists
 123  *************************************************************/
 124 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 125 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 126 /***************************************************************
 127  * defines if the overwrite_console should be stored in the
 128  * environment
 129  **************************************************************/
 130 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 131
 132 /**************************************************************
 133  * loads config
 134  *************************************************************/
 135 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 136 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 137
 138 #define CONFIG_MISC_INIT_R
 139 /***********************************************************
 140  * Miscellaneous configurable options
 141  **********************************************************/
 142 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 143 #if defined(CONFIG_CMD_KGDB)
 144 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size      */
 145 #else
 146 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size      */
 147 #endif
 148 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 149 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 150 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 151
 152 #define CONFIG_SYS_MEMTEST_START        0x0100000       /* memtest works on     */
 153 #define CONFIG_SYS_MEMTEST_END          0x0C00000       /* 1 ... 12 MB in DRAM  */
 154
 155 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
 156 #define CONFIG_SYS_NS16550
 157 #define CONFIG_SYS_NS16550_SERIAL
 158 #define CONFIG_SYS_NS16550_REG_SIZE     1
 159 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 160
 161 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK            /* no external serial clock used */
 162 #define CONFIG_SYS_BASE_BAUD       691200
 163
 164 /* The following table includes the supported baudrates */
 165 #define CONFIG_SYS_BAUDRATE_TABLE       \
 166         { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
 167          57600, 115200, 230400, 460800, 921600 }
 168
 169 #define CONFIG_SYS_LOAD_ADDR            0x400000        /* default load address */
 170 #define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_into (bd_t) */
 171
 172 /*-----------------------------------------------------------------------
 173  * PCI stuff
 174  *-----------------------------------------------------------------------
 175  */
 176 #define PCI_HOST_ADAPTER 0              /* configure ar pci adapter     */
 177 #define PCI_HOST_FORCE  1               /* configure as pci host        */
 178 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 179
 180 #define CONFIG_PCI                      /* include pci support          */
 181 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 182 #define CONFIG_PCI_HOST PCI_HOST_FORCE  /* configure as pci-host        */
 183 #define CONFIG_PCI_PNP                  /* pci plug-and-play            */
 184                                         /* resource configuration       */
 185 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000   /* PCI Vendor ID: to-do!!!      */
 186 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000   /* PCI Device ID: to-do!!!      */
 187 #define CONFIG_SYS_PCI_PTM1LA   0x00000000      /* point to sdram               */
 188 #define CONFIG_SYS_PCI_PTM1MS   0x80000001      /* 2GB, enable hard-wired to 1  */
 189 #define CONFIG_SYS_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 190 #define CONFIG_SYS_PCI_PTM2LA   0x00000000      /* disabled                     */
 191 #define CONFIG_SYS_PCI_PTM2MS   0x00000000      /* disabled                     */
 192 #define CONFIG_SYS_PCI_PTM2PCI 0x00000000      /* Host: use this pci address   */
 193
 194 /*-----------------------------------------------------------------------
 195  * Start addresses for the final memory configuration
 196  * (Set up by the startup code)
 197  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 198  */
 199 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 200 #define CONFIG_SYS_FLASH_BASE           0xFFF80000
 201 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
 202 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 kB for Monitor   */
 203 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserve 1024 kB for malloc() */
 204
 205 /*
 206  * For booting Linux, the board info and command line data
 207  * have to be in the first 8 MB of memory, since this is
 208  * the maximum mapped by the Linux kernel during initialization.
 209  */
 210 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 211 /*-----------------------------------------------------------------------
 212  * FLASH organization
 213  */
 214 #define CONFIG_SYS_UPDATE_FLASH_SIZE
 215 #define CONFIG_SYS_FLASH_PROTECTION
 216 #define CONFIG_SYS_FLASH_EMPTY_INFO
 217
 218 #define CONFIG_SYS_FLASH_CFI
 219 #define CONFIG_FLASH_CFI_DRIVER
 220
 221 #define CONFIG_FLASH_SHOW_PROGRESS      45
 222
 223 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 224 #define CONFIG_SYS_MAX_FLASH_SECT       256
 225
 226 /*
 227  * Init Memory Controller:
 228  */
 229 #define FLASH_MAX_SIZE          0x00800000              /* 8MByte max */
 230 #define FLASH_BASE_PRELIM       0xFF800000  /* open the flash CS */
 231 /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
 232 #define FLASH_SIZE_PRELIM        3  /* maximal flash FLASH size bank #0 */
 233
 234 #define CONFIG_BOARD_EARLY_INIT_F
 235
 236 /* Configuration Port location */
 237 #define CONFIG_PORT_ADDR        0xF4000000
 238 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
 239
 240
 241 /*-----------------------------------------------------------------------
 242  * Definitions for initial stack pointer and data area (in On Chip SRAM)
 243  */
 244 #define CONFIG_SYS_TEMP_STACK_OCM       1
 245 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 246 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 247 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
 248 #define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_OCM_DATA_SIZE        /* Size of On Chip SRAM        */
 249 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 250 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 251
 252 /***********************************************************************
 253  * External peripheral base address
 254  ***********************************************************************/
 255 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000
 256
 257 /***********************************************************************
 258  * Last Stage Init
 259  ***********************************************************************/
 260 #define CONFIG_LAST_STAGE_INIT
 261 /************************************************************
 262  * Ethernet Stuff
 263  ***********************************************************/
 264 #define CONFIG_PPC4xx_EMAC
 265 #define CONFIG_MII              1       /* MII PHY management           */
 266 #define CONFIG_PHY_ADDR         1       /* PHY address                  */
 267 /************************************************************
 268  * RTC
 269  ***********************************************************/
 270 #define CONFIG_RTC_MC146818
 271 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 272
 273 /************************************************************
 274  * IDE/ATA stuff
 275  ************************************************************/
 276 #define CONFIG_SYS_IDE_MAXBUS           2   /* max. 2 IDE busses        */
 277 #define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
 278
 279 #define CONFIG_SYS_ATA_BASE_ADDR        CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */
 280 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x01F0  /* ide0 offste */
 281 #define CONFIG_SYS_ATA_IDE1_OFFSET      0x0170  /* ide1 offset */
 282 #define CONFIG_SYS_ATA_DATA_OFFSET      0       /* data reg offset      */
 283 #define CONFIG_SYS_ATA_REG_OFFSET       0       /* reg offset */
 284 #define CONFIG_SYS_ATA_ALT_OFFSET       0x200   /* alternate register offset */
 285
 286 #undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 287 #undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 288 #define CONFIG_IDE_RESET                /* reset for ide supported...   */
 289 #define CONFIG_IDE_RESET_ROUTINE        /* with a special reset function */
 290 #define CONFIG_SUPPORT_VFAT
 291
 292 /************************************************************
 293  * ATAPI support (experimental)
 294  ************************************************************/
 295 #define CONFIG_ATAPI                    /* enable ATAPI Support */
 296
 297 /************************************************************
 298  * SCSI support (experimental) only SYM53C8xx supported
 299  ************************************************************/
 300 #define CONFIG_SCSI_SYM53C8XX
 301 #define CONFIG_SYS_SCSI_MAX_LUN 8       /* number of supported LUNs */
 302 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     7       /* maximum SCSI ID (0..6) */
 303 #define CONFIG_SYS_SCSI_MAX_DEVICE      CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
 304 #define CONFIG_SYS_SCSI_SPIN_UP_TIME    2
 305
 306 /************************************************************
 307  * Disk-On-Chip configuration
 308  ************************************************************/
 309 #define CONFIG_SYS_MAX_DOC_DEVICE       1       /* Max number of DOC devices            */
 310 #define CONFIG_SYS_DOC_SHORT_TIMEOUT
 311 #define CONFIG_SYS_DOC_SUPPORT_2000
 312 #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
 313
 314 /************************************************************
 315  * DISK Partition support
 316  ************************************************************/
 317 #define CONFIG_DOS_PARTITION
 318 #define CONFIG_MAC_PARTITION
 319 #define CONFIG_ISO_PARTITION /* Experimental */
 320
 321 /************************************************************
 322  * Keyboard support
 323  ************************************************************/
 324 #define CONFIG_ISA_KEYBOARD
 325
 326 /************************************************************
 327  * Video support
 328  ************************************************************/
 329 #define CONFIG_VIDEO                    /*To enable video controller support */
 330 #define CONFIG_VIDEO_CT69000
 331 #define CONFIG_CFB_CONSOLE
 332 #define CONFIG_VIDEO_LOGO
 333 #define CONFIG_CONSOLE_EXTRA_INFO
 334 #define CONFIG_VGA_AS_SINGLE_DEVICE
 335 #define CONFIG_VIDEO_SW_CURSOR
 336 #define CONFIG_VIDEO_ONBOARD            /* Video controller is on-board */
 337
 338 /************************************************************
 339  * USB support
 340  ************************************************************/
 341 #define CONFIG_USB_UHCI
 342 #define CONFIG_USB_KEYBOARD
 343 #define CONFIG_USB_STORAGE
 344
 345 /* Enable needed helper functions */
 346 #define CONFIG_SYS_STDIO_DEREGISTER             /* needs stdio_deregister */
 347
 348 /************************************************************
 349  * Debug support
 350  ************************************************************/
 351 #if defined(CONFIG_CMD_KGDB)
 352 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 353 #endif
 354
 355 /************************************************************
 356  * support BZIP2 compression
 357  ************************************************************/
 358 #define CONFIG_BZIP2            1
 359
 360 /************************************************************
 361  * Ident
 362  ************************************************************/
 363 #define VERSION_TAG "released"
 364 #define CONFIG_ISO_STRING "MEV-10066-001"
 365 #define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
 366
 367
 368 #endif  /* __CONFIG_H */