include/configs/PIP405.h

   1 /*
   2  * (C) Copyright 2001
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * board/config.h - configuration options, board specific
  10  */
  11
  12 #ifndef __CONFIG_H
  13 #define __CONFIG_H
  14
  15 /***********************************************************
  16  * High Level Configuration Options
  17  * (easy to change)
  18  ***********************************************************/
  19 #define CONFIG_405GP            1       /* This is a PPC405 CPU         */
  20 #define CONFIG_PIP405           1       /* ...on a PIP405 board         */
  21
  22 #define CONFIG_SYS_TEXT_BASE    0xFFF80000
  23
  24
  25 /***********************************************************
  26  * Clock
  27  ***********************************************************/
  28 #define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
  29
  30
  31 /*
  32  * BOOTP options
  33  */
  34 #define CONFIG_BOOTP_BOOTFILESIZE
  35 #define CONFIG_BOOTP_BOOTPATH
  36 #define CONFIG_BOOTP_GATEWAY
  37 #define CONFIG_BOOTP_HOSTNAME
  38
  39
  40 /*
  41  * Command line configuration.
  42  */
  43 #define CONFIG_CMD_IDE
  44 #define CONFIG_CMD_DHCP
  45 #define CONFIG_CMD_PCI
  46 #define CONFIG_CMD_CACHE
  47 #define CONFIG_CMD_IRQ
  48 #define CONFIG_CMD_EEPROM
  49 #define CONFIG_CMD_I2C
  50 #define CONFIG_CMD_REGINFO
  51 #define CONFIG_CMD_FDC
  52 #define CONFIG_CMD_SCSI
  53 #define CONFIG_CMD_FAT
  54 #define CONFIG_CMD_DATE
  55 #define CONFIG_CMD_USB
  56 #define CONFIG_CMD_MII
  57 #define CONFIG_CMD_SDRAM
  58 #define CONFIG_CMD_PING
  59 #define CONFIG_CMD_SAVES
  60 #define CONFIG_CMD_BSP
  61
  62 /**************************************************************
  63  * I2C Stuff:
  64  * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address
  65  * 0x53.
  66  * Caution: on the same bus is the SPD (Serial Presens Detect
  67  * EEPROM of the SDRAM
  68  * The Atmel EEPROM uses 16Bit addressing.
  69  ***************************************************************/
  70 #define CONFIG_SYS_I2C
  71 #define CONFIG_SYS_I2C_PPC4XX
  72 #define CONFIG_SYS_I2C_PPC4XX_CH0
  73 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           50000
  74 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0           0x7F
  75
  76 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x53
  77 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  78 #define CONFIG_ENV_IS_IN_EEPROM    1       /* use EEPROM for environment vars */
  79 #define CONFIG_ENV_OFFSET          0x000   /* environment starts at the beginning of the EEPROM */
  80 #define CONFIG_ENV_SIZE            0x800   /* 2 kBytes may be used for env vars */
  81
  82 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  83 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6     /* The Atmel 24C128/256 has     */
  84                                         /* 64 byte page write mode using*/
  85                                         /* last 6 bits of the address   */
  86 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* and takes up to 10 msec */
  87
  88
  89 /***************************************************************
  90  * Definitions for Serial Presence Detect EEPROM address
  91  * (to get SDRAM settings)
  92  ***************************************************************/
  93 #define SPD_EEPROM_ADDRESS      0x50
  94
  95 #define CONFIG_BOARD_EARLY_INIT_F
  96 #define CONFIG_BOARD_EARLY_INIT_R
  97
  98 /**************************************************************
  99  * Environment definitions
 100  **************************************************************/
 101 #define CONFIG_BAUDRATE         9600    /* STD Baudrate */
 102
 103
 104 #define CONFIG_BOOTDELAY        5
 105 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 106 /* #define CONFIG_BOOT_RETRY_TIME       -10     /XXX* feature is available but not enabled */
 107 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check console even if bootdelay = 0 */
 108
 109
 110 #define CONFIG_BOOTCOMMAND      "diskboot 400000 0:1; bootm" /* autoboot command                */
 111 #define CONFIG_BOOTARGS         "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
 112
 113 #define CONFIG_IPADDR           10.0.0.100
 114 #define CONFIG_SERVERIP         10.0.0.1
 115 #define CONFIG_PREBOOT
 116 /***************************************************************
 117  * defines if the console is stored in the environment
 118  ***************************************************************/
 119 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    /* stdin, stdout and stderr are in evironment */
 120 /***************************************************************
 121  * defines if an overwrite_console function exists
 122  *************************************************************/
 123 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 124 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 125 /***************************************************************
 126  * defines if the overwrite_console should be stored in the
 127  * environment
 128  **************************************************************/
 129 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 130
 131 /**************************************************************
 132  * loads config
 133  *************************************************************/
 134 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 135 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 136
 137 #define CONFIG_MISC_INIT_R
 138 /***********************************************************
 139  * Miscellaneous configurable options
 140  **********************************************************/
 141 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 142 #if defined(CONFIG_CMD_KGDB)
 143 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size      */
 144 #else
 145 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size      */
 146 #endif
 147 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 148 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 149 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 150
 151 #define CONFIG_SYS_MEMTEST_START        0x0100000       /* memtest works on     */
 152 #define CONFIG_SYS_MEMTEST_END          0x0C00000       /* 1 ... 12 MB in DRAM  */
 153
 154 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
 155 #define CONFIG_SYS_NS16550_SERIAL
 156 #define CONFIG_SYS_NS16550_REG_SIZE     1
 157 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 158
 159 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK            /* no external serial clock used */
 160 #define CONFIG_SYS_BASE_BAUD       691200
 161
 162 /* The following table includes the supported baudrates */
 163 #define CONFIG_SYS_BAUDRATE_TABLE       \
 164         { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
 165          57600, 115200, 230400, 460800, 921600 }
 166
 167 #define CONFIG_SYS_LOAD_ADDR            0x400000        /* default load address */
 168 #define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_into (bd_t) */
 169
 170 /*-----------------------------------------------------------------------
 171  * PCI stuff
 172  *-----------------------------------------------------------------------
 173  */
 174 #define PCI_HOST_ADAPTER 0              /* configure ar pci adapter     */
 175 #define PCI_HOST_FORCE  1               /* configure as pci host        */
 176 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 177
 178 #define CONFIG_PCI                      /* include pci support          */
 179 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 180 #define CONFIG_PCI_HOST PCI_HOST_FORCE  /* configure as pci-host        */
 181 #define CONFIG_PCI_PNP                  /* pci plug-and-play            */
 182                                         /* resource configuration       */
 183 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000   /* PCI Vendor ID: to-do!!!      */
 184 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000   /* PCI Device ID: to-do!!!      */
 185 #define CONFIG_SYS_PCI_PTM1LA   0x00000000      /* point to sdram               */
 186 #define CONFIG_SYS_PCI_PTM1MS   0x80000001      /* 2GB, enable hard-wired to 1  */
 187 #define CONFIG_SYS_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 188 #define CONFIG_SYS_PCI_PTM2LA   0x00000000      /* disabled                     */
 189 #define CONFIG_SYS_PCI_PTM2MS   0x00000000      /* disabled                     */
 190 #define CONFIG_SYS_PCI_PTM2PCI 0x00000000      /* Host: use this pci address   */
 191
 192 /*-----------------------------------------------------------------------
 193  * Start addresses for the final memory configuration
 194  * (Set up by the startup code)
 195  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 196  */
 197 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 198 #define CONFIG_SYS_FLASH_BASE           0xFFF80000
 199 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
 200 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 kB for Monitor   */
 201 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserve 1024 kB for malloc() */
 202
 203 /*
 204  * For booting Linux, the board info and command line data
 205  * have to be in the first 8 MB of memory, since this is
 206  * the maximum mapped by the Linux kernel during initialization.
 207  */
 208 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 209 /*-----------------------------------------------------------------------
 210  * FLASH organization
 211  */
 212 #define CONFIG_SYS_UPDATE_FLASH_SIZE
 213 #define CONFIG_SYS_FLASH_PROTECTION
 214 #define CONFIG_SYS_FLASH_EMPTY_INFO
 215
 216 #define CONFIG_SYS_FLASH_CFI
 217 #define CONFIG_FLASH_CFI_DRIVER
 218
 219 #define CONFIG_FLASH_SHOW_PROGRESS      45
 220
 221 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 222 #define CONFIG_SYS_MAX_FLASH_SECT       256
 223
 224 /*
 225  * Init Memory Controller:
 226  */
 227 #define FLASH_MAX_SIZE          0x00800000              /* 8MByte max */
 228 #define FLASH_BASE_PRELIM       0xFF800000  /* open the flash CS */
 229 /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
 230 #define FLASH_SIZE_PRELIM        3  /* maximal flash FLASH size bank #0 */
 231
 232 #define CONFIG_BOARD_EARLY_INIT_F
 233
 234 /* Configuration Port location */
 235 #define CONFIG_PORT_ADDR        0xF4000000
 236 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
 237
 238
 239 /*-----------------------------------------------------------------------
 240  * Definitions for initial stack pointer and data area (in On Chip SRAM)
 241  */
 242 #define CONFIG_SYS_TEMP_STACK_OCM       1
 243 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 244 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 245 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
 246 #define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_OCM_DATA_SIZE        /* Size of On Chip SRAM        */
 247 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 248 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 249
 250 /***********************************************************************
 251  * External peripheral base address
 252  ***********************************************************************/
 253 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000
 254
 255 /***********************************************************************
 256  * Last Stage Init
 257  ***********************************************************************/
 258 #define CONFIG_LAST_STAGE_INIT
 259 /************************************************************
 260  * Ethernet Stuff
 261  ***********************************************************/
 262 #define CONFIG_PPC4xx_EMAC
 263 #define CONFIG_MII              1       /* MII PHY management           */
 264 #define CONFIG_PHY_ADDR         1       /* PHY address                  */
 265 /************************************************************
 266  * RTC
 267  ***********************************************************/
 268 #define CONFIG_RTC_MC146818
 269 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 270
 271 /************************************************************
 272  * IDE/ATA stuff
 273  ************************************************************/
 274 #define CONFIG_SYS_IDE_MAXBUS           2   /* max. 2 IDE busses        */
 275 #define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
 276
 277 #define CONFIG_SYS_ATA_BASE_ADDR        CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */
 278 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x01F0  /* ide0 offste */
 279 #define CONFIG_SYS_ATA_IDE1_OFFSET      0x0170  /* ide1 offset */
 280 #define CONFIG_SYS_ATA_DATA_OFFSET      0       /* data reg offset      */
 281 #define CONFIG_SYS_ATA_REG_OFFSET       0       /* reg offset */
 282 #define CONFIG_SYS_ATA_ALT_OFFSET       0x200   /* alternate register offset */
 283
 284 #undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 285 #undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 286 #define CONFIG_IDE_RESET                /* reset for ide supported...   */
 287 #define CONFIG_IDE_RESET_ROUTINE        /* with a special reset function */
 288 #define CONFIG_SUPPORT_VFAT
 289
 290 /************************************************************
 291  * ATAPI support (experimental)
 292  ************************************************************/
 293 #define CONFIG_ATAPI                    /* enable ATAPI Support */
 294
 295 /************************************************************
 296  * SCSI support (experimental) only SYM53C8xx supported
 297  ************************************************************/
 298 #define CONFIG_SCSI_SYM53C8XX
 299 #define CONFIG_SYS_SCSI_MAX_LUN 8       /* number of supported LUNs */
 300 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     7       /* maximum SCSI ID (0..6) */
 301 #define CONFIG_SYS_SCSI_MAX_DEVICE      CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
 302 #define CONFIG_SYS_SCSI_SPIN_UP_TIME    2
 303
 304 /************************************************************
 305  * Disk-On-Chip configuration
 306  ************************************************************/
 307 #define CONFIG_SYS_MAX_DOC_DEVICE       1       /* Max number of DOC devices            */
 308 #define CONFIG_SYS_DOC_SHORT_TIMEOUT
 309 #define CONFIG_SYS_DOC_SUPPORT_2000
 310 #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
 311
 312 /************************************************************
 313  * DISK Partition support
 314  ************************************************************/
 315 #define CONFIG_DOS_PARTITION
 316 #define CONFIG_MAC_PARTITION
 317 #define CONFIG_ISO_PARTITION /* Experimental */
 318
 319 /************************************************************
 320  * Video support
 321  ************************************************************/
 322 #define CONFIG_VIDEO                    /*To enable video controller support */
 323 #define CONFIG_VIDEO_CT69000
 324 #define CONFIG_CFB_CONSOLE
 325 #define CONFIG_VIDEO_LOGO
 326 #define CONFIG_CONSOLE_EXTRA_INFO
 327 #define CONFIG_VGA_AS_SINGLE_DEVICE
 328 #define CONFIG_VIDEO_SW_CURSOR
 329 #define CONFIG_VIDEO_ONBOARD            /* Video controller is on-board */
 330
 331 /************************************************************
 332  * USB support
 333  ************************************************************/
 334 #define CONFIG_USB_UHCI
 335 #define CONFIG_USB_KEYBOARD
 336 #define CONFIG_USB_STORAGE
 337
 338 /* Enable needed helper functions */
 339 #define CONFIG_SYS_STDIO_DEREGISTER             /* needs stdio_deregister */
 340
 341 /************************************************************
 342  * Debug support
 343  ************************************************************/
 344 #if defined(CONFIG_CMD_KGDB)
 345 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 346 #endif
 347
 348 /************************************************************
 349  * support BZIP2 compression
 350  ************************************************************/
 351 #define CONFIG_BZIP2            1
 352
 353 /************************************************************
 354  * Ident
 355  ************************************************************/
 356 #define VERSION_TAG "released"
 357 #define CONFIG_ISO_STRING "MEV-10066-001"
 358 #define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
 359
 360
 361 #endif  /* __CONFIG_H */