include/configs/PIP405.h

   1 /*
   2  * (C) Copyright 2001
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * board/config.h - configuration options, board specific
  10  */
  11
  12 #ifndef __CONFIG_H
  13 #define __CONFIG_H
  14
  15 /***********************************************************
  16  * High Level Configuration Options
  17  * (easy to change)
  18  ***********************************************************/
  19 #define CONFIG_405GP            1       /* This is a PPC405 CPU         */
  20 #define CONFIG_4xx              1       /* ...member of PPC4xx family   */
  21 #define CONFIG_PIP405           1       /* ...on a PIP405 board         */
  22
  23 #define CONFIG_SYS_TEXT_BASE    0xFFF80000
  24
  25 /***********************************************************
  26  * Clock
  27  ***********************************************************/
  28 #define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
  29
  30
  31 /*
  32  * BOOTP options
  33  */
  34 #define CONFIG_BOOTP_BOOTFILESIZE
  35 #define CONFIG_BOOTP_BOOTPATH
  36 #define CONFIG_BOOTP_GATEWAY
  37 #define CONFIG_BOOTP_HOSTNAME
  38
  39
  40 /*
  41  * Command line configuration.
  42  */
  43 #include <config_cmd_default.h>
  44
  45 #define CONFIG_CMD_IDE
  46 #define CONFIG_CMD_DHCP
  47 #define CONFIG_CMD_PCI
  48 #define CONFIG_CMD_CACHE
  49 #define CONFIG_CMD_IRQ
  50 #define CONFIG_CMD_EEPROM
  51 #define CONFIG_CMD_I2C
  52 #define CONFIG_CMD_REGINFO
  53 #define CONFIG_CMD_FDC
  54 #define CONFIG_CMD_SCSI
  55 #define CONFIG_CMD_FAT
  56 #define CONFIG_CMD_DATE
  57 #define CONFIG_CMD_ELF
  58 #define CONFIG_CMD_USB
  59 #define CONFIG_CMD_MII
  60 #define CONFIG_CMD_SDRAM
  61 #define CONFIG_CMD_PING
  62 #define CONFIG_CMD_SAVES
  63 #define CONFIG_CMD_BSP
  64
  65 #define  CONFIG_SYS_HUSH_PARSER
  66 /**************************************************************
  67  * I2C Stuff:
  68  * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address
  69  * 0x53.
  70  * Caution: on the same bus is the SPD (Serial Presens Detect
  71  * EEPROM of the SDRAM
  72  * The Atmel EEPROM uses 16Bit addressing.
  73  ***************************************************************/
  74 #define CONFIG_SYS_I2C
  75 #define CONFIG_SYS_I2C_PPC4XX
  76 #define CONFIG_SYS_I2C_PPC4XX_CH0
  77 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           50000
  78 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0           0x7F
  79
  80 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x53
  81 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  82 #define CONFIG_ENV_IS_IN_EEPROM    1       /* use EEPROM for environment vars */
  83 #define CONFIG_ENV_OFFSET          0x000   /* environment starts at the beginning of the EEPROM */
  84 #define CONFIG_ENV_SIZE            0x800   /* 2 kBytes may be used for env vars */
  85
  86 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  87 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6     /* The Atmel 24C128/256 has     */
  88                                         /* 64 byte page write mode using*/
  89                                         /* last 6 bits of the address   */
  90 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* and takes up to 10 msec */
  91
  92
  93 /***************************************************************
  94  * Definitions for Serial Presence Detect EEPROM address
  95  * (to get SDRAM settings)
  96  ***************************************************************/
  97 #define SPD_EEPROM_ADDRESS      0x50
  98
  99 #define CONFIG_BOARD_EARLY_INIT_F
 100 #define CONFIG_BOARD_EARLY_INIT_R
 101
 102 /**************************************************************
 103  * Environment definitions
 104  **************************************************************/
 105 #define CONFIG_BAUDRATE         9600    /* STD Baudrate */
 106
 107
 108 #define CONFIG_BOOTDELAY        5
 109 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 110 /* #define CONFIG_BOOT_RETRY_TIME       -10     /XXX* feature is available but not enabled */
 111 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check console even if bootdelay = 0 */
 112
 113
 114 #define CONFIG_BOOTCOMMAND      "diskboot 400000 0:1; bootm" /* autoboot command                */
 115 #define CONFIG_BOOTARGS         "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
 116
 117 #define CONFIG_IPADDR           10.0.0.100
 118 #define CONFIG_SERVERIP         10.0.0.1
 119 #define CONFIG_PREBOOT
 120 /***************************************************************
 121  * defines if the console is stored in the environment
 122  ***************************************************************/
 123 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    /* stdin, stdout and stderr are in evironment */
 124 /***************************************************************
 125  * defines if an overwrite_console function exists
 126  *************************************************************/
 127 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 128 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 129 /***************************************************************
 130  * defines if the overwrite_console should be stored in the
 131  * environment
 132  **************************************************************/
 133 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 134
 135 /**************************************************************
 136  * loads config
 137  *************************************************************/
 138 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 139 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 140
 141 #define CONFIG_MISC_INIT_R
 142 /***********************************************************
 143  * Miscellaneous configurable options
 144  **********************************************************/
 145 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 146 #if defined(CONFIG_CMD_KGDB)
 147 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size      */
 148 #else
 149 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size      */
 150 #endif
 151 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 152 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 153 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 154
 155 #define CONFIG_SYS_MEMTEST_START        0x0100000       /* memtest works on     */
 156 #define CONFIG_SYS_MEMTEST_END          0x0C00000       /* 1 ... 12 MB in DRAM  */
 157
 158 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
 159 #define CONFIG_SYS_NS16550
 160 #define CONFIG_SYS_NS16550_SERIAL
 161 #define CONFIG_SYS_NS16550_REG_SIZE     1
 162 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 163
 164 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK            /* no external serial clock used */
 165 #define CONFIG_SYS_BASE_BAUD       691200
 166
 167 /* The following table includes the supported baudrates */
 168 #define CONFIG_SYS_BAUDRATE_TABLE       \
 169         { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400,     \
 170          57600, 115200, 230400, 460800, 921600 }
 171
 172 #define CONFIG_SYS_LOAD_ADDR            0x400000        /* default load address */
 173 #define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_into (bd_t) */
 174
 175 /*-----------------------------------------------------------------------
 176  * PCI stuff
 177  *-----------------------------------------------------------------------
 178  */
 179 #define PCI_HOST_ADAPTER 0              /* configure ar pci adapter     */
 180 #define PCI_HOST_FORCE  1               /* configure as pci host        */
 181 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 182
 183 #define CONFIG_PCI                      /* include pci support          */
 184 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 185 #define CONFIG_PCI_HOST PCI_HOST_FORCE  /* configure as pci-host        */
 186 #define CONFIG_PCI_PNP                  /* pci plug-and-play            */
 187                                         /* resource configuration       */
 188 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000   /* PCI Vendor ID: to-do!!!      */
 189 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000   /* PCI Device ID: to-do!!!      */
 190 #define CONFIG_SYS_PCI_PTM1LA   0x00000000      /* point to sdram               */
 191 #define CONFIG_SYS_PCI_PTM1MS   0x80000001      /* 2GB, enable hard-wired to 1  */
 192 #define CONFIG_SYS_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 193 #define CONFIG_SYS_PCI_PTM2LA   0x00000000      /* disabled                     */
 194 #define CONFIG_SYS_PCI_PTM2MS   0x00000000      /* disabled                     */
 195 #define CONFIG_SYS_PCI_PTM2PCI 0x00000000      /* Host: use this pci address   */
 196
 197 /*-----------------------------------------------------------------------
 198  * Start addresses for the final memory configuration
 199  * (Set up by the startup code)
 200  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 201  */
 202 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 203 #define CONFIG_SYS_FLASH_BASE           0xFFF80000
 204 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
 205 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 kB for Monitor   */
 206 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserve 1024 kB for malloc() */
 207
 208 /*
 209  * For booting Linux, the board info and command line data
 210  * have to be in the first 8 MB of memory, since this is
 211  * the maximum mapped by the Linux kernel during initialization.
 212  */
 213 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 214 /*-----------------------------------------------------------------------
 215  * FLASH organization
 216  */
 217 #define CONFIG_SYS_UPDATE_FLASH_SIZE
 218 #define CONFIG_SYS_FLASH_PROTECTION
 219 #define CONFIG_SYS_FLASH_EMPTY_INFO
 220
 221 #define CONFIG_SYS_FLASH_CFI
 222 #define CONFIG_FLASH_CFI_DRIVER
 223
 224 #define CONFIG_FLASH_SHOW_PROGRESS      45
 225
 226 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 227 #define CONFIG_SYS_MAX_FLASH_SECT       256
 228
 229 /*
 230  * Init Memory Controller:
 231  */
 232 #define FLASH_MAX_SIZE          0x00800000              /* 8MByte max */
 233 #define FLASH_BASE_PRELIM       0xFF800000  /* open the flash CS */
 234 /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
 235 #define FLASH_SIZE_PRELIM        3  /* maximal flash FLASH size bank #0 */
 236
 237 #define CONFIG_BOARD_EARLY_INIT_F
 238
 239 /* Configuration Port location */
 240 #define CONFIG_PORT_ADDR        0xF4000000
 241 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
 242
 243
 244 /*-----------------------------------------------------------------------
 245  * Definitions for initial stack pointer and data area (in On Chip SRAM)
 246  */
 247 #define CONFIG_SYS_TEMP_STACK_OCM       1
 248 #define CONFIG_SYS_OCM_DATA_ADDR        0xF0000000
 249 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 250 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
 251 #define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_OCM_DATA_SIZE        /* Size of On Chip SRAM        */
 252 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 253 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 254
 255 /***********************************************************************
 256  * External peripheral base address
 257  ***********************************************************************/
 258 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000
 259
 260 /***********************************************************************
 261  * Last Stage Init
 262  ***********************************************************************/
 263 #define CONFIG_LAST_STAGE_INIT
 264 /************************************************************
 265  * Ethernet Stuff
 266  ***********************************************************/
 267 #define CONFIG_PPC4xx_EMAC
 268 #define CONFIG_MII              1       /* MII PHY management           */
 269 #define CONFIG_PHY_ADDR         1       /* PHY address                  */
 270 /************************************************************
 271  * RTC
 272  ***********************************************************/
 273 #define CONFIG_RTC_MC146818
 274 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 275
 276 /************************************************************
 277  * IDE/ATA stuff
 278  ************************************************************/
 279 #define CONFIG_SYS_IDE_MAXBUS           2   /* max. 2 IDE busses        */
 280 #define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
 281
 282 #define CONFIG_SYS_ATA_BASE_ADDR        CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */
 283 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x01F0  /* ide0 offste */
 284 #define CONFIG_SYS_ATA_IDE1_OFFSET      0x0170  /* ide1 offset */
 285 #define CONFIG_SYS_ATA_DATA_OFFSET      0       /* data reg offset      */
 286 #define CONFIG_SYS_ATA_REG_OFFSET       0       /* reg offset */
 287 #define CONFIG_SYS_ATA_ALT_OFFSET       0x200   /* alternate register offset */
 288
 289 #undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 290 #undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 291 #define CONFIG_IDE_RESET                /* reset for ide supported...   */
 292 #define CONFIG_IDE_RESET_ROUTINE        /* with a special reset function */
 293 #define CONFIG_SUPPORT_VFAT
 294
 295 /************************************************************
 296  * ATAPI support (experimental)
 297  ************************************************************/
 298 #define CONFIG_ATAPI                    /* enable ATAPI Support */
 299
 300 /************************************************************
 301  * SCSI support (experimental) only SYM53C8xx supported
 302  ************************************************************/
 303 #define CONFIG_SCSI_SYM53C8XX
 304 #define CONFIG_SYS_SCSI_MAX_LUN 8       /* number of supported LUNs */
 305 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     7       /* maximum SCSI ID (0..6) */
 306 #define CONFIG_SYS_SCSI_MAX_DEVICE      CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
 307 #define CONFIG_SYS_SCSI_SPIN_UP_TIME    2
 308
 309 /************************************************************
 310  * Disk-On-Chip configuration
 311  ************************************************************/
 312 #define CONFIG_SYS_MAX_DOC_DEVICE       1       /* Max number of DOC devices            */
 313 #define CONFIG_SYS_DOC_SHORT_TIMEOUT
 314 #define CONFIG_SYS_DOC_SUPPORT_2000
 315 #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
 316
 317 /************************************************************
 318  * DISK Partition support
 319  ************************************************************/
 320 #define CONFIG_DOS_PARTITION
 321 #define CONFIG_MAC_PARTITION
 322 #define CONFIG_ISO_PARTITION /* Experimental */
 323
 324 /************************************************************
 325  * Keyboard support
 326  ************************************************************/
 327 #define CONFIG_ISA_KEYBOARD
 328
 329 /************************************************************
 330  * Video support
 331  ************************************************************/
 332 #define CONFIG_VIDEO                    /*To enable video controller support */
 333 #define CONFIG_VIDEO_CT69000
 334 #define CONFIG_CFB_CONSOLE
 335 #define CONFIG_VIDEO_LOGO
 336 #define CONFIG_CONSOLE_EXTRA_INFO
 337 #define CONFIG_VGA_AS_SINGLE_DEVICE
 338 #define CONFIG_VIDEO_SW_CURSOR
 339 #define CONFIG_VIDEO_ONBOARD            /* Video controller is on-board */
 340
 341 /************************************************************
 342  * USB support
 343  ************************************************************/
 344 #define CONFIG_USB_UHCI
 345 #define CONFIG_USB_KEYBOARD
 346 #define CONFIG_USB_STORAGE
 347
 348 /* Enable needed helper functions */
 349 #define CONFIG_SYS_STDIO_DEREGISTER             /* needs stdio_deregister */
 350
 351 /************************************************************
 352  * Debug support
 353  ************************************************************/
 354 #if defined(CONFIG_CMD_KGDB)
 355 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 356 #endif
 357
 358 /************************************************************
 359  * support BZIP2 compression
 360  ************************************************************/
 361 #define CONFIG_BZIP2            1
 362
 363 /************************************************************
 364  * Ident
 365  ************************************************************/
 366 #define VERSION_TAG "released"
 367 #define CONFIG_ISO_STRING "MEV-10066-001"
 368 #define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
 369
 370
 371 #endif  /* __CONFIG_H */