include/configs/TB5200.h

   1 /*
   2  * (C) Copyright 2003-2006
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * (C) Copyright 2004-2006
   6  * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
   7  *
   8  * See file CREDITS for list of people who contributed to this
   9  * project.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*
  31  * High Level Configuration Options
  32  * (easy to change)
  33  */
  34
  35 #define CONFIG_MPC5xxx          1       /* This is an MPC5xxx CPU */
  36 #define CONFIG_MPC5200          1       /* (more precisely an MPC5200 CPU) */
  37 #define CONFIG_TQM5200          1       /* ... on TQM5200 module */
  38 #define CONFIG_TB5200           1       /* ... on a TB5200 base board */
  39
  40 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* ... running at 33.000000MHz */
  41
  42 #define BOOTFLAG_COLD           0x01    /* Normal Power-On: Boot from FLASH  */
  43 #define BOOTFLAG_WARM           0x02    /* Software reboot           */
  44
  45 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  46
  47 /*
  48  * Serial console configuration
  49  */
  50 #define CONFIG_PSC_CONSOLE      1       /* default console is on PSC1 */
  51 #define CONFIG_SERIAL_MULTI     1       /* support multiple consoles */
  52 #define CONFIG_PSC_CONSOLE2     6       /* second console is on PSC6 */
  53 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  54 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  55
  56 /*
  57  * Video console
  58  */
  59 #if 1
  60 #define CONFIG_VIDEO
  61 #define CONFIG_VIDEO_SM501
  62 #define CONFIG_VIDEO_SM501_32BPP
  63 #define CONFIG_CFB_CONSOLE
  64 #define CONFIG_VIDEO_LOGO
  65 #define CONFIG_VGA_AS_SINGLE_DEVICE
  66 #define CONFIG_CONSOLE_EXTRA_INFO
  67 #define CONFIG_VIDEO_SW_CURSOR
  68 #define CONFIG_SPLASH_SCREEN
  69 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  70 #endif
  71
  72 /* Partitions */
  73 #define CONFIG_MAC_PARTITION
  74 #define CONFIG_DOS_PARTITION
  75 #define CONFIG_ISO_PARTITION
  76
  77 /* USB */
  78 #define CONFIG_USB_OHCI
  79 #define CONFIG_USB_STORAGE
  80
  81 /* POST support */
  82 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY   | \
  83                                  CONFIG_SYS_POST_CPU       | \
  84                                  CONFIG_SYS_POST_I2C)
  85
  86 #ifdef CONFIG_POST
  87 /* preserve space for the post_word at end of on-chip SRAM */
  88 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
  89 #endif
  90
  91
  92 /*
  93  * BOOTP options
  94  */
  95 #define CONFIG_BOOTP_BOOTFILESIZE
  96 #define CONFIG_BOOTP_BOOTPATH
  97 #define CONFIG_BOOTP_GATEWAY
  98 #define CONFIG_BOOTP_HOSTNAME
  99
 100
 101 /*
 102  * Command line configuration.
 103  */
 104 #include <config_cmd_default.h>
 105
 106 #define CONFIG_CMD_ASKENV
 107 #define CONFIG_CMD_DATE
 108 #define CONFIG_CMD_DHCP
 109 #define CONFIG_CMD_ECHO
 110 #define CONFIG_CMD_EEPROM
 111 #define CONFIG_CMD_EXT2
 112 #define CONFIG_CMD_FAT
 113 #define CONFIG_CMD_I2C
 114 #define CONFIG_CMD_IDE
 115 #define CONFIG_CMD_JFFS2
 116 #define CONFIG_CMD_MII
 117 #define CONFIG_CMD_NFS
 118 #define CONFIG_CMD_PING
 119 #define CONFIG_CMD_REGINFO
 120 #define CONFIG_CMD_SNTP
 121 #define CONFIG_CMD_BSP
 122 #define CONFIG_CMD_USB
 123
 124 #ifdef CONFIG_VIDEO
 125 #define CONFIG_CMD_BMP
 126 #endif
 127
 128 #ifdef CONFIG_POST
 129 #define CONFIG_CMD_DIAG
 130 #endif
 131
 132
 133 #define CONFIG_TIMESTAMP                /* display image timestamps */
 134
 135 #if (CONFIG_SYS_TEXT_BASE == 0xFC000000)                /* Boot low */
 136 #   define CONFIG_SYS_LOWBOOT           1
 137 #endif
 138
 139 /*
 140  * Autobooting
 141  */
 142 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
 143
 144 #define CONFIG_PREBOOT  "echo;" \
 145         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
 146         "echo"
 147
 148 #undef  CONFIG_BOOTARGS
 149
 150 #if defined(CONFIG_TQM5200_B)
 151 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 152         "netdev=eth0\0"                                                 \
 153         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 154         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 155         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 156                 "nfsroot=${serverip}:${rootpath}\0"                     \
 157         "addip=setenv bootargs ${bootargs} "                            \
 158                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 159                 ":${hostname}:${netdev}:off panic=1\0"                  \
 160         "flash_self=run ramargs addip;"                                 \
 161                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 162         "flash_nfs=run nfsargs addip;"                                  \
 163                 "bootm ${kernel_addr}\0"                                \
 164         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
 165         "bootfile=/tftpboot/tqm5200/uImage\0"                           \
 166         "load=tftp 200000 ${u-boot}\0"                                  \
 167         "u-boot=/tftpboot/tqm5200/u-boot.bin\0"                         \
 168         "update=protect off FC000000 FC07FFFF;"                         \
 169                 "erase FC000000 FC07FFFF;"                              \
 170                 "cp.b 200000 FC000000 ${filesize};"                     \
 171                 "protect on FC000000 FC07FFFF\0"                        \
 172         ""
 173 #else
 174 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 175         "netdev=eth0\0"                                                 \
 176         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 177         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 178         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 179                 "nfsroot=${serverip}:${rootpath}\0"                     \
 180         "addip=setenv bootargs ${bootargs} "                            \
 181                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 182                 ":${hostname}:${netdev}:off panic=1\0"                  \
 183         "flash_self=run ramargs addip;"                                 \
 184                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 185         "flash_nfs=run nfsargs addip;"                                  \
 186                 "bootm ${kernel_addr}\0"                                \
 187         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
 188         "bootfile=/tftpboot/tqm5200/uImage\0"                           \
 189         "load=tftp 200000 $(u-boot)\0"                                  \
 190         "u-boot=/tftpboot/tqm5200/u-boot.bin\0"                         \
 191         "update=protect off FC000000 FC05FFFF;"                         \
 192                 "erase FC000000 FC05FFFF;"                              \
 193                 "cp.b 200000 FC000000 ${filesize};"                     \
 194                 "protect on FC000000 FC05FFFF\0"                        \
 195         ""
 196 #endif /* CONFIG_TQM5200_B */
 197
 198 #define CONFIG_BOOTCOMMAND      "run net_nfs"
 199
 200 /*
 201  * IPB Bus clocking configuration.
 202  */
 203 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
 204
 205 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
 206 /*
 207  * PCI Bus clocking configuration
 208  *
 209  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
 210  * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
 211  * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
 212  */
 213 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2            /* define for 66MHz speed */
 214 #endif
 215
 216 /*
 217  * I2C configuration
 218  */
 219 #define CONFIG_HARD_I2C         1       /* I2C with hardware support */
 220 #define CONFIG_SYS_I2C_MODULE           2       /* Select I2C module #2 */
 221
 222 /*
 223  * I2C clock frequency
 224  *
 225  * Please notice, that the resulting clock frequency could differ from the
 226  * configured value. This is because the I2C clock is derived from system
 227  * clock over a frequency divider with only a few divider values. U-boot
 228  * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
 229  * approximation allways lies below the configured value, never above.
 230  */
 231 #define CONFIG_SYS_I2C_SPEED            100000 /* 100 kHz */
 232 #define CONFIG_SYS_I2C_SLAVE            0x7F
 233
 234 /*
 235  * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
 236  * also). For other EEPROMs configuration should be verified. On Mini-FAP the
 237  * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
 238  * same configuration could be used.
 239  */
 240 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 241 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
 242 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       5       /* =32 Bytes per write */
 243 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   20
 244
 245 /* List of I2C addresses to be verified by POST */
 246 #undef I2C_ADDR_LIST
 247 #define I2C_ADDR_LIST   {       CONFIG_SYS_I2C_EEPROM_ADDR,     \
 248                                 CONFIG_SYS_I2C_RTC_ADDR,        \
 249                                 CONFIG_SYS_I2C_SLAVE }
 250
 251 /*
 252  * Flash configuration
 253  */
 254 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
 255
 256 /* use CFI flash driver */
 257 #define CONFIG_SYS_FLASH_CFI            1       /* Flash is CFI conformant */
 258 #define CONFIG_FLASH_CFI_DRIVER 1       /* Use the common driver */
 259 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_BOOTCS_START }
 260 #define CONFIG_SYS_FLASH_EMPTY_INFO
 261 #define CONFIG_SYS_FLASH_SIZE           0x04000000 /* 64 MByte */
 262 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max num of sects on one chip */
 263 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 264
 265 #if !defined(CONFIG_SYS_LOWBOOT)
 266 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00760000 + 0x00800000)
 267 #else   /* CONFIG_SYS_LOWBOOT */
 268 #if defined(CONFIG_TQM5200_B)
 269 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00080000)
 270 #else
 271 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00060000)
 272 #endif /* CONFIG_TQM5200_B */
 273 #endif  /* CONFIG_SYS_LOWBOOT */
 274 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of flash banks
 275                                            (= chip selects) */
 276
 277 /* Dynamic MTD partition support */
 278 #define CONFIG_CMD_MTDPARTS
 279 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 280 #define CONFIG_FLASH_CFI_MTD
 281 #define MTDIDS_DEFAULT          "nor0=TQM5200-0"
 282 #if defined(CONFIG_TQM5200_B)
 283 #define MTDPARTS_DEFAULT        "mtdparts=TQM5200-0:768k(firmware),"    \
 284                                                 "1280k(kernel),"        \
 285                                                 "2m(initrd),"           \
 286                                                 "4m(small-fs),"         \
 287                                                 "16m(big-fs),"          \
 288                                                 "8m(misc)"
 289 #else
 290 #define MTDPARTS_DEFAULT        "mtdparts=TQM5200-0:640k(firmware),"    \
 291                                                 "1408k(kernel),"        \
 292                                                 "2m(initrd),"           \
 293                                                 "4m(small-fs),"         \
 294                                                 "16m(big-fs),"          \
 295                                                 "8m(misc)"
 296 #endif /* CONFIG_TQM5200_B */
 297
 298 /*
 299  * Environment settings
 300  */
 301 #define CONFIG_ENV_IS_IN_FLASH  1
 302 #define CONFIG_ENV_SIZE         0x10000
 303 #if defined(CONFIG_TQM5200_B)
 304 #define CONFIG_ENV_SECT_SIZE    0x40000
 305 #else
 306 #define CONFIG_ENV_SECT_SIZE    0x20000
 307 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 308 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 309 #endif /* CONFIG_TQM5200_B */
 310
 311 /*
 312  * Memory map
 313  */
 314 #define CONFIG_SYS_MBAR         0xF0000000
 315 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 316 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 317
 318 /* Use ON-Chip SRAM until RAM will be available */
 319 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 320 #ifdef CONFIG_POST
 321 /* preserve space for the post_word at end of on-chip SRAM */
 322 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
 323 #else
 324 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
 325 #endif
 326
 327
 328 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
 329 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 330 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 331
 332 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 333 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 334 #   define CONFIG_SYS_RAMBOOT           1
 335 #endif
 336
 337 #if defined(CONFIG_TQM5200_B)
 338 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)     /* Reserve 512 kB for Monitor   */
 339 #else
 340 #define CONFIG_SYS_MONITOR_LEN          (384 << 10)     /* Reserve 384 kB for Monitor   */
 341 #endif /* CONFIG_TQM5200_B */
 342 #define CONFIG_SYS_MALLOC_LEN           (1024 << 10)    /* Reserve 1024 kB for malloc() */
 343 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 344
 345 /*
 346  * Ethernet configuration
 347  */
 348 #define CONFIG_MPC5xxx_FEC      1
 349 #define CONFIG_MPC5xxx_FEC_MII100
 350 /*
 351  * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
 352  */
 353 /* #define CONFIG_MPC5xxx_FEC_MII10 */
 354 #define CONFIG_PHY_ADDR         0x00
 355
 356 /*
 357  * GPIO configuration
 358  *
 359  * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
 360  *      Bit 0 (mask: 0x80000000): 1
 361  * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
 362  *      00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
 363  *      01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
 364  *            Use for REV200 STK52XX boards. Do not use with REV100 modules
 365  *            (because, there I2C1 is used as I2C bus)
 366  * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
 367  * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
 368  *      000 -> All PSC2 pins are GIOPs
 369  *      001 -> CAN1/2 on PSC2 pins
 370  *             Use for REV100 STK52xx boards
 371  * use PSC3: Bits 20:23 (mask: 0x00000300):
 372  *      0001 -> USB2
 373  *      0000 -> GPIO
 374  * use PSC6:
 375  *   on STK52xx:
 376  *      use as UART. Pins PSC6_0 to PSC6_3 are used.
 377  *      Bits 9:11 (mask: 0x00700000):
 378  *         101 -> PSC6 : Extended POST test is not available
 379  *   on MINI-FAP and TQM5200_IB:
 380  *      use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
 381  *         000 -> PSC6 could not be used as UART, CODEC or IrDA
 382  *   GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
 383  *   tests.
 384  */
 385 #define CONFIG_SYS_GPS_PORT_CONFIG      0x81500114
 386
 387 /*
 388  * RTC configuration
 389  */
 390 #define CONFIG_RTC_M41T11       1
 391 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 392 #define CONFIG_SYS_M41T11_BASE_YEAR     1900    /* because Linux uses the same base
 393                                            year */
 394
 395 /*
 396  * Miscellaneous configurable options
 397  */
 398 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 399 #define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt   */
 400 #define CONFIG_CMDLINE_EDITING  1       /* add command line history */
 401 #if defined(CONFIG_CMD_KGDB)
 402 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
 403 #else
 404 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
 405 #endif
 406 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 407 #define CONFIG_SYS_MAXARGS              16      /* max number of command args   */
 408 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 409
 410 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
 411 #if defined(CONFIG_CMD_KGDB)
 412 #  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
 413 #endif
 414
 415 /* Enable an alternate, more extensive memory test */
 416 #define CONFIG_SYS_ALT_MEMTEST
 417
 418 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 419 #define CONFIG_SYS_MEMTEST_END          0x00f00000      /* 1 ... 15 MB in DRAM  */
 420
 421 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 422
 423 #define CONFIG_SYS_HZ                   1000    /* decrementer freq: 1 ms ticks */
 424
 425 /*
 426  * Enable loopw command.
 427  */
 428 #define CONFIG_LOOPW
 429
 430 /*
 431  * Various low-level settings
 432  */
 433 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 434 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 435
 436 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 437 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 438 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
 439 #define CONFIG_SYS_BOOTCS_CFG           0x0008DF30 /* for pci_clk  = 66 MHz */
 440 #else
 441 #define CONFIG_SYS_BOOTCS_CFG           0x0004DF30 /* for pci_clk = 33 MHz */
 442 #endif
 443 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 444 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 445
 446 #define CONFIG_LAST_STAGE_INIT
 447
 448 /*
 449  * SRAM - Do not map below 2 GB in address space, because this area is used
 450  * for SDRAM autosizing.
 451  */
 452 #define CONFIG_SYS_CS2_START            0xE5000000
 453 #define CONFIG_SYS_CS2_SIZE             0x100000        /* 1 MByte */
 454 #define CONFIG_SYS_CS2_CFG              0x0004D930
 455
 456 /*
 457  * Grafic controller - Do not map below 2 GB in address space, because this
 458  * area is used for SDRAM autosizing.
 459  */
 460 #define SM501_FB_BASE           0xE0000000
 461 #define CONFIG_SYS_CS1_START            (SM501_FB_BASE)
 462 #define CONFIG_SYS_CS1_SIZE             0x4000000       /* 64 MByte */
 463 #define CONFIG_SYS_CS1_CFG              0x8F48FF70
 464 #define SM501_MMIO_BASE         CONFIG_SYS_CS1_START + 0x03E00000
 465
 466 #define CONFIG_SYS_CS_BURST             0x00000000
 467 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311      /* 1 dead cycle for flash and SM501 */
 468
 469 #define CONFIG_SYS_RESET_ADDRESS        0xff000000
 470
 471 /*-----------------------------------------------------------------------
 472  * USB stuff
 473  *-----------------------------------------------------------------------
 474  */
 475 #define CONFIG_USB_CLOCK        0x0001BBBB
 476 #define CONFIG_USB_CONFIG       0x00001000
 477
 478 /*-----------------------------------------------------------------------
 479  * IDE/ATA stuff Supports IDE harddisk
 480  *-----------------------------------------------------------------------
 481  */
 482
 483 #undef  CONFIG_IDE_8xx_PCCARD           /* Use IDE with PC Card Adapter */
 484
 485 #undef  CONFIG_IDE_8xx_DIRECT           /* Direct IDE    not supported  */
 486 #undef  CONFIG_IDE_LED                  /* LED   for ide not supported  */
 487
 488 #define CONFIG_IDE_RESET                /* reset for ide supported      */
 489 #define CONFIG_IDE_PREINIT
 490
 491 #define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE bus               */
 492 #define CONFIG_SYS_IDE_MAXDEVICE        2       /* max. 2 drives per IDE bus    */
 493
 494 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 495
 496 #define CONFIG_SYS_ATA_BASE_ADDR        MPC5XXX_ATA
 497
 498 /* Offset for data I/O                  */
 499 #define CONFIG_SYS_ATA_DATA_OFFSET      (0x0060)
 500
 501 /* Offset for normal register accesses  */
 502 #define CONFIG_SYS_ATA_REG_OFFSET       (CONFIG_SYS_ATA_DATA_OFFSET)
 503
 504 /* Offset for alternate registers       */
 505 #define CONFIG_SYS_ATA_ALT_OFFSET       (0x005C)
 506
 507 /* Interval between registers                                                */
 508 #define CONFIG_SYS_ATA_STRIDE           4
 509
 510 #endif /* __CONFIG_H */