include/configs/VCMA9.h

   1 /*
   2  * (C) Copyright 2002, 2003
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <garyj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * Configuation settings for the MPL VCMA9 board.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #define MACH_TYPE_MPL_VCMA9     227
  17
  18 /*
  19  * High Level Configuration Options
  20  * (easy to change)
  21  */
  22 #define CONFIG_SYS_THUMB_BUILD
  23
  24 #define CONFIG_S3C24X0          /* This is a SAMSUNG S3C24x0-type SoC */
  25 #define CONFIG_S3C2410          /* specifically a SAMSUNG S3C2410 SoC */
  26 #define CONFIG_VCMA9            /* on a MPL VCMA9 Board  */
  27 #define CONFIG_MACH_TYPE        MACH_TYPE_MPL_VCMA9 /* Machine type */
  28
  29 #define CONFIG_SYS_TEXT_BASE    0x0
  30
  31 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
  32
  33 /* input clock of PLL (VCMA9 has 12MHz input clock) */
  34 #define CONFIG_SYS_CLK_FREQ     12000000
  35
  36 #define CONFIG_CMDLINE_TAG      /* enable passing of ATAGs */
  37 #define CONFIG_SETUP_MEMORY_TAGS
  38 #define CONFIG_INITRD_TAG
  39
  40 /*
  41  * BOOTP options
  42  */
  43 #define CONFIG_BOOTP_BOOTFILESIZE
  44 #define CONFIG_BOOTP_BOOTPATH
  45 #define CONFIG_BOOTP_GATEWAY
  46 #define CONFIG_BOOTP_HOSTNAME
  47
  48 /*
  49  * Command line configuration.
  50  */
  51 #define CONFIG_CMD_EEPROM
  52 #define CONFIG_CMD_REGINFO
  53 #define CONFIG_CMD_DATE
  54 #define CONFIG_CMD_BSP
  55 #define CONFIG_CMD_NAND
  56
  57 #define CONFIG_BOARD_LATE_INIT
  58
  59 #define CONFIG_CMDLINE_EDITING
  60
  61 /*
  62  * I2C stuff:
  63  * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
  64  * address 0x50 with 16bit addressing
  65  */
  66 #define CONFIG_SYS_I2C
  67
  68 /* we use the built-in I2C controller */
  69 #define CONFIG_SYS_I2C_S3C24X0
  70 #define CONFIG_SYS_I2C_S3C24X0_SPEED    100000  /* I2C speed */
  71 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x7F    /* I2C slave addr */
  72
  73 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
  74 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
  75 /* use EEPROM for environment vars */
  76 #define CONFIG_ENV_IS_IN_EEPROM         1
  77 /* environment starts at offset 0 */
  78 #define CONFIG_ENV_OFFSET               0x000
  79 /* 2KB should be more than enough */
  80 #define CONFIG_ENV_SIZE                 0x800
  81
  82 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  83 /* 64 bytes page write mode on 24C256 */
  84 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
  85 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
  86
  87 /*
  88  * Hardware drivers
  89  */
  90 #define CONFIG_CS8900                   /* we have a CS8900 on-board */
  91 #define CONFIG_CS8900_BASE              0x20000300
  92 #define CONFIG_CS8900_BUS16
  93
  94 /*
  95  * select serial console configuration
  96  */
  97 #define CONFIG_S3C24X0_SERIAL
  98 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on VCMA9 */
  99
 100 /* USB support (currently only works with D-cache off) */
 101 #define CONFIG_USB_OHCI
 102 #define CONFIG_USB_OHCI_S3C24XX
 103 #define CONFIG_USB_KEYBOARD
 104 #define CONFIG_DOS_PARTITION
 105
 106 /* Enable needed helper functions */
 107 #define CONFIG_SYS_STDIO_DEREGISTER     /* needs stdio_deregister */
 108
 109 /* RTC */
 110 #define CONFIG_RTC_S3C24X0
 111
 112 /* allow to overwrite serial and ethaddr */
 113 #define CONFIG_ENV_OVERWRITE
 114
 115 #define CONFIG_BAUDRATE                 9600
 116
 117 #define CONFIG_BOOT_RETRY_TIME          -1
 118 #define CONFIG_RESET_TO_RETRY
 119
 120 #define CONFIG_NETMASK                  255.255.255.0
 121 #define CONFIG_IPADDR                   10.0.0.110
 122 #define CONFIG_SERVERIP                 10.0.0.1
 123
 124 #if defined(CONFIG_CMD_KGDB)
 125 /* speed to run kgdb serial port */
 126 #define CONFIG_KGDB_BAUDRATE            115200
 127 #endif
 128
 129 /* Miscellaneous configurable options */
 130 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 131 #define CONFIG_SYS_CBSIZE               256
 132 /* Print Buffer Size */
 133 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 134 #define CONFIG_SYS_MAXARGS              16
 135 /* Boot Argument Buffer Size */
 136 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 137
 138 #define CONFIG_DISPLAY_CPUINFO                          /* Display cpu info */
 139 #define CONFIG_DISPLAY_BOARDINFO                        /* Display board info */
 140
 141 #define CONFIG_SYS_MEMTEST_START        0x30000000      /* memtest works on */
 142 #define CONFIG_SYS_MEMTEST_END          0x31FFFFFF      /* 32 MB in DRAM */
 143
 144 #define CONFIG_SYS_ALT_MEMTEST
 145 #define CONFIG_SYS_LOAD_ADDR            0x30800000
 146
 147 /* we configure PWM Timer 4 to 1ms 1000Hz  */
 148
 149 /* support additional compression methods */
 150 #define CONFIG_BZIP2
 151 #define CONFIG_LZO
 152 #define CONFIG_LZMA
 153
 154 /* Physical Memory Map */
 155 #define CONFIG_NR_DRAM_BANKS    1               /* we have 1 bank of DRAM */
 156 #define PHYS_SDRAM_1            0x30000000      /* SDRAM Bank #1 */
 157 #define PHYS_FLASH_1            0x00000000      /* Flash Bank #1 */
 158
 159 #define CONFIG_SYS_FLASH_BASE   PHYS_FLASH_1
 160
 161 /* FLASH and environment organization */
 162
 163 #define CONFIG_SYS_FLASH_CFI
 164 #define CONFIG_FLASH_CFI_DRIVER
 165 #define CONFIG_FLASH_CFI_LEGACY
 166 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
 167 #define CONFIG_FLASH_SHOW_PROGRESS      45
 168 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 169 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 170 #define CONFIG_SYS_MAX_FLASH_SECT       (19)
 171
 172 /*
 173  * Size of malloc() pool
 174  * BZIP2 / LZO / LZMA need a lot of RAM
 175  */
 176 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
 177 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
 178 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 179
 180 /* NAND configuration */
 181 #ifdef CONFIG_CMD_NAND
 182 #define CONFIG_NAND_S3C2410
 183 #define CONFIG_SYS_S3C2410_NAND_HWECC
 184 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 185 #define CONFIG_SYS_NAND_BASE            0x4E000000
 186 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
 187 #define CONFIG_S3C24XX_TACLS            1
 188 #define CONFIG_S3C24XX_TWRPH0           5
 189 #define CONFIG_S3C24XX_TWRPH1           3
 190 #endif
 191
 192 #define MULTI_PURPOSE_SOCKET_ADDR       0x08000000
 193
 194 /* File system */
 195 #define CONFIG_CMD_UBIFS
 196 #define CONFIG_CMD_JFFS2
 197 #define CONFIG_YAFFS2
 198 #define CONFIG_RBTREE
 199 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 200 #define CONFIG_MTD_PARTITIONS
 201 #define CONFIG_CMD_MTDPARTS
 202 #define CONFIG_LZO
 203
 204 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 205 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 206                                         GENERATED_GBL_DATA_SIZE)
 207
 208 #define CONFIG_BOARD_EARLY_INIT_F
 209
 210 #endif /* __CONFIG_H */