include/configs/VCMA9.h

   1 /*
   2  * (C) Copyright 2002, 2003
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <garyj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * Configuation settings for the MPL VCMA9 board.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef __CONFIG_H
  30 #define __CONFIG_H
  31
  32
  33 #define MACH_TYPE_MPL_VCMA9     227
  34
  35 /*
  36  * High Level Configuration Options
  37  * (easy to change)
  38  */
  39 #define CONFIG_ARM920T          /* This is an ARM920T Core */
  40 #define CONFIG_S3C24X0          /* in a SAMSUNG S3C24x0-type SoC */
  41 #define CONFIG_S3C2410          /* specifically a SAMSUNG S3C2410 SoC */
  42 #define CONFIG_VCMA9            /* on a MPL VCMA9 Board  */
  43 #define CONFIG_MACH_TYPE        MACH_TYPE_MPL_VCMA9 /* Machine type */
  44
  45 #define CONFIG_SYS_TEXT_BASE    0x0
  46
  47 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
  48
  49 /* input clock of PLL (VCMA9 has 12MHz input clock) */
  50 #define CONFIG_SYS_CLK_FREQ     12000000
  51
  52 #define CONFIG_CMDLINE_TAG      /* enable passing of ATAGs */
  53 #define CONFIG_SETUP_MEMORY_TAGS
  54 #define CONFIG_INITRD_TAG
  55
  56 /*
  57  * BOOTP options
  58  */
  59 #define CONFIG_BOOTP_BOOTFILESIZE
  60 #define CONFIG_BOOTP_BOOTPATH
  61 #define CONFIG_BOOTP_GATEWAY
  62 #define CONFIG_BOOTP_HOSTNAME
  63
  64 /*
  65  * Command line configuration.
  66  */
  67 #include <config_cmd_default.h>
  68
  69 #define CONFIG_CMD_CACHE
  70 #define CONFIG_CMD_EEPROM
  71 #define CONFIG_CMD_I2C
  72 #define CONFIG_CMD_USB
  73 #define CONFIG_CMD_REGINFO
  74 #define CONFIG_CMD_DATE
  75 #define CONFIG_CMD_ELF
  76 #define CONFIG_CMD_DHCP
  77 #define CONFIG_CMD_PING
  78 #define CONFIG_CMD_BSP
  79 #define CONFIG_CMD_NAND
  80
  81 #define CONFIG_BOARD_LATE_INIT
  82
  83 #define CONFIG_SYS_HUSH_PARSER
  84 #define CONFIG_CMDLINE_EDITING
  85
  86 /*
  87  * I2C stuff:
  88  * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
  89  * address 0x50 with 16bit addressing
  90  */
  91 #define CONFIG_HARD_I2C                         /* I2C with hardware support */
  92 #define CONFIG_SYS_I2C_SPEED            100000  /* I2C speed */
  93 #define CONFIG_SYS_I2C_SLAVE            0x7F    /* I2C slave addr */
  94
  95 /* we use the built-in I2C controller */
  96 #define CONFIG_DRIVER_S3C24X0_I2C
  97
  98 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
  99 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
 100 /* use EEPROM for environment vars */
 101 #define CONFIG_ENV_IS_IN_EEPROM         1
 102 /* environment starts at offset 0 */
 103 #define CONFIG_ENV_OFFSET               0x000
 104 /* 2KB should be more than enough */
 105 #define CONFIG_ENV_SIZE                 0x800
 106
 107 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
 108 /* 64 bytes page write mode on 24C256 */
 109 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
 110 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 111
 112 /*
 113  * Hardware drivers
 114  */
 115 #define CONFIG_CS8900                   /* we have a CS8900 on-board */
 116 #define CONFIG_CS8900_BASE              0x20000300
 117 #define CONFIG_CS8900_BUS16
 118
 119 /*
 120  * select serial console configuration
 121  */
 122 #define CONFIG_S3C24X0_SERIAL
 123 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on VCMA9 */
 124
 125 /* USB support (currently only works with D-cache off) */
 126 #define CONFIG_USB_OHCI
 127 #define CONFIG_USB_KEYBOARD
 128 #define CONFIG_USB_STORAGE
 129 #define CONFIG_DOS_PARTITION
 130
 131 /* Enable needed helper functions */
 132 #define CONFIG_SYS_STDIO_DEREGISTER     /* needs stdio_deregister */
 133
 134 /* RTC */
 135 #define CONFIG_RTC_S3C24X0
 136
 137
 138 /* allow to overwrite serial and ethaddr */
 139 #define CONFIG_ENV_OVERWRITE
 140
 141 #define CONFIG_BAUDRATE                 9600
 142
 143 #define CONFIG_BOOTDELAY                5
 144 #define CONFIG_BOOT_RETRY_TIME          -1
 145 #define CONFIG_RESET_TO_RETRY
 146 #define CONFIG_ZERO_BOOTDELAY_CHECK
 147
 148 #define CONFIG_NETMASK                  255.255.255.0
 149 #define CONFIG_IPADDR                   10.0.0.110
 150 #define CONFIG_SERVERIP                 10.0.0.1
 151
 152 #if defined(CONFIG_CMD_KGDB)
 153 /* speed to run kgdb serial port */
 154 #define CONFIG_KGDB_BAUDRATE            115200
 155 /* what's this ? it's not used anywhere */
 156 #define CONFIG_KGDB_SER_INDEX           2       /* which serial port to use */
 157 #endif
 158
 159 /* Miscellaneous configurable options */
 160 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 161 #define CONFIG_SYS_PROMPT               "VCMA9 # "
 162 #define CONFIG_SYS_CBSIZE               256
 163 /* Print Buffer Size */
 164 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 165 #define CONFIG_SYS_MAXARGS              16
 166 /* Boot Argument Buffer Size */
 167 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 168
 169 #define CONFIG_DISPLAY_CPUINFO                          /* Display cpu info */
 170 #define CONFIG_DISPLAY_BOARDINFO                        /* Display board info */
 171
 172 #define CONFIG_SYS_MEMTEST_START        0x30000000      /* memtest works on */
 173 #define CONFIG_SYS_MEMTEST_END          0x31FFFFFF      /* 32 MB in DRAM */
 174
 175 #define CONFIG_SYS_ALT_MEMTEST
 176 #define CONFIG_SYS_LOAD_ADDR            0x30800000
 177
 178 /* we configure PWM Timer 4 to 1ms 1000Hz  */
 179 #define CONFIG_SYS_HZ                   1000
 180
 181 /* support additional compression methods */
 182 #define CONFIG_BZIP2
 183 #define CONFIG_LZO
 184 #define CONFIG_LZMA
 185
 186 /* Ident */
 187 /*#define VERSION_TAG "released"*/
 188 #define VERSION_TAG "unstable"
 189 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
 190                             "MEV-10080-001 " VERSION_TAG
 191
 192 /* Physical Memory Map */
 193 #define CONFIG_NR_DRAM_BANKS    1               /* we have 1 bank of DRAM */
 194 #define PHYS_SDRAM_1            0x30000000      /* SDRAM Bank #1 */
 195 #define PHYS_FLASH_1            0x00000000      /* Flash Bank #1 */
 196
 197 #define CONFIG_SYS_FLASH_BASE   PHYS_FLASH_1
 198
 199 /* FLASH and environment organization */
 200
 201 #define CONFIG_SYS_FLASH_CFI
 202 #define CONFIG_FLASH_CFI_DRIVER
 203 #define CONFIG_FLASH_CFI_LEGACY
 204 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
 205 #define CONFIG_FLASH_SHOW_PROGRESS      45
 206 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 207 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 208 #define CONFIG_SYS_MAX_FLASH_SECT       (19)
 209
 210 /*
 211  * Size of malloc() pool
 212  * BZIP2 / LZO / LZMA need a lot of RAM
 213  */
 214 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
 215 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
 216 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 217
 218 /* NAND configuration */
 219 #ifdef CONFIG_CMD_NAND
 220 #define CONFIG_NAND_S3C2410
 221 #define CONFIG_SYS_S3C2410_NAND_HWECC
 222 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 223 #define CONFIG_SYS_NAND_BASE            0x4E000000
 224 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
 225 #define CONFIG_S3C24XX_TACLS            1
 226 #define CONFIG_S3C24XX_TWRPH0           5
 227 #define CONFIG_S3C24XX_TWRPH1           3
 228 #endif
 229
 230 #define MULTI_PURPOSE_SOCKET_ADDR       0x08000000
 231
 232 /* File system */
 233 #define CONFIG_CMD_FAT
 234 #define CONFIG_CMD_EXT2
 235 #define CONFIG_CMD_UBI
 236 #define CONFIG_CMD_UBIFS
 237 #define CONFIG_CMD_JFFS2
 238 #define CONFIG_YAFFS2
 239 #define CONFIG_RBTREE
 240 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 241 #define CONFIG_MTD_PARTITIONS
 242 #define CONFIG_CMD_MTDPARTS
 243 #define CONFIG_LZO
 244
 245 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 246 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 247                                         GENERATED_GBL_DATA_SIZE)
 248
 249 #define CONFIG_BOARD_EARLY_INIT_F
 250
 251 #endif /* __CONFIG_H */