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[people/ms/u-boot.git] / include / configs / VCMA9.h
1 /*
2 * (C) Copyright 2002, 2003
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
7 *
8 * Configuation settings for the MPL VCMA9 board.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16
17 #define MACH_TYPE_MPL_VCMA9 227
18
19 /*
20 * High Level Configuration Options
21 * (easy to change)
22 */
23 #define CONFIG_ARM920T /* This is an ARM920T Core */
24 #define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
25 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
26 #define CONFIG_VCMA9 /* on a MPL VCMA9 Board */
27 #define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */
28
29 #define CONFIG_SYS_TEXT_BASE 0x0
30
31 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
32
33 /* input clock of PLL (VCMA9 has 12MHz input clock) */
34 #define CONFIG_SYS_CLK_FREQ 12000000
35
36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
39
40 /*
41 * BOOTP options
42 */
43 #define CONFIG_BOOTP_BOOTFILESIZE
44 #define CONFIG_BOOTP_BOOTPATH
45 #define CONFIG_BOOTP_GATEWAY
46 #define CONFIG_BOOTP_HOSTNAME
47
48 /*
49 * Command line configuration.
50 */
51 #include <config_cmd_default.h>
52
53 #define CONFIG_CMD_CACHE
54 #define CONFIG_CMD_EEPROM
55 #define CONFIG_CMD_I2C
56 #define CONFIG_CMD_USB
57 #define CONFIG_CMD_REGINFO
58 #define CONFIG_CMD_DATE
59 #define CONFIG_CMD_ELF
60 #define CONFIG_CMD_DHCP
61 #define CONFIG_CMD_PING
62 #define CONFIG_CMD_BSP
63 #define CONFIG_CMD_NAND
64 #define CONFIG_CMD_NAND_YAFFS
65
66 #define CONFIG_BOARD_LATE_INIT
67
68 #define CONFIG_SYS_HUSH_PARSER
69 #define CONFIG_CMDLINE_EDITING
70
71 /*
72 * I2C stuff:
73 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
74 * address 0x50 with 16bit addressing
75 */
76 #define CONFIG_HARD_I2C /* I2C with hardware support */
77 #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
78 #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */
79
80 /* we use the built-in I2C controller */
81 #define CONFIG_DRIVER_S3C24X0_I2C
82
83 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
84 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
85 /* use EEPROM for environment vars */
86 #define CONFIG_ENV_IS_IN_EEPROM 1
87 /* environment starts at offset 0 */
88 #define CONFIG_ENV_OFFSET 0x000
89 /* 2KB should be more than enough */
90 #define CONFIG_ENV_SIZE 0x800
91
92 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
93 /* 64 bytes page write mode on 24C256 */
94 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
95 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
96
97 /*
98 * Hardware drivers
99 */
100 #define CONFIG_CS8900 /* we have a CS8900 on-board */
101 #define CONFIG_CS8900_BASE 0x20000300
102 #define CONFIG_CS8900_BUS16
103
104 /*
105 * select serial console configuration
106 */
107 #define CONFIG_S3C24X0_SERIAL
108 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
109
110 /* USB support (currently only works with D-cache off) */
111 #define CONFIG_USB_OHCI
112 #define CONFIG_USB_OHCI_S3C24XX
113 #define CONFIG_USB_KEYBOARD
114 #define CONFIG_USB_STORAGE
115 #define CONFIG_DOS_PARTITION
116
117 /* Enable needed helper functions */
118 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
119
120 /* RTC */
121 #define CONFIG_RTC_S3C24X0
122
123
124 /* allow to overwrite serial and ethaddr */
125 #define CONFIG_ENV_OVERWRITE
126
127 #define CONFIG_BAUDRATE 9600
128
129 #define CONFIG_BOOTDELAY 5
130 #define CONFIG_BOOT_RETRY_TIME -1
131 #define CONFIG_RESET_TO_RETRY
132 #define CONFIG_ZERO_BOOTDELAY_CHECK
133
134 #define CONFIG_NETMASK 255.255.255.0
135 #define CONFIG_IPADDR 10.0.0.110
136 #define CONFIG_SERVERIP 10.0.0.1
137
138 #if defined(CONFIG_CMD_KGDB)
139 /* speed to run kgdb serial port */
140 #define CONFIG_KGDB_BAUDRATE 115200
141 /* what's this ? it's not used anywhere */
142 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
143 #endif
144
145 /* Miscellaneous configurable options */
146 #define CONFIG_SYS_LONGHELP /* undef to save memory */
147 #define CONFIG_SYS_PROMPT "VCMA9 # "
148 #define CONFIG_SYS_CBSIZE 256
149 /* Print Buffer Size */
150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
151 #define CONFIG_SYS_MAXARGS 16
152 /* Boot Argument Buffer Size */
153 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
154
155 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
156 #define CONFIG_DISPLAY_BOARDINFO /* Display board info */
157
158 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
159 #define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */
160
161 #define CONFIG_SYS_ALT_MEMTEST
162 #define CONFIG_SYS_LOAD_ADDR 0x30800000
163
164 /* we configure PWM Timer 4 to 1ms 1000Hz */
165 #define CONFIG_SYS_HZ 1000
166
167 /* support additional compression methods */
168 #define CONFIG_BZIP2
169 #define CONFIG_LZO
170 #define CONFIG_LZMA
171
172 /* Ident */
173 /*#define VERSION_TAG "released"*/
174 #define VERSION_TAG "unstable"
175 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
176 "MEV-10080-001 " VERSION_TAG
177
178 /* Physical Memory Map */
179 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
180 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
181 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
182
183 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
184
185 /* FLASH and environment organization */
186
187 #define CONFIG_SYS_FLASH_CFI
188 #define CONFIG_FLASH_CFI_DRIVER
189 #define CONFIG_FLASH_CFI_LEGACY
190 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
191 #define CONFIG_FLASH_SHOW_PROGRESS 45
192 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
193 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
194 #define CONFIG_SYS_MAX_FLASH_SECT (19)
195
196 /*
197 * Size of malloc() pool
198 * BZIP2 / LZO / LZMA need a lot of RAM
199 */
200 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
201 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
202 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
203
204 /* NAND configuration */
205 #ifdef CONFIG_CMD_NAND
206 #define CONFIG_NAND_S3C2410
207 #define CONFIG_SYS_S3C2410_NAND_HWECC
208 #define CONFIG_SYS_MAX_NAND_DEVICE 1
209 #define CONFIG_SYS_NAND_BASE 0x4E000000
210 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
211 #define CONFIG_S3C24XX_TACLS 1
212 #define CONFIG_S3C24XX_TWRPH0 5
213 #define CONFIG_S3C24XX_TWRPH1 3
214 #endif
215
216 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
217
218 /* File system */
219 #define CONFIG_CMD_FAT
220 #define CONFIG_CMD_EXT2
221 #define CONFIG_CMD_UBI
222 #define CONFIG_CMD_UBIFS
223 #define CONFIG_CMD_JFFS2
224 #define CONFIG_YAFFS2
225 #define CONFIG_RBTREE
226 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
227 #define CONFIG_MTD_PARTITIONS
228 #define CONFIG_CMD_MTDPARTS
229 #define CONFIG_LZO
230
231 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
232 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
233 GENERATED_GBL_DATA_SIZE)
234
235 #define CONFIG_BOARD_EARLY_INIT_F
236
237 #endif /* __CONFIG_H */