include/configs/actux2.h

   1 /*
   2  * (C) Copyright 2007
   3  * Michael Schwingen, michael@schwingen.org
   4  *
   5  * Configuration settings for the AcTux-2 board.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #define CONFIG_IXP425                   1
  14 #define CONFIG_ACTUX2                   1
  15
  16 #define CONFIG_MACH_TYPE                1480
  17
  18 #define CONFIG_DISPLAY_CPUINFO          1
  19 #define CONFIG_DISPLAY_BOARDINFO        1
  20
  21 #define CONFIG_IXP_SERIAL
  22 #define CONFIG_SYS_IXP425_CONSOLE               IXP425_UART2
  23 #define CONFIG_BAUDRATE                 115200
  24 #define CONFIG_BOOTDELAY                5
  25 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
  26 #define CONFIG_BOARD_EARLY_INIT_F       1
  27 #define CONFIG_SYS_LDSCRIPT     "board/actux2/u-boot.lds"
  28
  29 /***************************************************************
  30  * U-boot generic defines start here.
  31  ***************************************************************/
  32 /* Size of malloc() pool */
  33 #define CONFIG_SYS_MALLOC_LEN                   (CONFIG_ENV_SIZE + 128*1024)
  34
  35 /* allow to overwrite serial and ethaddr */
  36 #define CONFIG_ENV_OVERWRITE
  37
  38 /* Command line configuration. */
  39 #include <config_cmd_default.h>
  40
  41 #define CONFIG_CMD_ELF
  42 #undef CONFIG_CMD_PCI
  43 #undef CONFIG_PCI
  44
  45 #define CONFIG_BOOTCOMMAND              "run boot_flash"
  46 /* enable passing of ATAGs */
  47 #define CONFIG_CMDLINE_TAG              1
  48 #define CONFIG_SETUP_MEMORY_TAGS        1
  49 #define CONFIG_INITRD_TAG               1
  50 #define CONFIG_REVISION_TAG             1
  51
  52 #if defined(CONFIG_CMD_KGDB)
  53 # define CONFIG_KGDB_BAUDRATE           230400
  54 /* which serial port to use */
  55 # define CONFIG_KGDB_SER_INDEX          1
  56 #endif
  57
  58 /* Miscellaneous configurable options */
  59 #define CONFIG_SYS_LONGHELP
  60 #define CONFIG_SYS_PROMPT                       "=> "
  61 /* Console I/O Buffer Size */
  62 #define CONFIG_SYS_CBSIZE                       256
  63 /* Print Buffer Size */
  64 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  65 /* max number of command args */
  66 #define CONFIG_SYS_MAXARGS                      16
  67 /* Boot Argument Buffer Size */
  68 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
  69
  70 #define CONFIG_SYS_MEMTEST_START                0x00400000
  71 #define CONFIG_SYS_MEMTEST_END                  0x00800000
  72
  73 /* timer clock - 2* OSC_IN system clock */
  74 #define CONFIG_IXP425_TIMER_CLK                 66666666
  75 #define CONFIG_SYS_HZ                           1000
  76
  77 /* default load address */
  78 #define CONFIG_SYS_LOAD_ADDR                    0x00010000
  79
  80 /* valid baudrates */
  81 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, 57600, \
  82                                           115200, 230400 }
  83 #define CONFIG_SERIAL_RTS_ACTIVE        1
  84
  85 /* Expansion bus settings */
  86 #define CONFIG_SYS_EXP_CS0                      0xbd113042
  87
  88 /* SDRAM settings */
  89 #define CONFIG_NR_DRAM_BANKS            1
  90 #define PHYS_SDRAM_1                    0x00000000
  91 #define CONFIG_SYS_SDRAM_BASE                   0x00000000
  92
  93 /* 16MB SDRAM */
  94 #define CONFIG_SYS_SDR_CONFIG                   0x3A
  95 #define PHYS_SDRAM_1_SIZE               0x01000000
  96 #define CONFIG_SYS_SDRAM_REFRESH_CNT            0x81a
  97 #define CONFIG_SYS_SDR_MODE_CONFIG              0x1
  98 #define CONFIG_SYS_DRAM_SIZE                    0x01000000
  99
 100 /* FLASH organization */
 101 #define CONFIG_SYS_TEXT_BASE            0x50000000
 102 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 103 /* max number of sectors on one chip */
 104 #define CONFIG_SYS_MAX_FLASH_SECT               140
 105 #define PHYS_FLASH_1                    0x50000000
 106 #define CONFIG_SYS_FLASH_BANKS_LIST             { PHYS_FLASH_1 }
 107
 108 #define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 109 #define CONFIG_SYS_MONITOR_BASE         PHYS_FLASH_1
 110 #define CONFIG_SYS_MONITOR_LEN                  (256 << 10)
 111 #define CONFIG_BOARD_SIZE_LIMIT                 262144
 112
 113 /* Use common CFI driver */
 114 #define CONFIG_SYS_FLASH_CFI
 115 #define CONFIG_FLASH_CFI_DRIVER
 116 /* no byte writes on IXP4xx */
 117 #define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_16BIT
 118
 119 /* print 'E' for empty sector on flinfo */
 120 #define CONFIG_SYS_FLASH_EMPTY_INFO
 121
 122 /* Ethernet */
 123
 124 /* include IXP4xx NPE support */
 125 #define CONFIG_IXP4XX_NPE               1
 126 /* NPE0 PHY address */
 127 #define CONFIG_PHY_ADDR                 0x00
 128 /* MII PHY management */
 129 #define CONFIG_MII                      1
 130 /* fixed-speed switch without standard PHY registers on MII */
 131 #define CONFIG_MII_NPE0_FIXEDLINK       1
 132 #define CONFIG_MII_NPE0_SPEED           100
 133 #define CONFIG_MII_NPE0_FULLDUPLEX      1
 134
 135 /* Number of ethernet rx buffers & descriptors */
 136 #define CONFIG_SYS_RX_ETH_BUFFER                16
 137 #define CONFIG_RESET_PHY_R              1
 138 /* ethernet switch connected to MII port */
 139 #define CONFIG_MII_ETHSWITCH            1
 140
 141 #define CONFIG_CMD_DHCP
 142 #define CONFIG_CMD_NET
 143 #define CONFIG_CMD_MII
 144 #define CONFIG_CMD_PING
 145 #undef  CONFIG_CMD_NFS
 146
 147 /* BOOTP options */
 148 #define CONFIG_BOOTP_BOOTFILESIZE
 149 #define CONFIG_BOOTP_BOOTPATH
 150 #define CONFIG_BOOTP_GATEWAY
 151 #define CONFIG_BOOTP_HOSTNAME
 152
 153 /* Cache Configuration */
 154 #define CONFIG_SYS_CACHELINE_SIZE               32
 155
 156 /*
 157  * environment organization:
 158  * one flash sector, embedded in uboot area (bottom bootblock flash)
 159  */
 160 #define CONFIG_ENV_IS_IN_FLASH          1
 161 #define CONFIG_ENV_SIZE                 0x2000
 162 #define CONFIG_ENV_ADDR                 (PHYS_FLASH_1 + 0x4000)
 163 #define CONFIG_SYS_USE_PPCENV                   1
 164
 165 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 166         "npe_ucode=50040000\0"                                          \
 167         "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
 168         "kerneladdr=50050000\0"                                         \
 169         "kernelfile=actux2/uImage\0"                                    \
 170         "rootfile=actux2/rootfs\0"                                      \
 171         "rootaddr=50170000\0"                                           \
 172         "loadaddr=10000\0"                                              \
 173         "updateboot_ser=mw.b 10000 ff 40000;"                           \
 174         " loady ${loadaddr};"                                           \
 175         " run eraseboot writeboot\0"                                    \
 176         "updateboot_net=mw.b 10000 ff 40000;"                           \
 177         " tftp ${loadaddr} actux2/u-boot.bin;"                          \
 178         " run eraseboot writeboot\0"                                    \
 179         "eraseboot=protect off 50000000 50003fff;"                      \
 180         " protect off 50006000 5003ffff;"                               \
 181         " erase 50000000 50003fff;"                                     \
 182         " erase 50006000 5003ffff\0"                                    \
 183         "writeboot=cp.b 10000 50000000 4000;"                           \
 184         " cp.b 16000 50006000 3a000\0"                                  \
 185         "updateucode=loady;"                                            \
 186         " era ${npe_ucode} +${filesize};"                               \
 187         " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"                  \
 188         "updateroot=tftp ${loadaddr} ${rootfile};"                      \
 189         " era ${rootaddr} +${filesize};"                                \
 190         " cp.b ${loadaddr} ${rootaddr} ${filesize}\0"                   \
 191         "updatekern=tftp ${loadaddr} ${kernelfile};"                    \
 192         " era ${kerneladdr} +${filesize};"                              \
 193         " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"                 \
 194         "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
 195         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
 196         "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"   \
 197         " rootfstype=squashfs,jffs2 init=/etc/preinit\0"                \
 198         "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
 199         "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"       \
 200         "boot_flash=run flashargs addtty addeth;"                       \
 201         " bootm ${kerneladdr}\0"                                        \
 202         "boot_net=run netargs addtty addeth;"                           \
 203         " tftpboot ${loadaddr} ${kernelfile};"                          \
 204         " bootm\0"
 205
 206 /* additions for new relocation code, must be added to all boards */
 207 #define CONFIG_SYS_INIT_SP_ADDR                                         \
 208         (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
 209
 210 #endif /* __CONFIG_H */