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1 /*
2 * am3517_evm.h - Default configuration for AM3517 EVM board.
3 *
4 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
5 *
6 * Based on omap3_evm_config.h
7 *
8 * Copyright (C) 2010 Texas Instruments Incorporated
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
17
18 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
19
20 /*
21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
22 * 64 bytes before this address should be set aside for u-boot.img's
23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
24 * other needs.
25 */
26 #define CONFIG_SYS_TEXT_BASE 0x80100000
27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
29
30 #include <asm/arch/cpu.h> /* get chip and board defs */
31 #include <asm/arch/omap.h>
32
33 #define CONFIG_MISC_INIT_R
34 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_INITRD_TAG
37 #define CONFIG_REVISION_TAG
38
39 /* Clock Defines */
40 #define V_OSCK 26000000 /* Clock output from T2 */
41 #define V_SCLK (V_OSCK >> 1)
42
43 /* Size of malloc() pool */
44 #define CONFIG_SYS_MALLOC_LEN (16 << 20)
45
46 /* Hardware drivers */
47
48 /* NS16550 Configuration */
49 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
50 #define CONFIG_SYS_NS16550_SERIAL
51 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
52 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
53
54 /* select serial console configuration */
55 #define CONFIG_CONS_INDEX 3
56 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
57 #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
58
59 /* allow to overwrite serial and ethaddr */
60 #define CONFIG_ENV_OVERWRITE
61 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
62 115200}
63
64 /*
65 * USB configuration
66 * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
67 * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
68 */
69 #define CONFIG_USB_MUSB_AM35X
70 #define CONFIG_USB_MUSB_PIO_ONLY
71
72 #ifdef CONFIG_USB_MUSB_AM35X
73
74 #ifdef CONFIG_USB_MUSB_HOST
75
76 #ifdef CONFIG_USB_KEYBOARD
77 #define CONFIG_PREBOOT "usb start"
78 #endif /* CONFIG_USB_KEYBOARD */
79
80 #endif /* CONFIG_USB_MUSB_HOST */
81
82 #ifdef CONFIG_USB_MUSB_GADGET
83 #define CONFIG_USB_ETHER
84 #define CONFIG_USB_ETH_RNDIS
85 #endif /* CONFIG_USB_MUSB_GADGET */
86
87 #endif /* CONFIG_USB_MUSB_AM35X */
88
89 /* I2C */
90 #define CONFIG_SYS_I2C
91 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
92 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
93
94 /* Ethernet */
95 #define CONFIG_DRIVER_TI_EMAC
96 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
97 #define CONFIG_MII
98 #define CONFIG_BOOTP_DEFAULT
99 #define CONFIG_BOOTP_DNS
100 #define CONFIG_BOOTP_DNS2
101 #define CONFIG_BOOTP_SEND_HOSTNAME
102 #define CONFIG_NET_RETRY_COUNT 10
103
104 /* Board NAND Info. */
105 #ifdef CONFIG_NAND
106 #define CONFIG_NAND_OMAP_GPMC
107 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
108 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
109 /* to access nand */
110 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
111 /* to access */
112 /* nand at CS0 */
113 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
114 /* NAND devices */
115 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
116 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
117 #define CONFIG_SYS_NAND_PAGE_COUNT 64
118 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
119 #define CONFIG_SYS_NAND_OOBSIZE 64
120 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
121 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
122 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
123 11, 12, 13, 14, 16, 17, 18, 19, 20, \
124 21, 22, 23, 24, 25, 26, 27, 28, 30, \
125 31, 32, 33, 34, 35, 36, 37, 38, 39, \
126 40, 41, 42, 44, 45, 46, 47, 48, 49, \
127 50, 51, 52, 53, 54, 55, 56 }
128
129 #define CONFIG_SYS_NAND_ECCSIZE 512
130 #define CONFIG_SYS_NAND_ECCBYTES 13
131 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
132 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
133 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
134 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
135 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
136 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
137 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
138 /* NAND block size is 128 KiB. Synchronize these values with
139 * corresponding Device Tree entries in Linux:
140 * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
141 * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
142 * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
143 * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
144 * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
145 * RootFS Remaining Flash Space @ 0xB20000
146 */
147 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
148 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
149 "512k(MLO)," \
150 "1920k(u-boot)," \
151 "256k(u-boot-env)," \
152 "8m(kernel)," \
153 "512k(dtb)," \
154 "-(rootfs)"
155 #else
156 #define MTDIDS_DEFAULT
157 #define MTDPARTS_DEFAULT
158 #endif /* CONFIG_NAND */
159
160 /* Environment information */
161
162 #define CONFIG_BOOTFILE "uImage"
163
164 #define CONFIG_EXTRA_ENV_SETTINGS \
165 "loadaddr=0x82000000\0" \
166 "console=ttyO2,115200n8\0" \
167 "fdtfile=am3517-evm.dtb\0" \
168 "fdtaddr=0x82C00000\0" \
169 "vram=16M\0" \
170 "bootenv=uEnv.txt\0" \
171 "cmdline=\0" \
172 "optargs=\0" \
173 "mtdids=" MTDIDS_DEFAULT "\0" \
174 "mtdparts=" MTDPARTS_DEFAULT "\0" \
175 "mmcdev=0\0" \
176 "mmcpart=1\0" \
177 "mmcroot=/dev/mmcblk0p2 rw\0" \
178 "mmcrootfstype=ext4 rootwait fixrtc\0" \
179 "mmcargs=setenv bootargs console=${console} " \
180 "${mtdparts} " \
181 "${optargs} " \
182 "root=${mmcroot} " \
183 "rootfstype=${mmcrootfstype} " \
184 "${cmdline}\0" \
185 "nandargs=setenv bootargs console=${console} " \
186 "${mtdparts} " \
187 "${optargs} " \
188 "root=ubi0:rootfs rw ubi.mtd=rootfs " \
189 "rootfstype=ubifs rootwait " \
190 "${cmdline}\0" \
191 "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
192 "importbootenv=echo Importing environment from mmc ...; " \
193 "env import -t ${loadaddr} ${filesize}\0" \
194 "bootscript=echo Running bootscript from mmc ...; " \
195 "source ${loadaddr}\0" \
196 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
197 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
198 "mmcboot=echo Booting from mmc ...; " \
199 "run mmcargs; " \
200 "bootz ${loadaddr} - ${fdtaddr}\0" \
201 "nandboot=echo Booting from nand ...; " \
202 "run nandargs; " \
203 "nand read ${loadaddr} 2a0000 800000; " \
204 "nand read ${fdtaddr} aa0000 80000; " \
205 "bootm ${loadaddr} - ${fdtaddr}\0" \
206
207 #define CONFIG_BOOTCOMMAND \
208 "mmc dev ${mmcdev}; if mmc rescan; then " \
209 "echo SD/MMC found on device $mmcdev; " \
210 "if run loadbootenv; then " \
211 "run importbootenv; " \
212 "fi; " \
213 "echo Checking if uenvcmd is set ...; " \
214 "if test -n $uenvcmd; then " \
215 "echo Running uenvcmd ...; " \
216 "run uenvcmd; " \
217 "fi; " \
218 "echo Running default loadimage ...; " \
219 "setenv bootfile zImage; " \
220 "if run loadimage; then " \
221 "run loadfdt; " \
222 "run mmcboot; " \
223 "fi; " \
224 "else run nandboot; fi"
225
226 /* Miscellaneous configurable options */
227 #define CONFIG_AUTO_COMPLETE
228 #define CONFIG_CMDLINE_EDITING
229 #define CONFIG_SYS_LONGHELP
230
231 /* We set the max number of command args high to avoid HUSH bugs. */
232 #define CONFIG_SYS_MAXARGS 64
233
234 /* Console I/O Buffer Size */
235 #define CONFIG_SYS_CBSIZE 512
236 /* Print Buffer Size */
237 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
238 + sizeof(CONFIG_SYS_PROMPT) + 16)
239 /* Boot Argument Buffer Size */
240 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
241
242 /* memtest works on */
243 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
244 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
245 0x01F00000) /* 31MB */
246
247 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
248 /* address */
249
250 /*
251 * AM3517 has 12 GP timers, they can be driven by the system clock
252 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
253 * This rate is divided by a local divisor.
254 */
255 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
256 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
257
258 /* Physical Memory Map */
259 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
260 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
261 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
262 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
263 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
264 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
265 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
266 CONFIG_SYS_INIT_RAM_SIZE - \
267 GENERATED_GBL_DATA_SIZE)
268
269 /* FLASH and environment organization */
270
271 /* **** PISMO SUPPORT *** */
272 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
273 /* on one chip */
274 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
275 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
276
277 #if defined(CONFIG_NAND)
278 #define CONFIG_SYS_FLASH_BASE NAND_BASE
279 #endif
280
281 /* Monitor at start of flash */
282 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
283
284 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
285 #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
286 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
287 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
288 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
289
290 /* Defines for SPL */
291 #define CONFIG_SPL_FRAMEWORK
292 #define CONFIG_SPL_NAND_SIMPLE
293 #define CONFIG_SPL_TEXT_BASE 0x40200000
294 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
295 CONFIG_SPL_TEXT_BASE)
296
297 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
298 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
299
300 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
301 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
302
303 #define CONFIG_SPL_NAND_BASE
304 #define CONFIG_SPL_NAND_DRIVERS
305 #define CONFIG_SPL_NAND_ECC
306
307 #endif /* __CONFIG_H */