include/configs/am3517_evm.h

   1 /*
   2  * am3517_evm.h - Default configuration for AM3517 EVM board.
   3  *
   4  * Author: Vaibhav Hiremath <hvaibhav@ti.com>
   5  *
   6  * Based on omap3_evm_config.h
   7  *
   8  * Copyright (C) 2010 Texas Instruments Incorporated
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 /*
  17  * High Level Configuration Options
  18  */
  19 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  20 #define CONFIG_OMAP3_AM3517EVM  1       /* working with AM3517EVM */
  21 #define CONFIG_OMAP_COMMON
  22 /* Common ARM Erratas */
  23 #define CONFIG_ARM_ERRATA_454179
  24 #define CONFIG_ARM_ERRATA_430973
  25 #define CONFIG_ARM_ERRATA_621766
  26
  27 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  28
  29 #include <asm/arch/cpu.h>               /* get chip and board defs */
  30 #include <asm/arch/omap.h>
  31
  32 /*
  33  * Display CPU and Board information
  34  */
  35 #define CONFIG_DISPLAY_CPUINFO          1
  36 #define CONFIG_DISPLAY_BOARDINFO        1
  37
  38 /* Clock Defines */
  39 #define V_OSCK                  26000000        /* Clock output from T2 */
  40 #define V_SCLK                  (V_OSCK >> 1)
  41
  42 #define CONFIG_MISC_INIT_R
  43
  44 #define CONFIG_OF_LIBFDT
  45
  46 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  47 #define CONFIG_SETUP_MEMORY_TAGS        1
  48 #define CONFIG_INITRD_TAG               1
  49 #define CONFIG_REVISION_TAG             1
  50
  51 /*
  52  * Size of malloc() pool
  53  */
  54 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  55 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  56 /*
  57  * DDR related
  58  */
  59 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  60
  61 /*
  62  * Hardware drivers
  63  */
  64
  65 /*
  66  * OMAP GPIO configuration
  67  */
  68 #define CONFIG_OMAP_GPIO
  69
  70 /*
  71  * NS16550 Configuration
  72  */
  73 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  74
  75 #define CONFIG_SYS_NS16550_SERIAL
  76 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  77 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  78
  79 /*
  80  * select serial console configuration
  81  */
  82 #define CONFIG_CONS_INDEX               3
  83 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  84 #define CONFIG_SERIAL3                  3       /* UART3 on AM3517 EVM */
  85
  86 /* allow to overwrite serial and ethaddr */
  87 #define CONFIG_ENV_OVERWRITE
  88 #define CONFIG_BAUDRATE                 115200
  89 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  90                                         115200}
  91 #define CONFIG_MMC                      1
  92 #define CONFIG_GENERIC_MMC              1
  93 #define CONFIG_OMAP_HSMMC               1
  94 #define CONFIG_DOS_PARTITION            1
  95
  96 /*
  97  * USB configuration
  98  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
  99  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
 100  */
 101 #define CONFIG_USB_MUSB_AM35X
 102 #define CONFIG_USB_MUSB_HOST
 103 #define CONFIG_USB_MUSB_PIO_ONLY
 104
 105 #ifdef CONFIG_USB_MUSB_AM35X
 106
 107 #ifdef CONFIG_USB_MUSB_HOST
 108 #define CONFIG_CMD_USB
 109
 110 #define CONFIG_USB_STORAGE
 111 #define CONGIG_CMD_STORAGE
 112 #define CONFIG_CMD_FAT
 113
 114 #ifdef CONFIG_USB_KEYBOARD
 115 #define CONFIG_SYS_USB_EVENT_POLL
 116 #define CONFIG_PREBOOT "usb start"
 117 #endif /* CONFIG_USB_KEYBOARD */
 118
 119 #endif /* CONFIG_USB_MUSB_HOST */
 120
 121 #ifdef CONFIG_USB_MUSB_GADGET
 122 #define CONFIG_USB_GADGET_DUALSPEED
 123 #define CONFIG_USB_ETHER
 124 #define CONFIG_USB_ETH_RNDIS
 125 #endif /* CONFIG_USB_MUSB_GADGET */
 126
 127 #endif /* CONFIG_USB_MUSB_AM35X */
 128
 129 /* commands to include */
 130 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 131 #define CONFIG_CMD_FAT          /* FAT support                  */
 132 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 133
 134 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 135 #define CONFIG_CMD_MMC          /* MMC support                  */
 136 #define CONFIG_CMD_NAND         /* NAND support                 */
 137 #define CONFIG_CMD_DHCP
 138 #undef CONFIG_CMD_PING
 139
 140
 141 #define CONFIG_SYS_NO_FLASH
 142 #define CONFIG_SYS_I2C
 143 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 144 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 145 #define CONFIG_SYS_I2C_OMAP34XX
 146
 147 /*
 148  * Ethernet
 149  */
 150 #define CONFIG_DRIVER_TI_EMAC
 151 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 152 #define CONFIG_MII
 153 #define CONFIG_BOOTP_DEFAULT
 154 #define CONFIG_BOOTP_DNS
 155 #define CONFIG_BOOTP_DNS2
 156 #define CONFIG_BOOTP_SEND_HOSTNAME
 157 #define CONFIG_NET_RETRY_COUNT          10
 158
 159 /*
 160  * Board NAND Info.
 161  */
 162 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 163                                                         /* to access nand */
 164 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 165                                                         /* to access */
 166                                                         /* nand at CS0 */
 167
 168 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 169                                                         /* NAND devices */
 170 #define CONFIG_JFFS2_NAND
 171 /* nand device jffs2 lives on */
 172 #define CONFIG_JFFS2_DEV                "nand0"
 173 /* start of jffs2 partition */
 174 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 175 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
 176
 177 /* Environment information */
 178 #define CONFIG_BOOTDELAY        10
 179
 180 #define CONFIG_BOOTFILE         "uImage"
 181
 182 #define CONFIG_EXTRA_ENV_SETTINGS \
 183         "loadaddr=0x82000000\0" \
 184         "console=ttyO2,115200n8\0" \
 185         "mmcdev=0\0" \
 186         "mmcargs=setenv bootargs console=${console} " \
 187                 "root=/dev/mmcblk0p2 rw rootwait\0" \
 188         "nandargs=setenv bootargs console=${console} " \
 189                 "root=/dev/mtdblock4 rw " \
 190                 "rootfstype=jffs2\0" \
 191         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 192         "bootscript=echo Running bootscript from mmc ...; " \
 193                 "source ${loadaddr}\0" \
 194         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 195         "mmcboot=echo Booting from mmc ...; " \
 196                 "run mmcargs; " \
 197                 "bootm ${loadaddr}\0" \
 198         "nandboot=echo Booting from nand ...; " \
 199                 "run nandargs; " \
 200                 "nand read ${loadaddr} 280000 400000; " \
 201                 "bootm ${loadaddr}\0" \
 202
 203 #define CONFIG_BOOTCOMMAND \
 204         "mmc dev ${mmcdev}; if mmc rescan; then " \
 205                 "if run loadbootscript; then " \
 206                         "run bootscript; " \
 207                 "else " \
 208                         "if run loaduimage; then " \
 209                                 "run mmcboot; " \
 210                         "else run nandboot; " \
 211                         "fi; " \
 212                 "fi; " \
 213         "else run nandboot; fi"
 214
 215 #define CONFIG_AUTO_COMPLETE    1
 216 /*
 217  * Miscellaneous configurable options
 218  */
 219 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 220 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 221 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 222 /* Print Buffer Size */
 223 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 224                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 225 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
 226                                                 /* args */
 227 /* Boot Argument Buffer Size */
 228 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 229 /* memtest works on */
 230 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 231 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 232                                         0x01F00000) /* 31MB */
 233
 234 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 235                                                                 /* address */
 236
 237 /*
 238  * AM3517 has 12 GP timers, they can be driven by the system clock
 239  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 240  * This rate is divided by a local divisor.
 241  */
 242 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 243 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 244
 245 /*-----------------------------------------------------------------------
 246  * Physical Memory Map
 247  */
 248 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 249 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 250 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 251
 252 /*-----------------------------------------------------------------------
 253  * FLASH and environment organization
 254  */
 255
 256 /* **** PISMO SUPPORT *** */
 257 #define CONFIG_SYS_MAX_FLASH_SECT       520     /* max number of sectors */
 258                                                 /* on one chip */
 259 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of flash banks */
 260 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 261
 262 #if defined(CONFIG_CMD_NAND)
 263 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 264 #endif
 265
 266 /* Monitor at start of flash */
 267 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 268
 269 #define CONFIG_NAND_OMAP_GPMC
 270 #define CONFIG_ENV_IS_IN_NAND           1
 271 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 272
 273 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 274 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 275 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 276
 277 /*-----------------------------------------------------------------------
 278  * CFI FLASH driver setup
 279  */
 280 /* timeout values are in ticks */
 281 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 282 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 283
 284 /* Flash banks JFFS2 should use */
 285 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 286                                         CONFIG_SYS_MAX_NAND_DEVICE)
 287 #define CONFIG_SYS_JFFS2_MEM_NAND
 288 /* use flash_info[2] */
 289 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 290 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 291
 292 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 293 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 294 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 295 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 296                                          CONFIG_SYS_INIT_RAM_SIZE - \
 297                                          GENERATED_GBL_DATA_SIZE)
 298
 299 /* Defines for SPL */
 300 #define CONFIG_SPL_FRAMEWORK
 301 #define CONFIG_SPL_BOARD_INIT
 302 #define CONFIG_SPL_NAND_SIMPLE
 303 #define CONFIG_SPL_TEXT_BASE            0x40200800
 304 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 305
 306 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 307 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 308
 309 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 310 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 311 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 312 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
 313
 314 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 315 #define CONFIG_SPL_LIBDISK_SUPPORT
 316 #define CONFIG_SPL_I2C_SUPPORT
 317 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 318 #define CONFIG_SPL_MMC_SUPPORT
 319 #define CONFIG_SPL_FAT_SUPPORT
 320 #define CONFIG_SPL_SERIAL_SUPPORT
 321 #define CONFIG_SPL_NAND_SUPPORT
 322 #define CONFIG_SPL_NAND_BASE
 323 #define CONFIG_SPL_NAND_DRIVERS
 324 #define CONFIG_SPL_NAND_ECC
 325 #define CONFIG_SPL_POWER_SUPPORT
 326 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 327
 328 /* NAND boot config */
 329 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 330 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 331 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 332 #define CONFIG_SYS_NAND_OOBSIZE         64
 333 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 334 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 335 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 336                                                 10, 11, 12, 13}
 337 #define CONFIG_SYS_NAND_ECCSIZE         512
 338 #define CONFIG_SYS_NAND_ECCBYTES        3
 339 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
 340 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 341 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 342
 343 /*
 344  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 345  * 64 bytes before this address should be set aside for u-boot.img's
 346  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 347  * other needs.
 348  */
 349 #define CONFIG_SYS_TEXT_BASE            0x80100000
 350 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 351 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 352
 353 #endif /* __CONFIG_H */