include/configs/am3517_evm.h

   1 /*
   2  * am3517_evm.h - Default configuration for AM3517 EVM board.
   3  *
   4  * Author: Vaibhav Hiremath <hvaibhav@ti.com>
   5  *
   6  * Based on omap3_evm_config.h
   7  *
   8  * Copyright (C) 2010 Texas Instruments Incorporated
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 #define CONFIG_SYS_CACHELINE_SIZE       64
  17
  18 /*
  19  * High Level Configuration Options
  20  */
  21 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  22 #define CONFIG_OMAP3_AM3517EVM  1       /* working with AM3517EVM */
  23 #define CONFIG_OMAP_COMMON
  24 /* Common ARM Erratas */
  25 #define CONFIG_ARM_ERRATA_454179
  26 #define CONFIG_ARM_ERRATA_430973
  27 #define CONFIG_ARM_ERRATA_621766
  28
  29 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  30
  31 #include <asm/arch/cpu.h>               /* get chip and board defs */
  32 #include <asm/arch/omap.h>
  33
  34 /*
  35  * Display CPU and Board information
  36  */
  37 #define CONFIG_DISPLAY_CPUINFO          1
  38 #define CONFIG_DISPLAY_BOARDINFO        1
  39
  40 /* Clock Defines */
  41 #define V_OSCK                  26000000        /* Clock output from T2 */
  42 #define V_SCLK                  (V_OSCK >> 1)
  43
  44 #define CONFIG_MISC_INIT_R
  45
  46 #define CONFIG_OF_LIBFDT
  47
  48 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  49 #define CONFIG_SETUP_MEMORY_TAGS        1
  50 #define CONFIG_INITRD_TAG               1
  51 #define CONFIG_REVISION_TAG             1
  52
  53 /*
  54  * Size of malloc() pool
  55  */
  56 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  57 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  58 /*
  59  * DDR related
  60  */
  61 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  62
  63 /*
  64  * Hardware drivers
  65  */
  66
  67 /*
  68  * OMAP GPIO configuration
  69  */
  70 #define CONFIG_OMAP_GPIO
  71
  72 /*
  73  * NS16550 Configuration
  74  */
  75 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  76
  77 #define CONFIG_SYS_NS16550_SERIAL
  78 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  79 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  80
  81 /*
  82  * select serial console configuration
  83  */
  84 #define CONFIG_CONS_INDEX               3
  85 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  86 #define CONFIG_SERIAL3                  3       /* UART3 on AM3517 EVM */
  87
  88 /* allow to overwrite serial and ethaddr */
  89 #define CONFIG_ENV_OVERWRITE
  90 #define CONFIG_BAUDRATE                 115200
  91 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  92                                         115200}
  93 #define CONFIG_MMC                      1
  94 #define CONFIG_GENERIC_MMC              1
  95 #define CONFIG_OMAP_HSMMC               1
  96 #define CONFIG_DOS_PARTITION            1
  97
  98 /*
  99  * USB configuration
 100  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
 101  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
 102  */
 103 #define CONFIG_USB_MUSB_AM35X
 104 #define CONFIG_USB_MUSB_HOST
 105 #define CONFIG_USB_MUSB_PIO_ONLY
 106
 107 #ifdef CONFIG_USB_MUSB_AM35X
 108
 109 #ifdef CONFIG_USB_MUSB_HOST
 110 #define CONFIG_CMD_USB
 111
 112 #define CONFIG_USB_STORAGE
 113 #define CONGIG_CMD_STORAGE
 114 #define CONFIG_CMD_FAT
 115
 116 #ifdef CONFIG_USB_KEYBOARD
 117 #define CONFIG_SYS_USB_EVENT_POLL
 118 #define CONFIG_PREBOOT "usb start"
 119 #endif /* CONFIG_USB_KEYBOARD */
 120
 121 #endif /* CONFIG_USB_MUSB_HOST */
 122
 123 #ifdef CONFIG_USB_MUSB_GADGET
 124 #define CONFIG_USB_GADGET_DUALSPEED
 125 #define CONFIG_USB_ETHER
 126 #define CONFIG_USB_ETH_RNDIS
 127 #endif /* CONFIG_USB_MUSB_GADGET */
 128
 129 #endif /* CONFIG_USB_MUSB_AM35X */
 130
 131 /* commands to include */
 132 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 133 #define CONFIG_CMD_FAT          /* FAT support                  */
 134 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 135
 136 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 137 #define CONFIG_CMD_MMC          /* MMC support                  */
 138 #define CONFIG_CMD_NAND         /* NAND support                 */
 139 #define CONFIG_CMD_DHCP
 140 #undef CONFIG_CMD_PING
 141
 142
 143 #define CONFIG_SYS_NO_FLASH
 144 #define CONFIG_SYS_I2C
 145 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 146 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 147 #define CONFIG_SYS_I2C_OMAP34XX
 148
 149 /*
 150  * Ethernet
 151  */
 152 #define CONFIG_DRIVER_TI_EMAC
 153 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 154 #define CONFIG_MII
 155 #define CONFIG_BOOTP_DEFAULT
 156 #define CONFIG_BOOTP_DNS
 157 #define CONFIG_BOOTP_DNS2
 158 #define CONFIG_BOOTP_SEND_HOSTNAME
 159 #define CONFIG_NET_RETRY_COUNT          10
 160
 161 /*
 162  * Board NAND Info.
 163  */
 164 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 165                                                         /* to access nand */
 166 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 167                                                         /* to access */
 168                                                         /* nand at CS0 */
 169
 170 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 171                                                         /* NAND devices */
 172 #define CONFIG_JFFS2_NAND
 173 /* nand device jffs2 lives on */
 174 #define CONFIG_JFFS2_DEV                "nand0"
 175 /* start of jffs2 partition */
 176 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 177 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
 178
 179 /* Environment information */
 180 #define CONFIG_BOOTDELAY        10
 181
 182 #define CONFIG_BOOTFILE         "uImage"
 183
 184 #define CONFIG_EXTRA_ENV_SETTINGS \
 185         "loadaddr=0x82000000\0" \
 186         "console=ttyO2,115200n8\0" \
 187         "mmcdev=0\0" \
 188         "mmcargs=setenv bootargs console=${console} " \
 189                 "root=/dev/mmcblk0p2 rw rootwait\0" \
 190         "nandargs=setenv bootargs console=${console} " \
 191                 "root=/dev/mtdblock4 rw " \
 192                 "rootfstype=jffs2\0" \
 193         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 194         "bootscript=echo Running bootscript from mmc ...; " \
 195                 "source ${loadaddr}\0" \
 196         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 197         "mmcboot=echo Booting from mmc ...; " \
 198                 "run mmcargs; " \
 199                 "bootm ${loadaddr}\0" \
 200         "nandboot=echo Booting from nand ...; " \
 201                 "run nandargs; " \
 202                 "nand read ${loadaddr} 280000 400000; " \
 203                 "bootm ${loadaddr}\0" \
 204
 205 #define CONFIG_BOOTCOMMAND \
 206         "mmc dev ${mmcdev}; if mmc rescan; then " \
 207                 "if run loadbootscript; then " \
 208                         "run bootscript; " \
 209                 "else " \
 210                         "if run loaduimage; then " \
 211                                 "run mmcboot; " \
 212                         "else run nandboot; " \
 213                         "fi; " \
 214                 "fi; " \
 215         "else run nandboot; fi"
 216
 217 #define CONFIG_AUTO_COMPLETE    1
 218 /*
 219  * Miscellaneous configurable options
 220  */
 221 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 222 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 223 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 224 /* Print Buffer Size */
 225 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 226                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 227 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
 228                                                 /* args */
 229 /* Boot Argument Buffer Size */
 230 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 231 /* memtest works on */
 232 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 233 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 234                                         0x01F00000) /* 31MB */
 235
 236 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 237                                                                 /* address */
 238
 239 /*
 240  * AM3517 has 12 GP timers, they can be driven by the system clock
 241  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 242  * This rate is divided by a local divisor.
 243  */
 244 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 245 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 246
 247 /*-----------------------------------------------------------------------
 248  * Physical Memory Map
 249  */
 250 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 251 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 252 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 253
 254 /*-----------------------------------------------------------------------
 255  * FLASH and environment organization
 256  */
 257
 258 /* **** PISMO SUPPORT *** */
 259 #define CONFIG_SYS_MAX_FLASH_SECT       520     /* max number of sectors */
 260                                                 /* on one chip */
 261 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of flash banks */
 262 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 263
 264 #if defined(CONFIG_CMD_NAND)
 265 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
 266 #endif
 267
 268 /* Monitor at start of flash */
 269 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 270
 271 #define CONFIG_NAND_OMAP_GPMC
 272 #define CONFIG_ENV_IS_IN_NAND           1
 273 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 274
 275 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 276 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 277 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 278
 279 /*-----------------------------------------------------------------------
 280  * CFI FLASH driver setup
 281  */
 282 /* timeout values are in ticks */
 283 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 284 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 285
 286 /* Flash banks JFFS2 should use */
 287 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 288                                         CONFIG_SYS_MAX_NAND_DEVICE)
 289 #define CONFIG_SYS_JFFS2_MEM_NAND
 290 /* use flash_info[2] */
 291 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 292 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 293
 294 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 295 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 296 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 297 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 298                                          CONFIG_SYS_INIT_RAM_SIZE - \
 299                                          GENERATED_GBL_DATA_SIZE)
 300
 301 /* Defines for SPL */
 302 #define CONFIG_SPL_FRAMEWORK
 303 #define CONFIG_SPL_BOARD_INIT
 304 #define CONFIG_SPL_NAND_SIMPLE
 305 #define CONFIG_SPL_TEXT_BASE            0x40200800
 306 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 307
 308 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 309 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 310
 311 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 312 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 313 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 314 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
 315
 316 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 317 #define CONFIG_SPL_LIBDISK_SUPPORT
 318 #define CONFIG_SPL_I2C_SUPPORT
 319 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 320 #define CONFIG_SPL_MMC_SUPPORT
 321 #define CONFIG_SPL_FAT_SUPPORT
 322 #define CONFIG_SPL_SERIAL_SUPPORT
 323 #define CONFIG_SPL_NAND_SUPPORT
 324 #define CONFIG_SPL_NAND_BASE
 325 #define CONFIG_SPL_NAND_DRIVERS
 326 #define CONFIG_SPL_NAND_ECC
 327 #define CONFIG_SPL_POWER_SUPPORT
 328 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 329
 330 /* NAND boot config */
 331 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 332 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 333 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 334 #define CONFIG_SYS_NAND_OOBSIZE         64
 335 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 336 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 337 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 338                                                 10, 11, 12, 13}
 339 #define CONFIG_SYS_NAND_ECCSIZE         512
 340 #define CONFIG_SYS_NAND_ECCBYTES        3
 341 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
 342 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 343 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 344
 345 /*
 346  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 347  * 64 bytes before this address should be set aside for u-boot.img's
 348  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 349  * other needs.
 350  */
 351 #define CONFIG_SYS_TEXT_BASE            0x80100000
 352 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 353 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 354
 355 #endif /* __CONFIG_H */