include/configs/ap_sh4a_4a.h

   1 /*
   2  * Configuation settings for the Alpha Project AP-SH4A-4A board
   3  *
   4  * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __AP_SH4A_4A_H
  10 #define __AP_SH4A_4A_H
  11
  12 #define CONFIG_CPU_SH7734       1
  13 #define CONFIG_400MHZ_MODE      1
  14
  15 #define CONFIG_DISPLAY_BOARDINFO
  16 #undef  CONFIG_SHOW_BOOT_PROGRESS
  17
  18 /* Ether */
  19 #define CONFIG_SH_ETHER_USE_PORT (0)
  20 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
  21 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
  22 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
  23 #define CONFIG_BITBANGMII
  24 #define CONFIG_BITBANGMII_MULTI
  25
  26 /* undef to save memory */
  27 #define CONFIG_SYS_LONGHELP
  28 /* Monitor Command Prompt */
  29 /* Buffer size for Console output */
  30 #define CONFIG_SYS_PBSIZE               256
  31 /* List of legal baudrate settings for this board */
  32 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  33
  34 /* SCIF */
  35 #define CONFIG_SCIF                     1
  36 #define CONFIG_CONS_SCIF4       1
  37
  38 /* Suppress display of console information at boot */
  39
  40 /* SDRAM */
  41 #define CONFIG_SYS_SDRAM_BASE   (0x88000000)
  42 #define CONFIG_SYS_SDRAM_SIZE   (64 * 1024 * 1024)
  43 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
  44
  45 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  46 #define CONFIG_SYS_MEMTEST_END   (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
  47 /* Enable alternate, more extensive, memory test */
  48 #undef  CONFIG_SYS_ALT_MEMTEST
  49 /* Scratch address used by the alternate memory test */
  50 #undef  CONFIG_SYS_MEMTEST_SCRATCH
  51
  52 /* Enable temporary baudrate change while serial download */
  53 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  54
  55 /* FLASH */
  56 #define CONFIG_FLASH_CFI_DRIVER 1
  57 #define CONFIG_SYS_FLASH_CFI
  58 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  59 #define CONFIG_SYS_FLASH_EMPTY_INFO
  60 #define CONFIG_SYS_FLASH_BASE   (0xA0000000)
  61 #define CONFIG_SYS_MAX_FLASH_SECT       512
  62
  63 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
  64 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  66
  67 /* Timeout for Flash erase operations (in ms) */
  68 #define CONFIG_SYS_FLASH_ERASE_TOUT     (3 * 1000)
  69 /* Timeout for Flash write operations (in ms) */
  70 #define CONFIG_SYS_FLASH_WRITE_TOUT     (3 * 1000)
  71 /* Timeout for Flash set sector lock bit operations (in ms) */
  72 #define CONFIG_SYS_FLASH_LOCK_TOUT      (3 * 1000)
  73 /* Timeout for Flash clear lock bit operations (in ms) */
  74 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (3 * 1000)
  75
  76 /*
  77  * Use hardware flash sectors protection instead
  78  * of U-Boot software protection
  79  */
  80 #undef  CONFIG_SYS_FLASH_PROTECTION
  81 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
  82
  83 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
  84 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
  85 /* Monitor size */
  86 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
  87 /* Size of DRAM reserved for malloc() use */
  88 #define CONFIG_SYS_MALLOC_LEN   (256 * 1024)
  89 #define CONFIG_SYS_BOOTMAPSZ    (8 * 1024 * 1024)
  90
  91 /* ENV setting */
  92 #define CONFIG_ENV_OVERWRITE    1
  93 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
  94 #define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
  95 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
  96 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
  97 #define CONFIG_ENV_OFFSET       (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
  98 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SECT_SIZE)
  99
 100 /* Board Clock */
 101 #if defined(CONFIG_400MHZ_MODE)
 102 #define CONFIG_SYS_CLK_FREQ 50000000
 103 #else
 104 #define CONFIG_SYS_CLK_FREQ 44444444
 105 #endif
 106 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 107 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 108 #define CONFIG_SYS_TMU_CLK_DIV      4
 109
 110 #endif  /* __AP_SH4A_4A_H */